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1 parent 90dee58 commit 6759869Copy full SHA for 6759869
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -1632,6 +1632,7 @@ class BitPermutationSelector {
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default: break;
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case ISD::ROTL:
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if (isa<ConstantSDNode>(V.getOperand(1))) {
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+ assert(isPowerOf2_32(NumBits) && "rotl bits should be power of 2!");
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unsigned RotAmt = V.getConstantOperandVal(1) & (NumBits - 1);
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const auto &LHSBits = *getValueBits(V.getOperand(0), NumBits).second;
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