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LiqinWengLiqinWeng
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Rebase && fix the comments
1 parent 2347fb1 commit 63f1ab9

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3 files changed

+37
-41
lines changed

3 files changed

+37
-41
lines changed

‎llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp

Lines changed: 30 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -1455,10 +1455,9 @@ InstructionCost VPWidenRecipe::computeCost(ElementCount VF,
14551455

14561456
void VPWidenEVLRecipe::execute(VPTransformState &State) {
14571457
unsigned Opcode = getOpcode();
1458-
// TODO: Support other opcodes
14591458
if (Opcode == Instruction::ICmp || Opcode == Instruction::FCmp) {
1460-
Value *Op1 = State.get(getOperand(0), 0);
1461-
Value *Op2 = State.get(getOperand(1), 0);
1459+
Value *Op1 = State.get(getOperand(0));
1460+
Value *Op2 = State.get(getOperand(1));
14621461
auto &Ctx = State.Builder.getContext();
14631462
Value *Pred = MetadataAsValue::get(
14641463
Ctx, MDString::get(Ctx, CmpInst::getPredicateName(getPredicate())));
@@ -1471,46 +1470,45 @@ void VPWidenEVLRecipe::execute(VPTransformState &State) {
14711470
VectorType *RetType = VectorType::get(Type::getInt1Ty(Ctx), State.VF);
14721471
Value *VPInst = Builder.createVectorInstruction(Opcode, RetType,
14731472
{Op1, Op2, Pred}, "vp.op");
1474-
if (auto *VecOp = dyn_cast<CastInst>(VPInst))
1475-
VecOp->copyIRFlags(getUnderlyingInstr());
1473+
if (isa<FPMathOperator>(VPInst))
1474+
setFlags(cast<Instruction>(VPInst));
14761475

1477-
State.set(this, VPInst, 0);
1476+
State.set(this, VPInst);
14781477
State.addMetadata(VPInst,
14791478
dyn_cast_or_null<Instruction>(getUnderlyingValue()));
14801479
return;
14811480
}
14821481

1483-
if (!Instruction::isBinaryOp(Opcode) && !Instruction::isUnaryOp(Opcode))
1484-
llvm_unreachable("Unsupported opcode in VPWidenEVLRecipe::execute");
1482+
if (Instruction::isBinaryOp(Opcode) || Instruction::isUnaryOp(Opcode)) {
1483+
State.setDebugLocFrom(getDebugLoc());
14851484

1486-
State.setDebugLocFrom(getDebugLoc());
1487-
1488-
assert(State.get(getOperand(0))->getType()->isVectorTy() &&
1489-
"VPWidenEVLRecipe should not be used for scalars");
1485+
assert(State.get(getOperand(0))->getType()->isVectorTy() &&
1486+
"VPWidenEVLRecipe should not be used for scalars");
14901487

1491-
VPValue *EVL = getEVL();
1492-
Value *EVLArg = State.get(EVL, /*NeedsScalar=*/true);
1493-
IRBuilderBase &BuilderIR = State.Builder;
1494-
VectorBuilder Builder(BuilderIR);
1495-
Value *Mask = BuilderIR.CreateVectorSplat(State.VF, BuilderIR.getTrue());
1488+
VPValue *EVL = getEVL();
1489+
Value *EVLArg = State.get(EVL, /*NeedsScalar=*/true);
1490+
IRBuilderBase &BuilderIR = State.Builder;
1491+
VectorBuilder Builder(BuilderIR);
1492+
Value *Mask = BuilderIR.CreateVectorSplat(State.VF, BuilderIR.getTrue());
14961493

1497-
SmallVector<Value *, 4> Ops;
1498-
for (unsigned I = 0, E = getNumOperands() - 1; I < E; ++I) {
1499-
VPValue *VPOp = getOperand(I);
1500-
Ops.push_back(State.get(VPOp));
1501-
}
1494+
SmallVector<Value *, 4> Ops;
1495+
for (unsigned I = 0, E = getNumOperands() - 1; I < E; ++I) {
1496+
VPValue *VPOp = getOperand(I);
1497+
Ops.push_back(State.get(VPOp));
1498+
}
15021499

1503-
Builder.setMask(Mask).setEVL(EVLArg);
1504-
Value *VPInst =
1505-
Builder.createVectorInstruction(Opcode, Ops[0]->getType(), Ops, "vp.op");
1506-
// Currently vp-intrinsics only accept FMF flags.
1507-
// TODO: Enable other flags when support is added.
1508-
if (isa<FPMathOperator>(VPInst))
1509-
setFlags(cast<Instruction>(VPInst));
1500+
Builder.setMask(Mask).setEVL(EVLArg);
1501+
Value *VPInst = Builder.createVectorInstruction(Opcode, Ops[0]->getType(),
1502+
Ops, "vp.op");
1503+
// Currently vp-intrinsics only accept FMF flags.
1504+
// TODO: Enable other flags when support is added.
1505+
if (isa<FPMathOperator>(VPInst))
1506+
setFlags(cast<Instruction>(VPInst));
15101507

1511-
State.set(this, VPInst);
1512-
State.addMetadata(VPInst,
1513-
dyn_cast_or_null<Instruction>(getUnderlyingValue()));
1508+
State.set(this, VPInst);
1509+
State.addMetadata(VPInst,
1510+
dyn_cast_or_null<Instruction>(getUnderlyingValue()));
1511+
}
15141512
}
15151513

15161514
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)

‎llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1475,9 +1475,7 @@ static void transformRecipestoEVLRecipes(VPlan &Plan, VPValue &EVL) {
14751475
})
14761476
.Case<VPWidenRecipe>([&](VPWidenRecipe *W) -> VPRecipeBase * {
14771477
unsigned Opcode = W->getOpcode();
1478-
if (!Instruction::isBinaryOp(Opcode) &&
1479-
!Instruction::isUnaryOp(Opcode) &&
1480-
Opcode != Instruction::ICmp && Opcode != Instruction::FCmp)
1478+
if (Opcode == Instruction::Freeze)
14811479
return nullptr;
14821480
return new VPWidenEVLRecipe(*W, EVL);
14831481
})

‎llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-cmp-intrinsics.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ define void @vp_icmp(ptr noalias %a, ptr noalias %b, ptr noalias %c, i64 %N) {
1717
; IF-EVL: <x1> vector loop: {
1818
; IF-EVL-NEXT: vector.body:
1919
; IF-EVL-NEXT: EMIT vp<[[IV:%[0-9]+]]> = CANONICAL-INDUCTION
20-
; IF-EVL-NEXT: EXPLICIT-VECTOR-LENGTH-BASED-IV-PHI vp<[[EVL_PHI:%[0-9]+]]> = phi ir<0>, vp<[[IV_NEX:%[0-9]+]]>
20+
; IF-EVL-NEXT: EXPLICIT-VECTOR-LENGTH-BASED-IV-PHI vp<[[EVL_PHI:%[0-9]+]]> = phi ir<0>, vp<[[IV_NEXT:%.+]]>
2121
; IF-EVL-NEXT: EMIT vp<[[AVL:%.+]]> = sub ir<%N>, vp<[[EVL_PHI]]>
2222
; IF-EVL-NEXT: EMIT vp<[[EVL:%.+]]> = EXPLICIT-VECTOR-LENGTH vp<[[AVL]]>
2323
; IF-EVL-NEXT: vp<[[ST:%[0-9]+]]> = SCALAR-STEPS vp<[[EVL_PHI]]>, ir<1>
@@ -33,8 +33,8 @@ define void @vp_icmp(ptr noalias %a, ptr noalias %b, ptr noalias %c, i64 %N) {
3333
; IF-EVL-NEXT: vp<[[PTR3:%[0-9]+]]> = vector-pointer ir<[[GEP3]]>
3434
; IF-EVL-NEXT: WIDEN vp.store vp<[[PTR3]]>, ir<[[ZEXT]]>, vp<[[EVL]]>
3535
; IF-EVL-NEXT: SCALAR-CAST vp<[[CAST:%[0-9]+]]> = zext vp<[[EVL]]> to i64
36-
; IF-EVL-NEXT: EMIT vp<[[IV_NEX]]> = add vp<[[CAST]]>, vp<[[EVL_PHI]]>
37-
; IF-EVL-NEXT: EMIT vp<[[IV_NEXT_EXIT:%[0-9]+]]> = add vp<[[IV]]>, vp<[[VFUF]]>
36+
; IF-EVL-NEXT: EMIT vp<[[IV_NEXT]]> = add vp<[[CAST]]>, vp<[[EVL_PHI]]>
37+
; IF-EVL-NEXT: EMIT vp<[[IV_NEXT_EXIT:%.+]]> = add vp<[[IV]]>, vp<[[VFUF]]>
3838
; IF-EVL-NEXT: EMIT branch-on-count vp<[[IV_NEXT_EXIT]]>, vp<[[VTC]]>
3939
; IF-EVL-NEXT: No successors
4040
; IF-EVL-NEXT: }
@@ -72,7 +72,7 @@ define void @vp_fcmp(ptr noalias %a, ptr noalias %b, ptr noalias %c, i64 %N) {
7272
; IF-EVL: <x1> vector loop: {
7373
; IF-EVL-NEXT: vector.body:
7474
; IF-EVL-NEXT: EMIT vp<[[IV:%[0-9]+]]> = CANONICAL-INDUCTION
75-
; IF-EVL-NEXT: EXPLICIT-VECTOR-LENGTH-BASED-IV-PHI vp<[[EVL_PHI:%[0-9]+]]> = phi ir<0>, vp<[[IV_NEX:%[0-9]+]]>
75+
; IF-EVL-NEXT: EXPLICIT-VECTOR-LENGTH-BASED-IV-PHI vp<[[EVL_PHI:%[0-9]+]]> = phi ir<0>, vp<[[IV_NEXT:%.+]]>
7676
; IF-EVL-NEXT: EMIT vp<[[AVL:%.+]]> = sub ir<%N>, vp<[[EVL_PHI]]>
7777
; IF-EVL-NEXT: EMIT vp<[[EVL:%.+]]> = EXPLICIT-VECTOR-LENGTH vp<[[AVL]]>
7878
; IF-EVL-NEXT: vp<[[ST:%[0-9]+]]> = SCALAR-STEPS vp<[[EVL_PHI]]>, ir<1>
@@ -88,8 +88,8 @@ define void @vp_fcmp(ptr noalias %a, ptr noalias %b, ptr noalias %c, i64 %N) {
8888
; IF-EVL-NEXT: vp<[[PTR3:%[0-9]+]]> = vector-pointer ir<[[GEP3]]>
8989
; IF-EVL-NEXT: WIDEN vp.store vp<[[PTR3]]>, ir<[[UITOFP]]>, vp<[[EVL]]>
9090
; IF-EVL-NEXT: SCALAR-CAST vp<[[CAST:%[0-9]+]]> = zext vp<[[EVL]]> to i64
91-
; IF-EVL-NEXT: EMIT vp<[[IV_NEX]]> = add vp<[[CAST]]>, vp<[[EVL_PHI]]>
92-
; IF-EVL-NEXT: EMIT vp<[[IV_NEXT_EXIT:%[0-9]+]]> = add vp<[[IV]]>, vp<[[VFUF]]>
91+
; IF-EVL-NEXT: EMIT vp<[[IV_NEXT]]> = add vp<[[CAST]]>, vp<[[EVL_PHI]]>
92+
; IF-EVL-NEXT: EMIT vp<[[IV_NEXT_EXIT:%.+]]> = add vp<[[IV]]>, vp<[[VFUF]]>
9393
; IF-EVL-NEXT: EMIT branch-on-count vp<[[IV_NEXT_EXIT]]>, vp<[[VTC]]>
9494
; IF-EVL-NEXT: No successors
9595
; IF-EVL-NEXT: }

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