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DAG: Add DAG argument to isFPExtFoldable
For AMDGPU this is dependent on the FP mode, which should eventually not be a property of the subtarget.
1 parent a07019a commit 6221767

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4 files changed

+34
-18
lines changed

4 files changed

+34
-18
lines changed

‎llvm/include/llvm/CodeGen/TargetLowering.h‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2491,7 +2491,8 @@ class TargetLoweringBase {
24912491
/// Return true if an fpext operation input to an \p Opcode operation is free
24922492
/// (for instance, because half-precision floating-point numbers are
24932493
/// implicitly extended to float-precision) for an FMA instruction.
2494-
virtual bool isFPExtFoldable(unsigned Opcode, EVT DestVT, EVT SrcVT) const {
2494+
virtual bool isFPExtFoldable(const SelectionDAG &DAG, unsigned Opcode,
2495+
EVT DestVT, EVT SrcVT) const {
24952496
assert(DestVT.isFloatingPoint() && SrcVT.isFloatingPoint() &&
24962497
"invalid fpext types");
24972498
return isFPExtFree(DestVT, SrcVT);

‎llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp‎

Lines changed: 28 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -11390,7 +11390,8 @@ SDValue DAGCombiner::visitFADDForFMACombine(SDNode *N) {
1139011390
if (N0.getOpcode() == ISD::FP_EXTEND) {
1139111391
SDValue N00 = N0.getOperand(0);
1139211392
if (isContractableFMUL(N00) &&
11393-
TLI.isFPExtFoldable(PreferredFusedOpcode, VT, N00.getValueType())) {
11393+
TLI.isFPExtFoldable(DAG, PreferredFusedOpcode, VT,
11394+
N00.getValueType())) {
1139411395
return DAG.getNode(PreferredFusedOpcode, SL, VT,
1139511396
DAG.getNode(ISD::FP_EXTEND, SL, VT,
1139611397
N00.getOperand(0)),
@@ -11404,7 +11405,8 @@ SDValue DAGCombiner::visitFADDForFMACombine(SDNode *N) {
1140411405
if (N1.getOpcode() == ISD::FP_EXTEND) {
1140511406
SDValue N10 = N1.getOperand(0);
1140611407
if (isContractableFMUL(N10) &&
11407-
TLI.isFPExtFoldable(PreferredFusedOpcode, VT, N10.getValueType())) {
11408+
TLI.isFPExtFoldable(DAG, PreferredFusedOpcode, VT,
11409+
N10.getValueType())) {
1140811410
return DAG.getNode(PreferredFusedOpcode, SL, VT,
1140911411
DAG.getNode(ISD::FP_EXTEND, SL, VT,
1141011412
N10.getOperand(0)),
@@ -11458,7 +11460,8 @@ SDValue DAGCombiner::visitFADDForFMACombine(SDNode *N) {
1145811460
if (N02.getOpcode() == ISD::FP_EXTEND) {
1145911461
SDValue N020 = N02.getOperand(0);
1146011462
if (isContractableFMUL(N020) &&
11461-
TLI.isFPExtFoldable(PreferredFusedOpcode, VT, N020.getValueType())) {
11463+
TLI.isFPExtFoldable(DAG, PreferredFusedOpcode, VT,
11464+
N020.getValueType())) {
1146211465
return FoldFAddFMAFPExtFMul(N0.getOperand(0), N0.getOperand(1),
1146311466
N020.getOperand(0), N020.getOperand(1),
1146411467
N1, Flags);
@@ -11487,7 +11490,8 @@ SDValue DAGCombiner::visitFADDForFMACombine(SDNode *N) {
1148711490
if (N00.getOpcode() == PreferredFusedOpcode) {
1148811491
SDValue N002 = N00.getOperand(2);
1148911492
if (isContractableFMUL(N002) &&
11490-
TLI.isFPExtFoldable(PreferredFusedOpcode, VT, N00.getValueType())) {
11493+
TLI.isFPExtFoldable(DAG, PreferredFusedOpcode, VT,
11494+
N00.getValueType())) {
1149111495
return FoldFAddFPExtFMAFMul(N00.getOperand(0), N00.getOperand(1),
1149211496
N002.getOperand(0), N002.getOperand(1),
1149311497
N1, Flags);
@@ -11502,7 +11506,8 @@ SDValue DAGCombiner::visitFADDForFMACombine(SDNode *N) {
1150211506
if (N12.getOpcode() == ISD::FP_EXTEND) {
1150311507
SDValue N120 = N12.getOperand(0);
1150411508
if (isContractableFMUL(N120) &&
11505-
TLI.isFPExtFoldable(PreferredFusedOpcode, VT, N120.getValueType())) {
11509+
TLI.isFPExtFoldable(DAG, PreferredFusedOpcode, VT,
11510+
N120.getValueType())) {
1150611511
return FoldFAddFMAFPExtFMul(N1.getOperand(0), N1.getOperand(1),
1150711512
N120.getOperand(0), N120.getOperand(1),
1150811513
N0, Flags);
@@ -11520,7 +11525,8 @@ SDValue DAGCombiner::visitFADDForFMACombine(SDNode *N) {
1152011525
if (N10.getOpcode() == PreferredFusedOpcode) {
1152111526
SDValue N102 = N10.getOperand(2);
1152211527
if (isContractableFMUL(N102) &&
11523-
TLI.isFPExtFoldable(PreferredFusedOpcode, VT, N10.getValueType())) {
11528+
TLI.isFPExtFoldable(DAG, PreferredFusedOpcode, VT,
11529+
N10.getValueType())) {
1152411530
return FoldFAddFPExtFMAFMul(N10.getOperand(0), N10.getOperand(1),
1152511531
N102.getOperand(0), N102.getOperand(1),
1152611532
N0, Flags);
@@ -11610,7 +11616,8 @@ SDValue DAGCombiner::visitFSUBForFMACombine(SDNode *N) {
1161011616
if (N0.getOpcode() == ISD::FP_EXTEND) {
1161111617
SDValue N00 = N0.getOperand(0);
1161211618
if (isContractableFMUL(N00) &&
11613-
TLI.isFPExtFoldable(PreferredFusedOpcode, VT, N00.getValueType())) {
11619+
TLI.isFPExtFoldable(DAG, PreferredFusedOpcode, VT,
11620+
N00.getValueType())) {
1161411621
return DAG.getNode(PreferredFusedOpcode, SL, VT,
1161511622
DAG.getNode(ISD::FP_EXTEND, SL, VT,
1161611623
N00.getOperand(0)),
@@ -11626,7 +11633,8 @@ SDValue DAGCombiner::visitFSUBForFMACombine(SDNode *N) {
1162611633
if (N1.getOpcode() == ISD::FP_EXTEND) {
1162711634
SDValue N10 = N1.getOperand(0);
1162811635
if (isContractableFMUL(N10) &&
11629-
TLI.isFPExtFoldable(PreferredFusedOpcode, VT, N10.getValueType())) {
11636+
TLI.isFPExtFoldable(DAG, PreferredFusedOpcode, VT,
11637+
N10.getValueType())) {
1163011638
return DAG.getNode(PreferredFusedOpcode, SL, VT,
1163111639
DAG.getNode(ISD::FNEG, SL, VT,
1163211640
DAG.getNode(ISD::FP_EXTEND, SL, VT,
@@ -11648,7 +11656,8 @@ SDValue DAGCombiner::visitFSUBForFMACombine(SDNode *N) {
1164811656
if (N00.getOpcode() == ISD::FNEG) {
1164911657
SDValue N000 = N00.getOperand(0);
1165011658
if (isContractableFMUL(N000) &&
11651-
TLI.isFPExtFoldable(PreferredFusedOpcode, VT, N00.getValueType())) {
11659+
TLI.isFPExtFoldable(DAG, PreferredFusedOpcode, VT,
11660+
N00.getValueType())) {
1165211661
return DAG.getNode(ISD::FNEG, SL, VT,
1165311662
DAG.getNode(PreferredFusedOpcode, SL, VT,
1165411663
DAG.getNode(ISD::FP_EXTEND, SL, VT,
@@ -11671,7 +11680,8 @@ SDValue DAGCombiner::visitFSUBForFMACombine(SDNode *N) {
1167111680
if (N00.getOpcode() == ISD::FP_EXTEND) {
1167211681
SDValue N000 = N00.getOperand(0);
1167311682
if (isContractableFMUL(N000) &&
11674-
TLI.isFPExtFoldable(PreferredFusedOpcode, VT, N000.getValueType())) {
11683+
TLI.isFPExtFoldable(DAG, PreferredFusedOpcode, VT,
11684+
N000.getValueType())) {
1167511685
return DAG.getNode(ISD::FNEG, SL, VT,
1167611686
DAG.getNode(PreferredFusedOpcode, SL, VT,
1167711687
DAG.getNode(ISD::FP_EXTEND, SL, VT,
@@ -11722,7 +11732,8 @@ SDValue DAGCombiner::visitFSUBForFMACombine(SDNode *N) {
1172211732
if (N02.getOpcode() == ISD::FP_EXTEND) {
1172311733
SDValue N020 = N02.getOperand(0);
1172411734
if (isContractableFMUL(N020) &&
11725-
TLI.isFPExtFoldable(PreferredFusedOpcode, VT, N020.getValueType())) {
11735+
TLI.isFPExtFoldable(DAG, PreferredFusedOpcode, VT,
11736+
N020.getValueType())) {
1172611737
return DAG.getNode(PreferredFusedOpcode, SL, VT,
1172711738
N0.getOperand(0), N0.getOperand(1),
1172811739
DAG.getNode(PreferredFusedOpcode, SL, VT,
@@ -11747,7 +11758,8 @@ SDValue DAGCombiner::visitFSUBForFMACombine(SDNode *N) {
1174711758
if (N00.getOpcode() == PreferredFusedOpcode) {
1174811759
SDValue N002 = N00.getOperand(2);
1174911760
if (isContractableFMUL(N002) &&
11750-
TLI.isFPExtFoldable(PreferredFusedOpcode, VT, N00.getValueType())) {
11761+
TLI.isFPExtFoldable(DAG, PreferredFusedOpcode, VT,
11762+
N00.getValueType())) {
1175111763
return DAG.getNode(PreferredFusedOpcode, SL, VT,
1175211764
DAG.getNode(ISD::FP_EXTEND, SL, VT,
1175311765
N00.getOperand(0)),
@@ -11770,7 +11782,8 @@ SDValue DAGCombiner::visitFSUBForFMACombine(SDNode *N) {
1177011782
N1.getOperand(2).getOpcode() == ISD::FP_EXTEND) {
1177111783
SDValue N120 = N1.getOperand(2).getOperand(0);
1177211784
if (isContractableFMUL(N120) &&
11773-
TLI.isFPExtFoldable(PreferredFusedOpcode, VT, N120.getValueType())) {
11785+
TLI.isFPExtFoldable(DAG, PreferredFusedOpcode, VT,
11786+
N120.getValueType())) {
1177411787
SDValue N1200 = N120.getOperand(0);
1177511788
SDValue N1201 = N120.getOperand(1);
1177611789
return DAG.getNode(PreferredFusedOpcode, SL, VT,
@@ -11799,7 +11812,8 @@ SDValue DAGCombiner::visitFSUBForFMACombine(SDNode *N) {
1179911812
SDValue N101 = CvtSrc.getOperand(1);
1180011813
SDValue N102 = CvtSrc.getOperand(2);
1180111814
if (isContractableFMUL(N102) &&
11802-
TLI.isFPExtFoldable(PreferredFusedOpcode, VT, CvtSrc.getValueType())) {
11815+
TLI.isFPExtFoldable(DAG, PreferredFusedOpcode, VT,
11816+
CvtSrc.getValueType())) {
1180311817
SDValue N1020 = N102.getOperand(0);
1180411818
SDValue N1021 = N102.getOperand(1);
1180511819
return DAG.getNode(PreferredFusedOpcode, SL, VT,

‎llvm/lib/Target/AMDGPU/SIISelLowering.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -761,8 +761,8 @@ const GCNSubtarget *SITargetLowering::getSubtarget() const {
761761
//
762762
// There is only one special case when denormals are enabled we don't currently,
763763
// where this is OK to use.
764-
bool SITargetLowering::isFPExtFoldable(unsigned Opcode,
765-
EVT DestVT, EVT SrcVT) const {
764+
bool SITargetLowering::isFPExtFoldable(const SelectionDAG &DAG, unsigned Opcode,
765+
EVT DestVT, EVT SrcVT) const {
766766
return ((Opcode == ISD::FMAD && Subtarget->hasMadMixInsts()) ||
767767
(Opcode == ISD::FMA && Subtarget->hasFmaMixInsts())) &&
768768
DestVT.getScalarType() == MVT::f32 && !Subtarget->hasFP32Denormals() &&

‎llvm/lib/Target/AMDGPU/SIISelLowering.h‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -222,7 +222,8 @@ class SITargetLowering final : public AMDGPUTargetLowering {
222222

223223
const GCNSubtarget *getSubtarget() const;
224224

225-
bool isFPExtFoldable(unsigned Opcode, EVT DestVT, EVT SrcVT) const override;
225+
bool isFPExtFoldable(const SelectionDAG &DAG, unsigned Opcode, EVT DestVT,
226+
EVT SrcVT) const override;
226227

227228
bool isShuffleMaskLegal(ArrayRef<int> /*Mask*/, EVT /*VT*/) const override;
228229

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