Skip to content

Commit 4b932d8

Browse files
author
Chen Zheng
authored
[PowerPC] redesign the target flags (#69695)
12 bit is not enough for PPC's target specific flags. If 8 bit for the bitmask flags, 4 bit for the direct mask, PPC can total have 16 direct mask and 8 bitmask. Not enough for PPC, see this issue in #66316 Redesign how PPC target set the target specific flags. With this patch, all ppc target flags are direct flags. No bitmask flag in PPC anymore. This patch aligns with some targets like X86 which also has many target specific flags. The patch also fixes a bug related to flag `MO_TLSGDM_FLAG` and `MO_LO`. They are the same value and the test case changes in this PR shows the bug.
1 parent 0e3faa2 commit 4b932d8

File tree

12 files changed

+145
-108
lines changed

12 files changed

+145
-108
lines changed

‎llvm/lib/Target/PowerPC/PPC.h‎

Lines changed: 46 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -102,79 +102,99 @@ class ModulePass;
102102
// PPC Specific MachineOperand flags.
103103
MO_NO_FLAG,
104104

105+
/// On PPC, the 12 bits are not enough for all target operand flags.
106+
/// Treat all PPC target flags as direct flags. To define new flag that is
107+
/// combination of other flags, add new enum entry instead of combining
108+
/// existing flags. See example MO_GOT_TPREL_PCREL_FLAG.
109+
105110
/// On a symbol operand "FOO", this indicates that the reference is actually
106111
/// to "FOO@plt". This is used for calls and jumps to external functions
107112
/// and for PIC calls on 32-bit ELF systems.
108-
MO_PLT = 1,
113+
MO_PLT,
109114

110115
/// MO_PIC_FLAG - If this bit is set, the symbol reference is relative to
111116
/// the function's picbase, e.g. lo16(symbol-picbase).
112-
MO_PIC_FLAG = 2,
117+
MO_PIC_FLAG,
113118

114119
/// MO_PCREL_FLAG - If this bit is set, the symbol reference is relative to
115120
/// the current instruction address(pc), e.g., var@pcrel. Fixup is VK_PCREL.
116-
MO_PCREL_FLAG = 4,
121+
MO_PCREL_FLAG,
117122

118123
/// MO_GOT_FLAG - If this bit is set the symbol reference is to be computed
119124
/// via the GOT. For example when combined with the MO_PCREL_FLAG it should
120125
/// produce the relocation @got@pcrel. Fixup is VK_PPC_GOT_PCREL.
121-
MO_GOT_FLAG = 8,
126+
MO_GOT_FLAG,
122127

123-
// MO_PCREL_OPT_FLAG - If this bit is set the operand is part of a
124-
// PC Relative linker optimization.
125-
MO_PCREL_OPT_FLAG = 16,
128+
/// MO_PCREL_OPT_FLAG - If this bit is set the operand is part of a
129+
/// PC Relative linker optimization.
130+
MO_PCREL_OPT_FLAG,
126131

127132
/// MO_TLSGD_FLAG - If this bit is set the symbol reference is relative to
128133
/// TLS General Dynamic model for Linux and the variable offset of TLS
129134
/// General Dynamic model for AIX.
130-
MO_TLSGD_FLAG = 32,
135+
MO_TLSGD_FLAG,
131136

132137
/// MO_TPREL_FLAG - If this bit is set, the symbol reference is relative to
133138
/// the thread pointer and the symbol can be used for the TLS Initial Exec
134139
/// and Local Exec models.
135-
MO_TPREL_FLAG = 64,
140+
MO_TPREL_FLAG,
136141

137142
/// MO_TLSLD_FLAG - If this bit is set the symbol reference is relative to
138143
/// TLS Local Dynamic model.
139-
MO_TLSLD_FLAG = 128,
144+
MO_TLSLD_FLAG,
140145

141146
/// MO_TLSGDM_FLAG - If this bit is set the symbol reference is relative
142147
/// to the region handle of TLS General Dynamic model for AIX.
143-
MO_TLSGDM_FLAG = 256,
148+
MO_TLSGDM_FLAG,
144149

145150
/// MO_GOT_TLSGD_PCREL_FLAG - A combintaion of flags, if these bits are set
146151
/// they should produce the relocation @got@tlsgd@pcrel.
147152
/// Fix up is VK_PPC_GOT_TLSGD_PCREL
148-
MO_GOT_TLSGD_PCREL_FLAG = MO_PCREL_FLAG | MO_GOT_FLAG | MO_TLSGD_FLAG,
153+
/// MO_GOT_TLSGD_PCREL_FLAG = MO_PCREL_FLAG | MO_GOT_FLAG | MO_TLSGD_FLAG,
154+
MO_GOT_TLSGD_PCREL_FLAG,
149155

150156
/// MO_GOT_TLSLD_PCREL_FLAG - A combintaion of flags, if these bits are set
151157
/// they should produce the relocation @got@tlsld@pcrel.
152158
/// Fix up is VK_PPC_GOT_TLSLD_PCREL
153-
MO_GOT_TLSLD_PCREL_FLAG = MO_PCREL_FLAG | MO_GOT_FLAG | MO_TLSLD_FLAG,
159+
/// MO_GOT_TLSLD_PCREL_FLAG = MO_PCREL_FLAG | MO_GOT_FLAG | MO_TLSLD_FLAG,
160+
MO_GOT_TLSLD_PCREL_FLAG,
154161

155162
/// MO_GOT_TPREL_PCREL_FLAG - A combintaion of flags, if these bits are set
156163
/// they should produce the relocation @got@tprel@pcrel.
157164
/// Fix up is VK_PPC_GOT_TPREL_PCREL
158-
MO_GOT_TPREL_PCREL_FLAG = MO_GOT_FLAG | MO_TPREL_FLAG | MO_PCREL_FLAG,
159-
160-
/// The next are not flags but distinct values.
161-
MO_ACCESS_MASK = 0xf00,
165+
/// MO_GOT_TPREL_PCREL_FLAG = MO_GOT_FLAG | MO_TPREL_FLAG | MO_PCREL_FLAG,
166+
MO_GOT_TPREL_PCREL_FLAG,
162167

163168
/// MO_LO, MO_HA - lo16(symbol) and ha16(symbol)
164-
MO_LO = 1 << 8,
165-
MO_HA = 2 << 8,
169+
MO_LO,
170+
MO_HA,
166171

167-
MO_TPREL_LO = 4 << 8,
168-
MO_TPREL_HA = 3 << 8,
172+
MO_TPREL_LO,
173+
MO_TPREL_HA,
169174

170175
/// These values identify relocations on immediates folded
171176
/// into memory operations.
172-
MO_DTPREL_LO = 5 << 8,
173-
MO_TLSLD_LO = 6 << 8,
174-
MO_TOC_LO = 7 << 8,
177+
MO_DTPREL_LO,
178+
MO_TLSLD_LO,
179+
MO_TOC_LO,
180+
181+
/// Symbol for VK_PPC_TLS fixup attached to an ADD instruction
182+
MO_TLS,
183+
184+
/// MO_PIC_HA_FLAG = MO_PIC_FLAG | MO_HA
185+
MO_PIC_HA_FLAG,
186+
187+
/// MO_PIC_LO_FLAG = MO_PIC_FLAG | MO_LO
188+
MO_PIC_LO_FLAG,
189+
190+
/// MO_TPREL_PCREL_FLAG = MO_PCREL_FLAG | MO_TPREL_FLAG
191+
MO_TPREL_PCREL_FLAG,
192+
193+
/// MO_TPREL_PCREL_FLAG = MO_PCREL_FLAG | MO_TLS
194+
MO_TLS_PCREL_FLAG,
175195

176-
// Symbol for VK_PPC_TLS fixup attached to an ADD instruction
177-
MO_TLS = 8 << 8
196+
/// MO_GOT_PCREL_FLAG = MO_PCREL_FLAG | MO_GOT_FLAG
197+
MO_GOT_PCREL_FLAG,
178198
};
179199
} // end namespace PPCII
180200

‎llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp‎

Lines changed: 11 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -715,25 +715,11 @@ static MCSymbol *getMCSymbolForTOCPseudoMO(const MachineOperand &MO,
715715
}
716716
}
717717

718-
static bool hasTLSFlag(const MachineOperand &MO) {
719-
unsigned Flags = MO.getTargetFlags();
720-
if (Flags & PPCII::MO_TLSGD_FLAG || Flags & PPCII::MO_TPREL_FLAG ||
721-
Flags & PPCII::MO_TLSLD_FLAG || Flags & PPCII::MO_TLSGDM_FLAG)
722-
return true;
723-
724-
if (Flags == PPCII::MO_TPREL_LO || Flags == PPCII::MO_TPREL_HA ||
725-
Flags == PPCII::MO_DTPREL_LO || Flags == PPCII::MO_TLSLD_LO ||
726-
Flags == PPCII::MO_TLS)
727-
return true;
728-
729-
return false;
730-
}
731-
732718
static PPCAsmPrinter::TOCEntryType
733719
getTOCEntryTypeForMO(const MachineOperand &MO) {
734720
// Use the target flags to determine if this MO is Thread Local.
735721
// If we don't do this it comes out as Global.
736-
if (hasTLSFlag(MO))
722+
if (PPCInstrInfo::hasTLSFlag(MO.getTargetFlags()))
737723
return PPCAsmPrinter::TOCType_ThreadLocal;
738724

739725
switch (MO.getType()) {
@@ -830,7 +816,10 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) {
830816
// For TLS initial-exec and local-exec accesses on AIX, we have one TOC
831817
// entry for the symbol (with the variable offset), which is differentiated
832818
// by MO_TPREL_FLAG.
833-
if (MO.getTargetFlags() & PPCII::MO_TPREL_FLAG) {
819+
unsigned Flag = MO.getTargetFlags();
820+
if (Flag == PPCII::MO_TPREL_FLAG ||
821+
Flag == PPCII::MO_GOT_TPREL_PCREL_FLAG ||
822+
Flag == PPCII::MO_TPREL_PCREL_FLAG) {
834823
assert(MO.isGlobal() && "Only expecting a global MachineOperand here!\n");
835824
TLSModel::Model Model = TM.getTLSModel(MO.getGlobal());
836825
if (Model == TLSModel::LocalExec)
@@ -842,9 +831,9 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) {
842831
// For GD TLS access on AIX, we have two TOC entries for the symbol (one for
843832
// the variable offset and the other for the region handle). They are
844833
// differentiated by MO_TLSGD_FLAG and MO_TLSGDM_FLAG.
845-
if (MO.getTargetFlags() & PPCII::MO_TLSGDM_FLAG)
834+
if (Flag == PPCII::MO_TLSGDM_FLAG)
846835
return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGDM;
847-
if (MO.getTargetFlags() & PPCII::MO_TLSGD_FLAG)
836+
if (Flag == PPCII::MO_TLSGD_FLAG || Flag == PPCII::MO_GOT_TLSGD_PCREL_FLAG)
848837
return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGD;
849838
return MCSymbolRefExpr::VariantKind::VK_None;
850839
};
@@ -1538,8 +1527,10 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) {
15381527
// The faster non-TOC-based local-exec sequence is represented by `addi`
15391528
// with an immediate operand having the MO_TPREL_FLAG. Such an instruction
15401529
// does not otherwise arise.
1541-
const MachineOperand &MO = MI->getOperand(2);
1542-
if ((MO.getTargetFlags() & PPCII::MO_TPREL_FLAG) != 0) {
1530+
unsigned Flag = MI->getOperand(2).getTargetFlags();
1531+
if (Flag == PPCII::MO_TPREL_FLAG ||
1532+
Flag == PPCII::MO_GOT_TPREL_PCREL_FLAG ||
1533+
Flag == PPCII::MO_TPREL_PCREL_FLAG) {
15431534
assert(
15441535
Subtarget->hasAIXSmallLocalExecTLS() &&
15451536
"addi with thread-pointer only expected with local-exec small TLS");

‎llvm/lib/Target/PowerPC/PPCISelLowering.cpp‎

Lines changed: 7 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -2972,7 +2972,7 @@ bool PPCTargetLowering::SelectAddressRegRegOnly(SDValue N, SDValue &Base,
29722972

29732973
template <typename Ty> static bool isValidPCRelNode(SDValue N) {
29742974
Ty *PCRelCand = dyn_cast<Ty>(N);
2975-
return PCRelCand && (PCRelCand->getTargetFlags() & PPCII::MO_PCREL_FLAG);
2975+
return PCRelCand && (PPCInstrInfo::hasPCRelFlag(PCRelCand->getTargetFlags()));
29762976
}
29772977

29782978
/// Returns true if this address is a PC Relative address.
@@ -3133,8 +3133,8 @@ static void getLabelAccessInfo(bool IsPIC, const PPCSubtarget &Subtarget,
31333133

31343134
// Don't use the pic base if not in PIC relocation model.
31353135
if (IsPIC) {
3136-
HiOpFlags |= PPCII::MO_PIC_FLAG;
3137-
LoOpFlags |= PPCII::MO_PIC_FLAG;
3136+
HiOpFlags = PPCII::MO_PIC_HA_FLAG;
3137+
LoOpFlags = PPCII::MO_PIC_LO_FLAG;
31383138
}
31393139
}
31403140

@@ -3453,8 +3453,8 @@ SDValue PPCTargetLowering::LowerGlobalTLSAddressLinux(SDValue Op,
34533453
if (Model == TLSModel::LocalExec) {
34543454
if (Subtarget.isUsingPCRelativeCalls()) {
34553455
SDValue TLSReg = DAG.getRegister(PPC::X13, MVT::i64);
3456-
SDValue TGA = DAG.getTargetGlobalAddress(
3457-
GV, dl, PtrVT, 0, (PPCII::MO_PCREL_FLAG | PPCII::MO_TPREL_FLAG));
3456+
SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0,
3457+
PPCII::MO_TPREL_PCREL_FLAG);
34583458
SDValue MatAddr =
34593459
DAG.getNode(PPCISD::TLS_LOCAL_EXEC_MAT_ADDR, dl, PtrVT, TGA);
34603460
return DAG.getNode(PPCISD::ADD_TLS, dl, PtrVT, TLSReg, MatAddr);
@@ -3476,8 +3476,7 @@ SDValue PPCTargetLowering::LowerGlobalTLSAddressLinux(SDValue Op,
34763476
SDValue TGA = DAG.getTargetGlobalAddress(
34773477
GV, dl, PtrVT, 0, IsPCRel ? PPCII::MO_GOT_TPREL_PCREL_FLAG : 0);
34783478
SDValue TGATLS = DAG.getTargetGlobalAddress(
3479-
GV, dl, PtrVT, 0,
3480-
IsPCRel ? (PPCII::MO_TLS | PPCII::MO_PCREL_FLAG) : PPCII::MO_TLS);
3479+
GV, dl, PtrVT, 0, IsPCRel ? PPCII::MO_TLS_PCREL_FLAG : PPCII::MO_TLS);
34813480
SDValue TPOffset;
34823481
if (IsPCRel) {
34833482
SDValue MatPCRel = DAG.getNode(PPCISD::MAT_PCREL_ADDR, dl, PtrVT, TGA);
@@ -3573,8 +3572,7 @@ SDValue PPCTargetLowering::LowerGlobalAddress(SDValue Op,
35733572
EVT Ty = getPointerTy(DAG.getDataLayout());
35743573
if (isAccessedAsGotIndirect(Op)) {
35753574
SDValue GA = DAG.getTargetGlobalAddress(GV, DL, Ty, GSDN->getOffset(),
3576-
PPCII::MO_PCREL_FLAG |
3577-
PPCII::MO_GOT_FLAG);
3575+
PPCII::MO_GOT_PCREL_FLAG);
35783576
SDValue MatPCRel = DAG.getNode(PPCISD::MAT_PCREL_ADDR, DL, Ty, GA);
35793577
SDValue Load = DAG.getLoad(MVT::i64, DL, DAG.getEntryNode(), MatPCRel,
35803578
MachinePointerInfo());

‎llvm/lib/Target/PowerPC/PPCInstrInfo.cpp‎

Lines changed: 18 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -2956,27 +2956,12 @@ unsigned PPCInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const {
29562956

29572957
std::pair<unsigned, unsigned>
29582958
PPCInstrInfo::decomposeMachineOperandsTargetFlags(unsigned TF) const {
2959-
const unsigned Mask = PPCII::MO_ACCESS_MASK;
2960-
return std::make_pair(TF & Mask, TF & ~Mask);
2959+
// PPC always uses a direct mask.
2960+
return std::make_pair(TF, 0u);
29612961
}
29622962

29632963
ArrayRef<std::pair<unsigned, const char *>>
29642964
PPCInstrInfo::getSerializableDirectMachineOperandTargetFlags() const {
2965-
using namespace PPCII;
2966-
static const std::pair<unsigned, const char *> TargetFlags[] = {
2967-
{MO_LO, "ppc-lo"},
2968-
{MO_HA, "ppc-ha"},
2969-
{MO_TPREL_LO, "ppc-tprel-lo"},
2970-
{MO_TPREL_HA, "ppc-tprel-ha"},
2971-
{MO_DTPREL_LO, "ppc-dtprel-lo"},
2972-
{MO_TLSLD_LO, "ppc-tlsld-lo"},
2973-
{MO_TOC_LO, "ppc-toc-lo"},
2974-
{MO_TLS, "ppc-tls"}};
2975-
return ArrayRef(TargetFlags);
2976-
}
2977-
2978-
ArrayRef<std::pair<unsigned, const char *>>
2979-
PPCInstrInfo::getSerializableBitmaskMachineOperandTargetFlags() const {
29802965
using namespace PPCII;
29812966
static const std::pair<unsigned, const char *> TargetFlags[] = {
29822967
{MO_PLT, "ppc-plt"},
@@ -2985,12 +2970,26 @@ PPCInstrInfo::getSerializableBitmaskMachineOperandTargetFlags() const {
29852970
{MO_GOT_FLAG, "ppc-got"},
29862971
{MO_PCREL_OPT_FLAG, "ppc-opt-pcrel"},
29872972
{MO_TLSGD_FLAG, "ppc-tlsgd"},
2988-
{MO_TLSLD_FLAG, "ppc-tlsld"},
29892973
{MO_TPREL_FLAG, "ppc-tprel"},
2974+
{MO_TLSLD_FLAG, "ppc-tlsld"},
29902975
{MO_TLSGDM_FLAG, "ppc-tlsgdm"},
29912976
{MO_GOT_TLSGD_PCREL_FLAG, "ppc-got-tlsgd-pcrel"},
29922977
{MO_GOT_TLSLD_PCREL_FLAG, "ppc-got-tlsld-pcrel"},
2993-
{MO_GOT_TPREL_PCREL_FLAG, "ppc-got-tprel-pcrel"}};
2978+
{MO_GOT_TPREL_PCREL_FLAG, "ppc-got-tprel-pcrel"},
2979+
{MO_LO, "ppc-lo"},
2980+
{MO_HA, "ppc-ha"},
2981+
{MO_TPREL_LO, "ppc-tprel-lo"},
2982+
{MO_TPREL_HA, "ppc-tprel-ha"},
2983+
{MO_DTPREL_LO, "ppc-dtprel-lo"},
2984+
{MO_TLSLD_LO, "ppc-tlsld-lo"},
2985+
{MO_TOC_LO, "ppc-toc-lo"},
2986+
{MO_TLS, "ppc-tls"},
2987+
{MO_PIC_HA_FLAG, "ppc-ha-pic"},
2988+
{MO_PIC_LO_FLAG, "ppc-lo-pic"},
2989+
{MO_TPREL_PCREL_FLAG, "ppc-tprel-pcrel"},
2990+
{MO_TLS_PCREL_FLAG, "ppc-tls-pcrel"},
2991+
{MO_GOT_PCREL_FLAG, "ppc-got-pcrel"},
2992+
};
29942993
return ArrayRef(TargetFlags);
29952994
}
29962995

‎llvm/lib/Target/PowerPC/PPCInstrInfo.h‎

Lines changed: 27 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@
1414
#define LLVM_LIB_TARGET_POWERPC_PPCINSTRINFO_H
1515

1616
#include "MCTargetDesc/PPCMCTargetDesc.h"
17+
#include "PPC.h"
1718
#include "PPCRegisterInfo.h"
1819
#include "llvm/ADT/SmallSet.h"
1920
#include "llvm/CodeGen/TargetInstrInfo.h"
@@ -283,6 +284,32 @@ class PPCInstrInfo : public PPCGenInstrInfo {
283284
return false;
284285
}
285286

287+
static bool hasPCRelFlag(unsigned TF) {
288+
return TF == PPCII::MO_PCREL_FLAG || TF == PPCII::MO_GOT_TLSGD_PCREL_FLAG ||
289+
TF == PPCII::MO_GOT_TLSLD_PCREL_FLAG ||
290+
TF == PPCII::MO_GOT_TPREL_PCREL_FLAG ||
291+
TF == PPCII::MO_TPREL_PCREL_FLAG || TF == PPCII::MO_TLS_PCREL_FLAG ||
292+
TF == PPCII::MO_GOT_PCREL_FLAG;
293+
}
294+
295+
static bool hasGOTFlag(unsigned TF) {
296+
return TF == PPCII::MO_GOT_FLAG || TF == PPCII::MO_GOT_TLSGD_PCREL_FLAG ||
297+
TF == PPCII::MO_GOT_TLSLD_PCREL_FLAG ||
298+
TF == PPCII::MO_GOT_TPREL_PCREL_FLAG ||
299+
TF == PPCII::MO_GOT_PCREL_FLAG;
300+
}
301+
302+
static bool hasTLSFlag(unsigned TF) {
303+
return TF == PPCII::MO_TLSGD_FLAG || TF == PPCII::MO_TPREL_FLAG ||
304+
TF == PPCII::MO_TLSLD_FLAG || TF == PPCII::MO_TLSGDM_FLAG ||
305+
TF == PPCII::MO_GOT_TLSGD_PCREL_FLAG ||
306+
TF == PPCII::MO_GOT_TLSLD_PCREL_FLAG ||
307+
TF == PPCII::MO_GOT_TPREL_PCREL_FLAG || TF == PPCII::MO_TPREL_LO ||
308+
TF == PPCII::MO_TPREL_HA || TF == PPCII::MO_DTPREL_LO ||
309+
TF == PPCII::MO_TLSLD_LO || TF == PPCII::MO_TLS ||
310+
TF == PPCII::MO_TPREL_PCREL_FLAG || TF == PPCII::MO_TLS_PCREL_FLAG;
311+
}
312+
286313
ScheduleHazardRecognizer *
287314
CreateTargetHazardRecognizer(const TargetSubtargetInfo *STI,
288315
const ScheduleDAG *DAG) const override;
@@ -557,9 +584,6 @@ class PPCInstrInfo : public PPCGenInstrInfo {
557584
ArrayRef<std::pair<unsigned, const char *>>
558585
getSerializableDirectMachineOperandTargetFlags() const override;
559586

560-
ArrayRef<std::pair<unsigned, const char *>>
561-
getSerializableBitmaskMachineOperandTargetFlags() const override;
562-
563587
// Expand VSX Memory Pseudo instruction to either a VSX or a FP instruction.
564588
bool expandVSXMemPseudo(MachineInstr &MI) const;
565589

0 commit comments

Comments
 (0)