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[AMDGPU][NFC] Added test for live-in CSR SGPR used partially giving MachineVerifier error (#126696)
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -run-pass=si-lower-sgpr-spills %s -o /dev/null 2>&1 | FileCheck -check-prefix=VERIFIER %s
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# FIXME : Currently, MRI's liveIn check for registers does not take the corresponding live-in's sub-registers into account. As a result
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# in SILowerSGPRSpills, the SubReg spill gets marked KILLED even though its SuperReg is in the function Live-ins. This causes machine
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# verifier to now fail at direct usage of that SubReg, which intially should not be any problem before adding spill.
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# VERIFIER: After SI lower SGPR spill instructions
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# VERIFIER: *** Bad machine code: Using an undefined physical register ***
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# VERIFIER: - instruction: S_NOP 0, implicit $sgpr50
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# VERIFIER-NEXT: - operand 1: implicit $sgpr50
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# VERIFIER: *** Bad machine code: Using an undefined physical register ***
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# VERIFIER: - instruction: S_NOP 0, implicit $sgpr52
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# VERIFIER-NEXT: - operand 1: implicit $sgpr52
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# VERIFIER: *** Bad machine code: Using an undefined physical register ***
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# VERIFIER: - instruction: S_NOP 0, implicit $sgpr55
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# VERIFIER-NEXT: - operand 1: implicit $sgpr55
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# VERIFIER: LLVM ERROR: Found 3 machine code errors.
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---
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name: spill_partial_live_csr_sgpr_test
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tracksRegLiveness: true
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liveins:
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- { reg: '$sgpr50_sgpr51' }
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- { reg: '$sgpr52_sgpr53' }
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- { reg: '$sgpr54_sgpr55' }
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body: |
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bb.0:
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liveins: $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55
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S_NOP 0, implicit $sgpr50
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$sgpr50 = S_MOV_B32 0
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S_NOP 0, implicit $sgpr52
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$sgpr52_sgpr53 = S_MOV_B64 0
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S_NOP 0, implicit $sgpr55
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$sgpr54_sgpr55 = S_MOV_B64 0
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$sgpr56 = S_MOV_B32 0
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...
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