Skip to content

Commit 48935fd

Browse files
committed
add test for vop3 with dst_op_sel
1 parent 7edc140 commit 48935fd

File tree

1 file changed

+5
-0
lines changed

1 file changed

+5
-0
lines changed

llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -881,6 +881,7 @@ body: |
881881
# GCN: %6:vgpr_32 = V_ADD_I16_e64 4, %5, 0, %1, 0, 0, implicit $exec
882882
# GCN: %8:vgpr_32 = V_ADD_I16_e64 0, %7, 4, %1, 0, 0, implicit $exec
883883
# GCN: %10:vgpr_32 = V_ADD_I16_e64 4, %9, 4, %1, 0, 0, implicit $exec
884+
# GCN: %12:vgpr_32 = V_ADD_I16_e64 8, %11, 0, %1, 0, 0, implicit $exec
884885
name: opsel_vop3
885886
tracksRegLiveness: true
886887
body: |
@@ -906,6 +907,10 @@ body: |
906907
; Do not combine for op_sel:[1,1,0]
907908
%9:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 15, 15, 1, implicit $exec
908909
%10:vgpr_32 = V_ADD_I16_e64 4, %9, 4, %1, 0, 0, implicit $exec
910+
911+
; Do not combine for op_sel:[0,0,1] (dst_op_sel only)
912+
%11:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 15, 15, 1, implicit $exec
913+
%12:vgpr_32 = V_ADD_I16_e64 8, %11, 0, %1, 0, 0, implicit $exec
909914
...
910915

911916
# Check op_sel is all 0s and op_sel_hi is all 1s when combining

0 commit comments

Comments
 (0)