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fixup! rebase
1 parent b48d918 commit 3e45873

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1 file changed

+8
-48
lines changed

1 file changed

+8
-48
lines changed

llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp

Lines changed: 8 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -1308,55 +1308,15 @@ bool RISCVVLOptimizer::tryReduceVL(MachineInstr &MI) {
13081308
unsigned VLOpNum = RISCVII::getVLOpNum(MI.getDesc());
13091309
MachineOperand &VLOp = MI.getOperand(VLOpNum);
13101310

1311-
unsigned VLOpNum = RISCVII::getVLOpNum(MI.getDesc());
1312-
MachineOperand &VLOp = MI.getOperand(VLOpNum);
1313-
1314-
if (!RISCV::isVLKnownLE(*CommonVL, VLOp)) {
1315-
LLVM_DEBUG(dbgs() << " Abort due to CommonVL not <= VLOp.\n");
1316-
continue;
1317-
}
1318-
1319-
if (CommonVL->isIdenticalTo(VLOp)) {
1320-
LLVM_DEBUG(
1321-
dbgs()
1322-
<< " Abort due to CommonVL == VLOp, no point in reducing.\n");
1323-
continue;
1324-
}
1325-
1326-
if (CommonVL->isImm()) {
1327-
LLVM_DEBUG(dbgs() << " Reduce VL from " << VLOp << " to "
1328-
<< CommonVL->getImm() << " for " << MI << "\n");
1329-
VLOp.ChangeToImmediate(CommonVL->getImm());
1330-
} else {
1331-
const MachineInstr *VLMI = MRI->getVRegDef(CommonVL->getReg());
1332-
if (!MDT->dominates(VLMI, &MI))
1333-
continue;
1334-
LLVM_DEBUG(
1335-
dbgs() << " Reduce VL from " << VLOp << " to "
1336-
<< printReg(CommonVL->getReg(), MRI->getTargetRegisterInfo())
1337-
<< " for " << MI << "\n");
1338-
1339-
// All our checks passed. We can reduce VL.
1340-
VLOp.ChangeToRegister(CommonVL->getReg(), false);
1341-
}
1342-
1343-
MadeChange = true;
1344-
1345-
// Now add all inputs to this instruction to the worklist.
1346-
for (auto &Op : MI.operands()) {
1347-
if (!Op.isReg() || !Op.isUse() || !Op.getReg().isVirtual())
1348-
continue;
1349-
1350-
if (!isVectorRegClass(Op.getReg(), MRI))
1351-
continue;
1352-
1353-
MachineInstr *DefMI = MRI->getVRegDef(Op.getReg());
1354-
1355-
if (!isCandidate(*DefMI))
1356-
continue;
1311+
if (!RISCV::isVLKnownLE(*CommonVL, VLOp)) {
1312+
LLVM_DEBUG(dbgs() << " Abort due to CommonVL not <= VLOp.\n");
1313+
return false;
1314+
}
13571315

1358-
Worklist.insert(DefMI);
1359-
}
1316+
if (CommonVL->isIdenticalTo(VLOp)) {
1317+
LLVM_DEBUG(
1318+
dbgs() << " Abort due to CommonVL == VLOp, no point in reducing.\n");
1319+
return false;
13601320
}
13611321

13621322
if (CommonVL->isImm()) {

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