!fixup update test

Author: jaidTw

llvm/test/CodeGen/RISCV/shadowcallstack.ll

@@ -395,36 +395,24 @@ define void @f2_hw() "hw-shadow-stack" {
 define i32 @f3_hw() "hw-shadow-stack" {
 ; RV32-LABEL: f3_hw:
 ; RV32:       # %bb.0:
-; RV32-NEXT:    addi gp, gp, 4
-; RV32-NEXT:    sw ra, -4(gp)
-; RV32-NEXT:    .cfi_escape 0x16, 0x03, 0x02, 0x73, 0x7c #
 ; RV32-NEXT:    addi sp, sp, -16
 ; RV32-NEXT:    .cfi_def_cfa_offset 16
 ; RV32-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
 ; RV32-NEXT:    .cfi_offset ra, -4
 ; RV32-NEXT:    call bar
 ; RV32-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
 ; RV32-NEXT:    addi sp, sp, 16
-; RV32-NEXT:    lw ra, -4(gp)
-; RV32-NEXT:    addi gp, gp, -4
-; RV32-NEXT:    .cfi_restore gp
 ; RV32-NEXT:    ret
 ;
 ; RV64-LABEL: f3_hw:
 ; RV64:       # %bb.0:
-; RV64-NEXT:    addi gp, gp, 8
-; RV64-NEXT:    sd ra, -8(gp)
-; RV64-NEXT:    .cfi_escape 0x16, 0x03, 0x02, 0x73, 0x78 #
 ; RV64-NEXT:    addi sp, sp, -16
 ; RV64-NEXT:    .cfi_def_cfa_offset 16
 ; RV64-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
 ; RV64-NEXT:    .cfi_offset ra, -8
 ; RV64-NEXT:    call bar
 ; RV64-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
 ; RV64-NEXT:    addi sp, sp, 16
-; RV64-NEXT:    ld ra, -8(gp)
-; RV64-NEXT:    addi gp, gp, -8
-; RV64-NEXT:    .cfi_restore gp
 ; RV64-NEXT:    ret
 ;
 ; RV32-ZICFISS-LABEL: f3_hw:
@@ -460,9 +448,6 @@ define i32 @f3_hw() "hw-shadow-stack" {
 define i32 @f4_hw() "hw-shadow-stack" {
 ; RV32-LABEL: f4_hw:
 ; RV32:       # %bb.0:
-; RV32-NEXT:    addi gp, gp, 4
-; RV32-NEXT:    sw ra, -4(gp)
-; RV32-NEXT:    .cfi_escape 0x16, 0x03, 0x02, 0x73, 0x7c #
 ; RV32-NEXT:    addi sp, sp, -16
 ; RV32-NEXT:    .cfi_def_cfa_offset 16
 ; RV32-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
@@ -488,16 +473,10 @@ define i32 @f4_hw() "hw-shadow-stack" {
 ; RV32-NEXT:    lw s1, 4(sp) # 4-byte Folded Reload
 ; RV32-NEXT:    lw s2, 0(sp) # 4-byte Folded Reload
 ; RV32-NEXT:    addi sp, sp, 16
-; RV32-NEXT:    lw ra, -4(gp)
-; RV32-NEXT:    addi gp, gp, -4
-; RV32-NEXT:    .cfi_restore gp
 ; RV32-NEXT:    ret
 ;
 ; RV64-LABEL: f4_hw:
 ; RV64:       # %bb.0:
-; RV64-NEXT:    addi gp, gp, 8
-; RV64-NEXT:    sd ra, -8(gp)
-; RV64-NEXT:    .cfi_escape 0x16, 0x03, 0x02, 0x73, 0x78 #
 ; RV64-NEXT:    addi sp, sp, -32
 ; RV64-NEXT:    .cfi_def_cfa_offset 32
 ; RV64-NEXT:    sd ra, 24(sp) # 8-byte Folded Spill
@@ -523,9 +502,6 @@ define i32 @f4_hw() "hw-shadow-stack" {
 ; RV64-NEXT:    ld s1, 8(sp) # 8-byte Folded Reload
 ; RV64-NEXT:    ld s2, 0(sp) # 8-byte Folded Reload
 ; RV64-NEXT:    addi sp, sp, 32
-; RV64-NEXT:    ld ra, -8(gp)
-; RV64-NEXT:    addi gp, gp, -8
-; RV64-NEXT:    .cfi_restore gp
 ; RV64-NEXT:    ret
 ;
 ; RV32-ZICFISS-LABEL: f4_hw:
@@ -602,28 +578,20 @@ define i32 @f4_hw() "hw-shadow-stack" {
 define i32 @f5_hw() "hw-shadow-stack" nounwind {
 ; RV32-LABEL: f5_hw:
 ; RV32:       # %bb.0:
-; RV32-NEXT:    addi gp, gp, 4
-; RV32-NEXT:    sw ra, -4(gp)
 ; RV32-NEXT:    addi sp, sp, -16
 ; RV32-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
 ; RV32-NEXT:    call bar
 ; RV32-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
 ; RV32-NEXT:    addi sp, sp, 16
-; RV32-NEXT:    lw ra, -4(gp)
-; RV32-NEXT:    addi gp, gp, -4
 ; RV32-NEXT:    ret
 ;
 ; RV64-LABEL: f5_hw:
 ; RV64:       # %bb.0:
-; RV64-NEXT:    addi gp, gp, 8
-; RV64-NEXT:    sd ra, -8(gp)
 ; RV64-NEXT:    addi sp, sp, -16
 ; RV64-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
 ; RV64-NEXT:    call bar
 ; RV64-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
 ; RV64-NEXT:    addi sp, sp, 16
-; RV64-NEXT:    ld ra, -8(gp)
-; RV64-NEXT:    addi gp, gp, -8
 ; RV64-NEXT:    ret
 ;
 ; RV32-ZICFISS-LABEL: f5_hw: