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egorshamshuraegorshamshura
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Added opt.
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+39
-23
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3 files changed

+39
-23
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‎llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp‎

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2470,6 +2470,19 @@ Instruction *InstCombinerImpl::visitAnd(BinaryOperator &I) {
24702470
return SelectInst::Create(Cmp, ConstantInt::getNullValue(Ty), Y);
24712471
}
24722472

2473+
// (x + y) & (2^C) -> x & 2^C when y % 2^(C+1) == 0
2474+
if (match(Op0, m_Add(m_Value(X), m_Value(Y)))) {
2475+
const APInt *PowerC;
2476+
if (match(Op1, m_Power2(PowerC)) && !PowerC->isOne()) {
2477+
KnownBits YKnown = computeKnownBits(Y, &I);
2478+
2479+
APInt YMod = YKnown.Zero;
2480+
if (YMod.countTrailingZeros() > PowerC->logBase2() + 1) {
2481+
return BinaryOperator::CreateAnd(X, Op1);
2482+
}
2483+
}
2484+
}
2485+
24732486
// Canonicalize:
24742487
// (X +/- Y) & Y --> ~X & Y when Y is a power of 2.
24752488
if (match(&I, m_c_And(m_Value(Y), m_OneUse(m_CombineOr(

‎llvm/test/Transforms/InstCombine/redundant-add-in-and.ll‎

Lines changed: 5 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -6,11 +6,8 @@ define i1 @addition_and_bitwise1(ptr %0) {
66
; CHECK-SAME: ptr [[TMP0:%.*]]) {
77
; CHECK-NEXT: [[V0:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP0]], i64 4
88
; CHECK-NEXT: [[V1:%.*]] = load i32, ptr [[V0]], align 4
9-
; CHECK-NEXT: [[V2:%.*]] = zext i32 [[V1]] to i64
10-
; CHECK-NEXT: [[V3:%.*]] = ptrtoint ptr [[V0]] to i64
11-
; CHECK-NEXT: [[V4:%.*]] = add i64 [[V2]], [[V3]]
12-
; CHECK-NEXT: [[V5:%.*]] = and i64 [[V4]], 2
13-
; CHECK-NEXT: [[V6:%.*]] = icmp eq i64 [[V5]], 0
9+
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[V1]], 2
10+
; CHECK-NEXT: [[V6:%.*]] = icmp eq i32 [[TMP2]], 0
1411
; CHECK-NEXT: ret i1 [[V6]]
1512
;
1613
%v0 = getelementptr inbounds nuw i8, ptr %0, i64 4
@@ -28,11 +25,8 @@ define i1 @addition_and_bitwise2(ptr %0) {
2825
; CHECK-SAME: ptr [[TMP0:%.*]]) {
2926
; CHECK-NEXT: [[V0:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP0]], i64 4
3027
; CHECK-NEXT: [[V1:%.*]] = load i32, ptr [[V0]], align 16
31-
; CHECK-NEXT: [[V2:%.*]] = zext i32 [[V1]] to i64
32-
; CHECK-NEXT: [[V3:%.*]] = ptrtoint ptr [[V0]] to i64
33-
; CHECK-NEXT: [[V4:%.*]] = add i64 [[V2]], [[V3]]
34-
; CHECK-NEXT: [[V5:%.*]] = and i64 [[V4]], 4
35-
; CHECK-NEXT: [[V6:%.*]] = icmp eq i64 [[V5]], 0
28+
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[V1]], 4
29+
; CHECK-NEXT: [[V6:%.*]] = icmp eq i32 [[TMP2]], 0
3630
; CHECK-NEXT: ret i1 [[V6]]
3731
;
3832
%v0 = getelementptr inbounds nuw i8, ptr %0, i64 4
@@ -49,11 +43,8 @@ define i1 @addition_and_bitwise3(ptr %0) {
4943
; CHECK-LABEL: define i1 @addition_and_bitwise3(
5044
; CHECK-SAME: ptr [[TMP0:%.*]]) {
5145
; CHECK-NEXT: [[V0:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP0]], i64 4
52-
; CHECK-NEXT: [[V1:%.*]] = load i32, ptr [[V0]], align 16
53-
; CHECK-NEXT: [[V2:%.*]] = zext i32 [[V1]] to i64
5446
; CHECK-NEXT: [[V3:%.*]] = ptrtoint ptr [[V0]] to i64
55-
; CHECK-NEXT: [[V4:%.*]] = add i64 [[V3]], [[V2]]
56-
; CHECK-NEXT: [[V5:%.*]] = and i64 [[V4]], 4
47+
; CHECK-NEXT: [[V5:%.*]] = and i64 [[V3]], 4
5748
; CHECK-NEXT: [[V6:%.*]] = icmp eq i64 [[V5]], 0
5849
; CHECK-NEXT: ret i1 [[V6]]
5950
;

‎llvm/test/Transforms/LoopVectorize/induction.ll‎

Lines changed: 21 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -4274,10 +4274,14 @@ define void @trunciv(ptr nocapture %a, i32 %start, i64 %k) {
42744274
; IND-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[K:%.*]], 2
42754275
; IND-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]
42764276
; IND: vector.scevcheck:
4277-
; IND-NEXT: [[DOTNOT:%.*]] = icmp ult i64 [[K]], 2147483649
4278-
; IND-NEXT: br i1 [[DOTNOT]], label [[VECTOR_PH:%.*]], label [[SCALAR_PH]]
4277+
; IND-NEXT: [[TMP5:%.*]] = and i64 [[K]], 2147483648
4278+
; IND-NEXT: [[TMP6:%.*]] = icmp ne i64 [[TMP5]], 0
4279+
; IND-NEXT: [[TMP7:%.*]] = add i64 [[K]], -4294967297
4280+
; IND-NEXT: [[TMP8:%.*]] = icmp ult i64 [[TMP7]], -4294967296
4281+
; IND-NEXT: [[TMP4:%.*]] = or i1 [[TMP6]], [[TMP8]]
4282+
; IND-NEXT: br i1 [[TMP4]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
42794283
; IND: vector.ph:
4280-
; IND-NEXT: [[N_VEC:%.*]] = and i64 [[K]], 4294967294
4284+
; IND-NEXT: [[N_VEC:%.*]] = and i64 [[K]], 6442450942
42814285
; IND-NEXT: br label [[VECTOR_BODY:%.*]]
42824286
; IND: vector.body:
42834287
; IND-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
@@ -4314,10 +4318,14 @@ define void @trunciv(ptr nocapture %a, i32 %start, i64 %k) {
43144318
; UNROLL-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[K:%.*]], 4
43154319
; UNROLL-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]
43164320
; UNROLL: vector.scevcheck:
4317-
; UNROLL-NEXT: [[DOTNOT:%.*]] = icmp ult i64 [[K]], 2147483649
4318-
; UNROLL-NEXT: br i1 [[DOTNOT]], label [[VECTOR_PH:%.*]], label [[SCALAR_PH]]
4321+
; UNROLL-NEXT: [[TMP5:%.*]] = and i64 [[K]], 2147483648
4322+
; UNROLL-NEXT: [[TMP6:%.*]] = icmp ne i64 [[TMP5]], 0
4323+
; UNROLL-NEXT: [[TMP7:%.*]] = add i64 [[K]], -4294967297
4324+
; UNROLL-NEXT: [[TMP8:%.*]] = icmp ult i64 [[TMP7]], -4294967296
4325+
; UNROLL-NEXT: [[TMP9:%.*]] = or i1 [[TMP6]], [[TMP8]]
4326+
; UNROLL-NEXT: br i1 [[TMP9]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
43194327
; UNROLL: vector.ph:
4320-
; UNROLL-NEXT: [[N_VEC:%.*]] = and i64 [[K]], 4294967292
4328+
; UNROLL-NEXT: [[N_VEC:%.*]] = and i64 [[K]], 6442450940
43214329
; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]]
43224330
; UNROLL: vector.body:
43234331
; UNROLL-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
@@ -4402,10 +4410,14 @@ define void @trunciv(ptr nocapture %a, i32 %start, i64 %k) {
44024410
; INTERLEAVE-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[K:%.*]], 8
44034411
; INTERLEAVE-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]
44044412
; INTERLEAVE: vector.scevcheck:
4405-
; INTERLEAVE-NEXT: [[DOTNOT:%.*]] = icmp ult i64 [[K]], 2147483649
4406-
; INTERLEAVE-NEXT: br i1 [[DOTNOT]], label [[VECTOR_PH:%.*]], label [[SCALAR_PH]]
4413+
; INTERLEAVE-NEXT: [[TMP5:%.*]] = and i64 [[K]], 2147483648
4414+
; INTERLEAVE-NEXT: [[TMP6:%.*]] = icmp ne i64 [[TMP5]], 0
4415+
; INTERLEAVE-NEXT: [[TMP7:%.*]] = add i64 [[K]], -4294967297
4416+
; INTERLEAVE-NEXT: [[TMP8:%.*]] = icmp ult i64 [[TMP7]], -4294967296
4417+
; INTERLEAVE-NEXT: [[TMP9:%.*]] = or i1 [[TMP6]], [[TMP8]]
4418+
; INTERLEAVE-NEXT: br i1 [[TMP9]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
44074419
; INTERLEAVE: vector.ph:
4408-
; INTERLEAVE-NEXT: [[N_VEC:%.*]] = and i64 [[K]], 4294967288
4420+
; INTERLEAVE-NEXT: [[N_VEC:%.*]] = and i64 [[K]], 6442450936
44094421
; INTERLEAVE-NEXT: br label [[VECTOR_BODY:%.*]]
44104422
; INTERLEAVE: vector.body:
44114423
; INTERLEAVE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]

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