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#include " llvm/CodeGen/LiveIntervals.h"
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#include " llvm/CodeGen/LiveRangeEdit.h"
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#include " llvm/CodeGen/MachineBasicBlock.h"
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+ #include " llvm/CodeGen/MachineDominators.h"
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#include " llvm/CodeGen/MachineFunction.h"
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#include " llvm/CodeGen/MachineFunctionPass.h"
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#include " llvm/CodeGen/MachineInstr.h"
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#include " llvm/CodeGen/MachineInstrBuilder.h"
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#include " llvm/CodeGen/MachineLoopInfo.h"
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#include " llvm/CodeGen/MachineOperand.h"
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+ #include " llvm/CodeGen/MachinePassManager.h"
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#include " llvm/CodeGen/MachineRegisterInfo.h"
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#include " llvm/CodeGen/Passes.h"
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#include " llvm/CodeGen/RegisterClassInfo.h"
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+ #include " llvm/CodeGen/RegisterCoalescerPass.h"
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#include " llvm/CodeGen/SlotIndexes.h"
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#include " llvm/CodeGen/TargetInstrInfo.h"
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#include " llvm/CodeGen/TargetOpcodes.h"
@@ -122,15 +125,14 @@ namespace {
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class JoinVals ;
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- class RegisterCoalescer : public MachineFunctionPass ,
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- private LiveRangeEdit::Delegate {
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+ class RegisterCoalescer : private LiveRangeEdit ::Delegate {
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MachineFunction *MF = nullptr ;
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MachineRegisterInfo *MRI = nullptr ;
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const TargetRegisterInfo *TRI = nullptr ;
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const TargetInstrInfo *TII = nullptr ;
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LiveIntervals *LIS = nullptr ;
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+ SlotIndexes *SI = nullptr ;
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const MachineLoopInfo *Loops = nullptr ;
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- AliasAnalysis *AA = nullptr ;
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RegisterClassInfo RegClassInfo;
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// / Position and VReg of a PHI instruction during coalescing.
@@ -378,11 +380,24 @@ class RegisterCoalescer : public MachineFunctionPass,
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void checkMergingChangesDbgValuesImpl (Register Reg, LiveRange &OtherRange,
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LiveRange &RegRange, JoinVals &Vals2);
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+ public:
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+ RegisterCoalescer (LiveIntervals *LIS, SlotIndexes *SI,
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+ const MachineLoopInfo *Loops)
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+ : LIS(LIS), SI(SI), Loops(Loops) {}
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+
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+ void releaseMemory ();
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+ void print (raw_ostream &O, const Module * = nullptr ) const ;
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+ bool run (MachineFunction &MF);
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+ };
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+
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+ class RegisterCoalescerLegacy : public MachineFunctionPass {
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+ std::unique_ptr<RegisterCoalescer> Impl;
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+
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public:
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static char ID; // /< Class identification, replacement for typeinfo
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- RegisterCoalescer () : MachineFunctionPass(ID) {
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- initializeRegisterCoalescerPass (*PassRegistry::getPassRegistry ());
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+ RegisterCoalescerLegacy () : MachineFunctionPass(ID) {
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+ initializeRegisterCoalescerLegacyPass (*PassRegistry::getPassRegistry ());
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}
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void getAnalysisUsage (AnalysisUsage &AU) const override ;
@@ -392,28 +407,30 @@ class RegisterCoalescer : public MachineFunctionPass,
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MachineFunctionProperties::Property::IsSSA);
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}
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- void releaseMemory () override ;
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+ void releaseMemory () override { Impl-> releaseMemory (); }
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// / This is the pass entry point.
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bool runOnMachineFunction (MachineFunction &) override ;
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// / Implement the dump method.
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- void print (raw_ostream &O, const Module * = nullptr ) const override ;
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+ void print (raw_ostream &O, const Module * = nullptr ) const override {
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+ Impl->print (O, nullptr );
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+ }
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};
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} // end anonymous namespace
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- char RegisterCoalescer ::ID = 0 ;
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+ char RegisterCoalescerLegacy ::ID = 0 ;
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- char &llvm::RegisterCoalescerID = RegisterCoalescer ::ID;
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+ char &llvm::RegisterCoalescerID = RegisterCoalescerLegacy ::ID;
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- INITIALIZE_PASS_BEGIN (RegisterCoalescer , " register-coalescer" ,
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+ INITIALIZE_PASS_BEGIN (RegisterCoalescerLegacy , " register-coalescer" ,
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" Register Coalescer" , false , false )
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INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
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INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass)
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INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
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INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
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- INITIALIZE_PASS_END(RegisterCoalescer , " register-coalescer" ,
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+ INITIALIZE_PASS_END(RegisterCoalescerLegacy , " register-coalescer" ,
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" Register Coalescer" , false , false )
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[[nodiscard]] static bool isMoveInstr(const TargetRegisterInfo &tri,
@@ -590,8 +607,9 @@ bool CoalescerPair::isCoalescable(const MachineInstr *MI) const {
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}
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}
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- void RegisterCoalescer ::getAnalysisUsage (AnalysisUsage &AU) const {
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+ void RegisterCoalescerLegacy ::getAnalysisUsage (AnalysisUsage &AU) const {
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AU.setPreservesCFG ();
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+ AU.addUsedIfAvailable <SlotIndexesWrapperPass>();
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AU.addRequired <AAResultsWrapperPass>();
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AU.addRequired <LiveIntervalsWrapperPass>();
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AU.addPreserved <LiveIntervalsWrapperPass>();
@@ -4290,7 +4308,33 @@ void RegisterCoalescer::releaseMemory() {
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LargeLIVisitCounter.clear ();
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}
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- bool RegisterCoalescer::runOnMachineFunction (MachineFunction &fn) {
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+ PreservedAnalyses
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+ RegisterCoalescerPass::run (MachineFunction &MF,
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+ MachineFunctionAnalysisManager &MFAM) {
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+ auto &LIS = MFAM.getResult <LiveIntervalsAnalysis>(MF);
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+ auto &Loops = MFAM.getResult <MachineLoopAnalysis>(MF);
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+ auto *SI = MFAM.getCachedResult <SlotIndexesAnalysis>(MF);
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+ RegisterCoalescer Impl (&LIS, SI, &Loops);
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+ if (!Impl.run (MF))
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+ return PreservedAnalyses::all ();
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+ auto PA = getMachineFunctionPassPreservedAnalyses ();
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+ PA.preserve <LiveIntervalsAnalysis>();
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+ PA.preserve <SlotIndexesAnalysis>();
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+ PA.preserve <MachineLoopAnalysis>();
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+ PA.preserve <MachineDominatorTreeAnalysis>();
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+ return PA;
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+ }
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+
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+ bool RegisterCoalescerLegacy::runOnMachineFunction (MachineFunction &MF) {
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+ auto *LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS ();
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+ auto *Loops = &getAnalysis<MachineLoopInfoWrapperPass>().getLI ();
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+ auto *SIWrapper = getAnalysisIfAvailable<SlotIndexesWrapperPass>();
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+ SlotIndexes *SI = SIWrapper ? &SIWrapper->getSI () : nullptr ;
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+ Impl.reset (new RegisterCoalescer (LIS, SI, Loops));
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+ return Impl->run (MF);
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+ }
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+
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+ bool RegisterCoalescer::run (MachineFunction &fn) {
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LLVM_DEBUG (dbgs () << " ********** REGISTER COALESCER **********\n "
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<< " ********** Function: " << fn.getName () << ' \n ' );
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@@ -4313,9 +4357,6 @@ bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) {
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const TargetSubtargetInfo &STI = fn.getSubtarget ();
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TRI = STI.getRegisterInfo ();
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TII = STI.getInstrInfo ();
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- LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS ();
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- AA = &getAnalysis<AAResultsWrapperPass>().getAAResults ();
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- Loops = &getAnalysis<MachineLoopInfoWrapperPass>().getLI ();
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if (EnableGlobalCopies == cl::BOU_UNSET)
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JoinGlobalCopies = STI.enableJoinGlobalCopies ();
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else
@@ -4340,7 +4381,7 @@ bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) {
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JoinSplitEdges = EnableJoinSplits;
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if (VerifyCoalescing)
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- MF->verify (this , " Before register coalescing" , &errs ());
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+ MF->verify (LIS, SI , " Before register coalescing" , &errs ());
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DbgVRegToValues.clear ();
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buildVRegToDbgValueMap (fn);
@@ -4398,9 +4439,9 @@ bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) {
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PHIValToPos.clear ();
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RegToPHIIdx.clear ();
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- LLVM_DEBUG (dump ( ));
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+ LLVM_DEBUG (print ( dbgs (), nullptr ));
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if (VerifyCoalescing)
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- MF->verify (this , " After register coalescing" , &errs ());
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+ MF->verify (LIS, SI , " After register coalescing" , &errs ());
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return true ;
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}
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