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[GISel][RISCV] Use isSExtCheaperThanZExt when widening G_ICMP. (#120032)
Sign extending i32->i64 is more efficient than zero extend for RV64.
1 parent 62cd735 commit 1158729

16 files changed

+163
-250
lines changed

‎llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp

Lines changed: 11 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -3077,10 +3077,17 @@ LegalizerHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy) {
30773077
if (TypeIdx == 0)
30783078
widenScalarDst(MI, WideTy);
30793079
else {
3080-
unsigned ExtOpcode = CmpInst::isSigned(static_cast<CmpInst::Predicate>(
3081-
MI.getOperand(1).getPredicate()))
3082-
? TargetOpcode::G_SEXT
3083-
: TargetOpcode::G_ZEXT;
3080+
LLT SrcTy = MRI.getType(MI.getOperand(2).getReg());
3081+
CmpInst::Predicate Pred =
3082+
static_cast<CmpInst::Predicate>(MI.getOperand(1).getPredicate());
3083+
3084+
auto &Ctx = MIRBuilder.getMF().getFunction().getContext();
3085+
unsigned ExtOpcode =
3086+
(CmpInst::isSigned(Pred) ||
3087+
TLI.isSExtCheaperThanZExt(getApproximateEVTForLLT(SrcTy, Ctx),
3088+
getApproximateEVTForLLT(WideTy, Ctx)))
3089+
? TargetOpcode::G_SEXT
3090+
: TargetOpcode::G_ZEXT;
30843091
widenScalarSrc(MI, WideTy, 2, ExtOpcode);
30853092
widenScalarSrc(MI, WideTy, 3, ExtOpcode);
30863093
}

‎llvm/test/CodeGen/RISCV/GlobalISel/double-arith.ll

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -215,8 +215,7 @@ define i32 @fneg_d(double %a, double %b) nounwind {
215215
; RV64I-NEXT: slli a1, a1, 63
216216
; RV64I-NEXT: xor a1, a0, a1
217217
; RV64I-NEXT: call __eqdf2
218-
; RV64I-NEXT: slli a0, a0, 32
219-
; RV64I-NEXT: srli a0, a0, 32
218+
; RV64I-NEXT: sext.w a0, a0
220219
; RV64I-NEXT: seqz a0, a0
221220
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
222221
; RV64I-NEXT: addi sp, sp, 16

‎llvm/test/CodeGen/RISCV/GlobalISel/double-convert.ll

Lines changed: 9 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -117,25 +117,14 @@ define i32 @fcvt_wu_d(double %a) nounwind {
117117
}
118118

119119
define i32 @fcvt_wu_d_multiple_use(double %x, ptr %y) nounwind {
120-
; RV32IFD-LABEL: fcvt_wu_d_multiple_use:
121-
; RV32IFD: # %bb.0:
122-
; RV32IFD-NEXT: fcvt.wu.d a0, fa0, rtz
123-
; RV32IFD-NEXT: bnez a0, .LBB4_2
124-
; RV32IFD-NEXT: # %bb.1:
125-
; RV32IFD-NEXT: li a0, 1
126-
; RV32IFD-NEXT: .LBB4_2:
127-
; RV32IFD-NEXT: ret
128-
;
129-
; RV64IFD-LABEL: fcvt_wu_d_multiple_use:
130-
; RV64IFD: # %bb.0:
131-
; RV64IFD-NEXT: fcvt.wu.d a0, fa0, rtz
132-
; RV64IFD-NEXT: slli a1, a0, 32
133-
; RV64IFD-NEXT: srli a1, a1, 32
134-
; RV64IFD-NEXT: bnez a1, .LBB4_2
135-
; RV64IFD-NEXT: # %bb.1:
136-
; RV64IFD-NEXT: li a0, 1
137-
; RV64IFD-NEXT: .LBB4_2:
138-
; RV64IFD-NEXT: ret
120+
; CHECKIFD-LABEL: fcvt_wu_d_multiple_use:
121+
; CHECKIFD: # %bb.0:
122+
; CHECKIFD-NEXT: fcvt.wu.d a0, fa0, rtz
123+
; CHECKIFD-NEXT: bnez a0, .LBB4_2
124+
; CHECKIFD-NEXT: # %bb.1:
125+
; CHECKIFD-NEXT: li a0, 1
126+
; CHECKIFD-NEXT: .LBB4_2:
127+
; CHECKIFD-NEXT: ret
139128
;
140129
; RV32I-LABEL: fcvt_wu_d_multiple_use:
141130
; RV32I: # %bb.0:
@@ -155,8 +144,7 @@ define i32 @fcvt_wu_d_multiple_use(double %x, ptr %y) nounwind {
155144
; RV64I-NEXT: addi sp, sp, -16
156145
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
157146
; RV64I-NEXT: call __fixunsdfsi
158-
; RV64I-NEXT: slli a1, a0, 32
159-
; RV64I-NEXT: srli a1, a1, 32
147+
; RV64I-NEXT: sext.w a1, a0
160148
; RV64I-NEXT: bnez a1, .LBB4_2
161149
; RV64I-NEXT: # %bb.1:
162150
; RV64I-NEXT: li a0, 1

‎llvm/test/CodeGen/RISCV/GlobalISel/double-fcmp.ll

Lines changed: 14 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -28,7 +28,7 @@ define i32 @fcmp_false(double %a, double %b) nounwind {
2828
ret i32 %2
2929
}
3030

31-
; FIXME: slli+srli on RV64 are unnecessary
31+
; FIXME: slli+srli on RV64 are unnecessary
3232
define i32 @fcmp_oeq(double %a, double %b) nounwind {
3333
; CHECKIFD-LABEL: fcmp_oeq:
3434
; CHECKIFD: # %bb.0:
@@ -50,8 +50,7 @@ define i32 @fcmp_oeq(double %a, double %b) nounwind {
5050
; RV64I-NEXT: addi sp, sp, -16
5151
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
5252
; RV64I-NEXT: call __eqdf2
53-
; RV64I-NEXT: slli a0, a0, 32
54-
; RV64I-NEXT: srli a0, a0, 32
53+
; RV64I-NEXT: sext.w a0, a0
5554
; RV64I-NEXT: seqz a0, a0
5655
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
5756
; RV64I-NEXT: addi sp, sp, 16
@@ -194,7 +193,7 @@ define i32 @fcmp_ole(double %a, double %b) nounwind {
194193
ret i32 %2
195194
}
196195

197-
; FIXME: slli+srli on RV64 are unnecessary
196+
; FIXME: slli+srli on RV64 are unnecessary
198197
define i32 @fcmp_one(double %a, double %b) nounwind {
199198
; CHECKIFD-LABEL: fcmp_one:
200199
; CHECKIFD: # %bb.0:
@@ -244,14 +243,12 @@ define i32 @fcmp_one(double %a, double %b) nounwind {
244243
; RV64I-NEXT: mv s0, a0
245244
; RV64I-NEXT: mv s1, a1
246245
; RV64I-NEXT: call __eqdf2
247-
; RV64I-NEXT: slli a0, a0, 32
248-
; RV64I-NEXT: srli a0, a0, 32
246+
; RV64I-NEXT: sext.w a0, a0
249247
; RV64I-NEXT: snez s2, a0
250248
; RV64I-NEXT: mv a0, s0
251249
; RV64I-NEXT: mv a1, s1
252250
; RV64I-NEXT: call __unorddf2
253-
; RV64I-NEXT: slli a0, a0, 32
254-
; RV64I-NEXT: srli a0, a0, 32
251+
; RV64I-NEXT: sext.w a0, a0
255252
; RV64I-NEXT: seqz a0, a0
256253
; RV64I-NEXT: and a0, s2, a0
257254
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
@@ -265,7 +262,7 @@ define i32 @fcmp_one(double %a, double %b) nounwind {
265262
ret i32 %2
266263
}
267264

268-
; FIXME: slli+srli on RV64 are unnecessary
265+
; FIXME: slli+srli on RV64 are unnecessary
269266
define i32 @fcmp_ord(double %a, double %b) nounwind {
270267
; CHECKIFD-LABEL: fcmp_ord:
271268
; CHECKIFD: # %bb.0:
@@ -289,8 +286,7 @@ define i32 @fcmp_ord(double %a, double %b) nounwind {
289286
; RV64I-NEXT: addi sp, sp, -16
290287
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
291288
; RV64I-NEXT: call __unorddf2
292-
; RV64I-NEXT: slli a0, a0, 32
293-
; RV64I-NEXT: srli a0, a0, 32
289+
; RV64I-NEXT: sext.w a0, a0
294290
; RV64I-NEXT: seqz a0, a0
295291
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
296292
; RV64I-NEXT: addi sp, sp, 16
@@ -300,7 +296,7 @@ define i32 @fcmp_ord(double %a, double %b) nounwind {
300296
ret i32 %2
301297
}
302298

303-
; FIXME: slli+srli on RV64 are unnecessary
299+
; FIXME: slli+srli on RV64 are unnecessary
304300
define i32 @fcmp_ueq(double %a, double %b) nounwind {
305301
; CHECKIFD-LABEL: fcmp_ueq:
306302
; CHECKIFD: # %bb.0:
@@ -351,14 +347,12 @@ define i32 @fcmp_ueq(double %a, double %b) nounwind {
351347
; RV64I-NEXT: mv s0, a0
352348
; RV64I-NEXT: mv s1, a1
353349
; RV64I-NEXT: call __eqdf2
354-
; RV64I-NEXT: slli a0, a0, 32
355-
; RV64I-NEXT: srli a0, a0, 32
350+
; RV64I-NEXT: sext.w a0, a0
356351
; RV64I-NEXT: seqz s2, a0
357352
; RV64I-NEXT: mv a0, s0
358353
; RV64I-NEXT: mv a1, s1
359354
; RV64I-NEXT: call __unorddf2
360-
; RV64I-NEXT: slli a0, a0, 32
361-
; RV64I-NEXT: srli a0, a0, 32
355+
; RV64I-NEXT: sext.w a0, a0
362356
; RV64I-NEXT: snez a0, a0
363357
; RV64I-NEXT: or a0, s2, a0
364358
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
@@ -508,7 +502,7 @@ define i32 @fcmp_ule(double %a, double %b) nounwind {
508502
ret i32 %2
509503
}
510504

511-
; FIXME: slli+srli on RV64 are unnecessary
505+
; FIXME: slli+srli on RV64 are unnecessary
512506
define i32 @fcmp_une(double %a, double %b) nounwind {
513507
; CHECKIFD-LABEL: fcmp_une:
514508
; CHECKIFD: # %bb.0:
@@ -531,8 +525,7 @@ define i32 @fcmp_une(double %a, double %b) nounwind {
531525
; RV64I-NEXT: addi sp, sp, -16
532526
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
533527
; RV64I-NEXT: call __nedf2
534-
; RV64I-NEXT: slli a0, a0, 32
535-
; RV64I-NEXT: srli a0, a0, 32
528+
; RV64I-NEXT: sext.w a0, a0
536529
; RV64I-NEXT: snez a0, a0
537530
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
538531
; RV64I-NEXT: addi sp, sp, 16
@@ -542,7 +535,7 @@ define i32 @fcmp_une(double %a, double %b) nounwind {
542535
ret i32 %2
543536
}
544537

545-
; FIXME: slli+srli on RV64 are unnecessary
538+
; FIXME: slli+srli on RV64 are unnecessary
546539
define i32 @fcmp_uno(double %a, double %b) nounwind {
547540
; CHECKIFD-LABEL: fcmp_uno:
548541
; CHECKIFD: # %bb.0:
@@ -567,8 +560,7 @@ define i32 @fcmp_uno(double %a, double %b) nounwind {
567560
; RV64I-NEXT: addi sp, sp, -16
568561
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
569562
; RV64I-NEXT: call __unorddf2
570-
; RV64I-NEXT: slli a0, a0, 32
571-
; RV64I-NEXT: srli a0, a0, 32
563+
; RV64I-NEXT: sext.w a0, a0
572564
; RV64I-NEXT: snez a0, a0
573565
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
574566
; RV64I-NEXT: addi sp, sp, 16

‎llvm/test/CodeGen/RISCV/GlobalISel/float-arith.ll

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -210,8 +210,7 @@ define i32 @fneg_s(float %a, float %b) nounwind {
210210
; RV64I-NEXT: lui a1, 524288
211211
; RV64I-NEXT: xor a1, a0, a1
212212
; RV64I-NEXT: call __eqsf2
213-
; RV64I-NEXT: slli a0, a0, 32
214-
; RV64I-NEXT: srli a0, a0, 32
213+
; RV64I-NEXT: sext.w a0, a0
215214
; RV64I-NEXT: seqz a0, a0
216215
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
217216
; RV64I-NEXT: addi sp, sp, 16

‎llvm/test/CodeGen/RISCV/GlobalISel/float-convert.ll

Lines changed: 9 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -65,25 +65,14 @@ define i32 @fcvt_wu_s(float %a) nounwind {
6565
; Test where the fptoui has multiple uses, one of which causes a sext to be
6666
; inserted on RV64.
6767
define i32 @fcvt_wu_s_multiple_use(float %x, ptr %y) nounwind {
68-
; RV32IF-LABEL: fcvt_wu_s_multiple_use:
69-
; RV32IF: # %bb.0:
70-
; RV32IF-NEXT: fcvt.wu.s a0, fa0, rtz
71-
; RV32IF-NEXT: bnez a0, .LBB2_2
72-
; RV32IF-NEXT: # %bb.1:
73-
; RV32IF-NEXT: li a0, 1
74-
; RV32IF-NEXT: .LBB2_2:
75-
; RV32IF-NEXT: ret
76-
;
77-
; RV64IF-LABEL: fcvt_wu_s_multiple_use:
78-
; RV64IF: # %bb.0:
79-
; RV64IF-NEXT: fcvt.wu.s a0, fa0, rtz
80-
; RV64IF-NEXT: slli a1, a0, 32
81-
; RV64IF-NEXT: srli a1, a1, 32
82-
; RV64IF-NEXT: bnez a1, .LBB2_2
83-
; RV64IF-NEXT: # %bb.1:
84-
; RV64IF-NEXT: li a0, 1
85-
; RV64IF-NEXT: .LBB2_2:
86-
; RV64IF-NEXT: ret
68+
; CHECKIF-LABEL: fcvt_wu_s_multiple_use:
69+
; CHECKIF: # %bb.0:
70+
; CHECKIF-NEXT: fcvt.wu.s a0, fa0, rtz
71+
; CHECKIF-NEXT: bnez a0, .LBB2_2
72+
; CHECKIF-NEXT: # %bb.1:
73+
; CHECKIF-NEXT: li a0, 1
74+
; CHECKIF-NEXT: .LBB2_2:
75+
; CHECKIF-NEXT: ret
8776
;
8877
; RV32I-LABEL: fcvt_wu_s_multiple_use:
8978
; RV32I: # %bb.0:
@@ -103,8 +92,7 @@ define i32 @fcvt_wu_s_multiple_use(float %x, ptr %y) nounwind {
10392
; RV64I-NEXT: addi sp, sp, -16
10493
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
10594
; RV64I-NEXT: call __fixunssfsi
106-
; RV64I-NEXT: slli a1, a0, 32
107-
; RV64I-NEXT: srli a1, a1, 32
95+
; RV64I-NEXT: sext.w a1, a0
10896
; RV64I-NEXT: bnez a1, .LBB2_2
10997
; RV64I-NEXT: # %bb.1:
11098
; RV64I-NEXT: li a0, 1

‎llvm/test/CodeGen/RISCV/GlobalISel/float-fcmp.ll

Lines changed: 8 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -50,8 +50,7 @@ define i32 @fcmp_oeq(float %a, float %b) nounwind {
5050
; RV64I-NEXT: addi sp, sp, -16
5151
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
5252
; RV64I-NEXT: call __eqsf2
53-
; RV64I-NEXT: slli a0, a0, 32
54-
; RV64I-NEXT: srli a0, a0, 32
53+
; RV64I-NEXT: sext.w a0, a0
5554
; RV64I-NEXT: seqz a0, a0
5655
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
5756
; RV64I-NEXT: addi sp, sp, 16
@@ -236,14 +235,12 @@ define i32 @fcmp_one(float %a, float %b) nounwind {
236235
; RV64I-NEXT: mv s0, a0
237236
; RV64I-NEXT: mv s1, a1
238237
; RV64I-NEXT: call __eqsf2
239-
; RV64I-NEXT: slli a0, a0, 32
240-
; RV64I-NEXT: srli a0, a0, 32
238+
; RV64I-NEXT: sext.w a0, a0
241239
; RV64I-NEXT: snez s2, a0
242240
; RV64I-NEXT: mv a0, s0
243241
; RV64I-NEXT: mv a1, s1
244242
; RV64I-NEXT: call __unordsf2
245-
; RV64I-NEXT: slli a0, a0, 32
246-
; RV64I-NEXT: srli a0, a0, 32
243+
; RV64I-NEXT: sext.w a0, a0
247244
; RV64I-NEXT: seqz a0, a0
248245
; RV64I-NEXT: and a0, s2, a0
249246
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
@@ -281,8 +278,7 @@ define i32 @fcmp_ord(float %a, float %b) nounwind {
281278
; RV64I-NEXT: addi sp, sp, -16
282279
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
283280
; RV64I-NEXT: call __unordsf2
284-
; RV64I-NEXT: slli a0, a0, 32
285-
; RV64I-NEXT: srli a0, a0, 32
281+
; RV64I-NEXT: sext.w a0, a0
286282
; RV64I-NEXT: seqz a0, a0
287283
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
288284
; RV64I-NEXT: addi sp, sp, 16
@@ -335,14 +331,12 @@ define i32 @fcmp_ueq(float %a, float %b) nounwind {
335331
; RV64I-NEXT: mv s0, a0
336332
; RV64I-NEXT: mv s1, a1
337333
; RV64I-NEXT: call __eqsf2
338-
; RV64I-NEXT: slli a0, a0, 32
339-
; RV64I-NEXT: srli a0, a0, 32
334+
; RV64I-NEXT: sext.w a0, a0
340335
; RV64I-NEXT: seqz s2, a0
341336
; RV64I-NEXT: mv a0, s0
342337
; RV64I-NEXT: mv a1, s1
343338
; RV64I-NEXT: call __unordsf2
344-
; RV64I-NEXT: slli a0, a0, 32
345-
; RV64I-NEXT: srli a0, a0, 32
339+
; RV64I-NEXT: sext.w a0, a0
346340
; RV64I-NEXT: snez a0, a0
347341
; RV64I-NEXT: or a0, s2, a0
348342
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
@@ -516,8 +510,7 @@ define i32 @fcmp_une(float %a, float %b) nounwind {
516510
; RV64I-NEXT: addi sp, sp, -16
517511
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
518512
; RV64I-NEXT: call __nesf2
519-
; RV64I-NEXT: slli a0, a0, 32
520-
; RV64I-NEXT: srli a0, a0, 32
513+
; RV64I-NEXT: sext.w a0, a0
521514
; RV64I-NEXT: snez a0, a0
522515
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
523516
; RV64I-NEXT: addi sp, sp, 16
@@ -552,8 +545,7 @@ define i32 @fcmp_uno(float %a, float %b) nounwind {
552545
; RV64I-NEXT: addi sp, sp, -16
553546
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
554547
; RV64I-NEXT: call __unordsf2
555-
; RV64I-NEXT: slli a0, a0, 32
556-
; RV64I-NEXT: srli a0, a0, 32
548+
; RV64I-NEXT: sext.w a0, a0
557549
; RV64I-NEXT: snez a0, a0
558550
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
559551
; RV64I-NEXT: addi sp, sp, 16

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