Replace copy with a reference. (#82485)

MalaySanghi · web-flow · commit 0e337c67c8b9 · 2024-03-05T15:51:43.000+08:00
These are relatively larger structures and we don't update them so ref
should be fine
diff --git a/llvm/lib/CodeGen/MachinePipeliner.cpp b/llvm/lib/CodeGen/MachinePipeliner.cpp
@@ -1334,7 +1334,7 @@ class HighRegisterPressureDetector {
         Register Reg = getLoopPhiReg(*MI, OrigMBB);
         UpdateTargetRegs(Reg);
       } else {
-        for (auto Use : ROMap.find(MI)->getSecond().Uses)
+        for (auto &Use : ROMap.find(MI)->getSecond().Uses)
           UpdateTargetRegs(Use.RegUnit);
       }
     }
@@ -1438,7 +1438,7 @@ class HighRegisterPressureDetector {
 
         const unsigned Iter = I - Stage;
 
-        for (auto Def : ROMap.find(MI)->getSecond().Defs)
+        for (auto &Def : ROMap.find(MI)->getSecond().Defs)
           InsertReg(LiveRegSets[Iter], Def.RegUnit);
 
         for (auto LastUse : LastUses[MI]) {

Original file line number	Diff line number	Diff line change
`@@ -1334,7 +1334,7 @@ class HighRegisterPressureDetector {`
`1334`	`1334`	`Register Reg = getLoopPhiReg(*MI, OrigMBB);`
`1335`	`1335`	`UpdateTargetRegs(Reg);`
`1336`	`1336`	`} else {`
`1337`		`- for (auto Use : ROMap.find(MI)->getSecond().Uses)`
	`1337`	`+ for (auto &Use : ROMap.find(MI)->getSecond().Uses)`
`1338`	`1338`	`UpdateTargetRegs(Use.RegUnit);`
`1339`	`1339`	`}`
`1340`	`1340`	`}`
`@@ -1438,7 +1438,7 @@ class HighRegisterPressureDetector {`
`1438`	`1438`
`1439`	`1439`	`const unsigned Iter = I - Stage;`
`1440`	`1440`
`1441`		`- for (auto Def : ROMap.find(MI)->getSecond().Defs)`
	`1441`	`+ for (auto &Def : ROMap.find(MI)->getSecond().Defs)`
`1442`	`1442`	`InsertReg(LiveRegSets[Iter], Def.RegUnit);`
`1443`	`1443`
`1444`	`1444`	`for (auto LastUse : LastUses[MI]) {`