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[CIR][CodeGen] Add initial support for __cxa_rethrow (#1290)
This PR adds an initial support for `__cxa_rethrow`, and one test that produces a rethrow. I am very open to suggestions regarding this PR, because I'm still a bit unsure if this replicates the original codegen properly. For example, using the test added, the OG CodeGen produces: ``` entry: invoke void @_ZN1SC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %s) to label %invoke.cont unwind label %lpad invoke.cont: ; preds = %entry invoke void @__cxa_rethrow() #2 to label %unreachable unwind label %lpad lpad: ; preds = %invoke.cont, %entry %0 = landingpad { ptr, i32 } catch ptr null %1 = extractvalue { ptr, i32 } %0, 0 store ptr %1, ptr %exn.slot, align 8 %2 = extractvalue { ptr, i32 } %0, 1 store i32 %2, ptr %ehselector.slot, align 4 br label %catch catch: ; preds = %lpad %exn = load ptr, ptr %exn.slot, align 8 %3 = call ptr @__cxa_begin_catch(ptr %exn) #3 %4 = load i32, ptr %r, align 4 %inc = add nsw i32 %4, 1 store i32 %inc, ptr %r, align 4 call void @__cxa_end_catch() br label %try.cont ``` and the proposed CIR equivalent produces: ``` invoke void @_ZN1SC2Ev(ptr %1) to label %5 unwind label %9 5: ; preds = %4 invoke void @__cxa_rethrow() to label %6 unwind label %13 6: ; preds = %5 br label %7 7: ; preds = %6 unreachable 8: ; No predecessors! br label %22 9: ; preds = %4 %10 = landingpad { ptr, i32 } catch ptr null %11 = extractvalue { ptr, i32 } %10, 0 %12 = extractvalue { ptr, i32 } %10, 1 br label %17 13: ; preds = %5 %14 = landingpad { ptr, i32 } catch ptr null %15 = extractvalue { ptr, i32 } %14, 0 %16 = extractvalue { ptr, i32 } %14, 1 br label %17 17: ; preds = %13, %9 %18 = phi ptr [ %11, %9 ], [ %15, %13 ] %19 = call ptr @__cxa_begin_catch(ptr %18) %20 = load i32, ptr %2, align 4 %21 = add i32 %20, 1 store i32 %21, ptr %2, align 4 call void @__cxa_end_catch() br label %22 ``` There are quite a number of differences: `phi` in the CIR version VS loading from `%exn.slot` in the OG, having multiple landing pads, etc. The CIR version still seems reasonable to me, mostly because currently we are unable to replicate the exact behavior of the OG codegen. Again, I am very open to more discussions and suggestions here)
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‎clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp‎

Lines changed: 11 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2261,7 +2261,17 @@ mlir::Value CIRGenItaniumCXXABI::getCXXDestructorImplicitParam(
22612261

22622262
void CIRGenItaniumCXXABI::emitRethrow(CIRGenFunction &CGF, bool isNoReturn) {
22632263
// void __cxa_rethrow();
2264-
llvm_unreachable("NYI");
2264+
2265+
if (isNoReturn) {
2266+
auto &builder = CGF.getBuilder();
2267+
assert(CGF.currSrcLoc && "expected source location");
2268+
auto loc = *CGF.currSrcLoc;
2269+
builder.create<cir::ThrowOp>(loc, mlir::Value{}, mlir::FlatSymbolRefAttr{},
2270+
mlir::FlatSymbolRefAttr{});
2271+
builder.create<cir::UnreachableOp>(loc);
2272+
} else {
2273+
llvm_unreachable("NYI");
2274+
}
22652275
}
22662276

22672277
void CIRGenItaniumCXXABI::emitThrow(CIRGenFunction &CGF,

‎clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp‎

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -426,11 +426,14 @@ class CIRTryOpFlattening : public mlir::OpRewritePattern<cir::TryOp> {
426426
SmallVectorImpl<mlir::Block *> &landingPads) const {
427427
// Replace the tryOp return with a branch that jumps out of the body.
428428
rewriter.setInsertionPointToEnd(afterBody);
429-
auto tryBodyYield = cast<cir::YieldOp>(afterBody->getTerminator());
430429

431430
mlir::Block *beforeCatch = rewriter.getInsertionBlock();
432431
rewriter.setInsertionPointToEnd(beforeCatch);
433-
rewriter.replaceOpWithNewOp<cir::BrOp>(tryBodyYield, afterTry);
432+
433+
// Check if the terminator is a YieldOp because there could be another
434+
// terminator, e.g. unreachable
435+
if (auto tryBodyYield = dyn_cast<cir::YieldOp>(afterBody->getTerminator()))
436+
rewriter.replaceOpWithNewOp<cir::BrOp>(tryBodyYield, afterTry);
434437

435438
// Start the landing pad by getting the inflight exception information.
436439
mlir::Block *nextDispatcher =

‎clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp‎

Lines changed: 23 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -86,6 +86,7 @@ struct LoweringPreparePass : public LoweringPrepareBase<LoweringPreparePass> {
8686
void lowerToMemCpy(StoreOp op);
8787
void lowerArrayDtor(ArrayDtor op);
8888
void lowerArrayCtor(ArrayCtor op);
89+
void lowerThrowOp(ThrowOp op);
8990

9091
/// Collect annotations of global values in the module
9192
void addGlobalAnnotations(mlir::Operation *op, mlir::ArrayAttr annotations);
@@ -1133,6 +1134,25 @@ void LoweringPreparePass::lowerIterEndOp(IterEndOp op) {
11331134
op.erase();
11341135
}
11351136

1137+
void LoweringPreparePass::lowerThrowOp(ThrowOp op) {
1138+
CIRBaseBuilderTy builder(getContext());
1139+
1140+
if (op.rethrows()) {
1141+
auto voidTy = cir::VoidType::get(builder.getContext());
1142+
auto fnType = cir::FuncType::get({}, voidTy);
1143+
auto fnName = "__cxa_rethrow";
1144+
1145+
builder.setInsertionPointToStart(&theModule.getBodyRegion().front());
1146+
FuncOp f = buildRuntimeFunction(builder, fnName, op.getLoc(), fnType);
1147+
1148+
builder.setInsertionPointAfter(op.getOperation());
1149+
auto call = builder.createTryCallOp(op.getLoc(), f, {});
1150+
1151+
op->replaceAllUsesWith(call);
1152+
op->erase();
1153+
}
1154+
}
1155+
11361156
void LoweringPreparePass::addGlobalAnnotations(mlir::Operation *op,
11371157
mlir::ArrayAttr annotations) {
11381158
auto globalValue = cast<mlir::SymbolOpInterface>(op);
@@ -1195,6 +1215,8 @@ void LoweringPreparePass::runOnOp(Operation *op) {
11951215
}
11961216
if (std::optional<mlir::ArrayAttr> annotations = fnOp.getAnnotations())
11971217
addGlobalAnnotations(fnOp, annotations.value());
1218+
} else if (auto throwOp = dyn_cast<cir::ThrowOp>(op)) {
1219+
lowerThrowOp(throwOp);
11981220
}
11991221
}
12001222

@@ -1211,7 +1233,7 @@ void LoweringPreparePass::runOnOperation() {
12111233
op->walk([&](Operation *op) {
12121234
if (isa<UnaryOp, BinOp, CastOp, ComplexBinOp, CmpThreeWayOp, VAArgOp,
12131235
GlobalOp, DynamicCastOp, StdFindOp, IterEndOp, IterBeginOp,
1214-
ArrayCtor, ArrayDtor, cir::FuncOp, StoreOp>(op))
1236+
ArrayCtor, ArrayDtor, cir::FuncOp, StoreOp, ThrowOp>(op))
12151237
opsToTransform.push_back(op);
12161238
});
12171239

‎clang/test/CIR/CodeGen/throw.cpp‎

Lines changed: 177 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -21,4 +21,180 @@ double d(int a, int b) {
2121
// LLVM: %[[ADDR:.*]] = call ptr @__cxa_allocate_exception(i64 8)
2222
// LLVM: store ptr @.str, ptr %[[ADDR]], align 8
2323
// LLVM: call void @__cxa_throw(ptr %[[ADDR]], ptr @_ZTIPKc, ptr null)
24-
// LLVM: unreachable
24+
// LLVM: unreachable
25+
26+
struct S {
27+
S() {}
28+
};
29+
30+
void refoo1() {
31+
int r = 1;
32+
try {
33+
S s;
34+
throw;
35+
} catch (...) {
36+
++r;
37+
}
38+
}
39+
40+
// CIR-LABEL: @_Z6refoo1v()
41+
// CIR: %[[V0:.*]] = cir.alloca !s32i, !cir.ptr<!s32i>, ["r", init] {alignment = 4 : i64}
42+
// CIR: %[[V1:.*]] = cir.const #cir.int<1> : !s32i
43+
// CIR: cir.store %[[V1]], %[[V0]] : !s32i, !cir.ptr<!s32i>
44+
// CIR: cir.scope {
45+
// CIR: %[[V2:.*]] = cir.alloca !ty_S, !cir.ptr<!ty_S>, ["s", init] {alignment = 1 : i64}
46+
// CIR: cir.try {
47+
// CIR: cir.call exception @_ZN1SC2Ev(%[[V2]]) : (!cir.ptr<!ty_S>) -> ()
48+
// CIR: cir.call exception @__cxa_rethrow() : () -> ()
49+
// CIR: cir.unreachable
50+
// CIR: } catch [type #cir.all {
51+
// CIR: %[[V3:.*]] = cir.catch_param -> !cir.ptr<!void>
52+
// CIR: %[[V4:.*]] = cir.load %[[V0]] : !cir.ptr<!s32i>, !s32i
53+
// CIR: %[[V5:.*]] = cir.unary(inc, %[[V4]]) : !s32i, !s32i
54+
// CIR: cir.store %[[V5]], %[[V0]] : !s32i, !cir.ptr<!s32i>
55+
// CIR: cir.yield
56+
// CIR: }]
57+
// CIR: }
58+
// CIR: cir.return
59+
// CIR: }
60+
61+
// LLVM: define dso_local void @_Z6refoo1v()
62+
// LLVM: %[[V1:.*]] = alloca %struct.S, i64 1, align 1
63+
// LLVM: %[[V2:.*]] = alloca i32, i64 1, align 4
64+
// LLVM: store i32 1, ptr %[[V2]], align 4
65+
// LLVM: br label %[[B3:.*]]
66+
// LLVM: [[B3]]:
67+
// LLVM: br label %[[B4:.*]]
68+
// LLVM: [[B4]]:
69+
// LLVM: invoke void @_ZN1SC2Ev(ptr %[[V1]])
70+
// LLVM: to label %[[B5:.*]] unwind label %[[B7:.*]]
71+
// LLVM: [[B5]]:
72+
// LLVM: invoke void @__cxa_rethrow()
73+
// LLVM: to label %[[B6:.*]] unwind label %[[B11:.*]]
74+
// LLVM: [[B6]]:
75+
// LLVM: unreachable
76+
// LLVM: [[B7]]:
77+
// LLVM: %[[V8:.*]] = landingpad { ptr, i32 }
78+
// LLVM: catch ptr null
79+
// LLVM: %[[V9:.*]] = extractvalue { ptr, i32 } %[[V8]], 0
80+
// LLVM: %[[V10:.*]] = extractvalue { ptr, i32 } %[[V8]], 1
81+
// LLVM: br label %[[B15:.*]]
82+
// LLVM: [[B11]]:
83+
// LLVM: %[[V12:.*]] = landingpad { ptr, i32 }
84+
// LLVM: catch ptr null
85+
// LLVM: %[[V13:.*]] = extractvalue { ptr, i32 } %[[V12]], 0
86+
// LLVM: %[[V14:.*]] = extractvalue { ptr, i32 } %[[V12]], 1
87+
// LLVM: br label %[[B15:.*]]
88+
// LLVM: [[B15]]:
89+
// LLVM: %[[V16:.*]] = phi ptr [ %[[V9]], %[[B7]] ], [ %[[V13]], %[[B11]] ]
90+
// LLVM: %[[V17:.*]] = call ptr @__cxa_begin_catch(ptr %[[V16]])
91+
// LLVM: %[[V18:.*]] = load i32, ptr %[[V2]], align 4
92+
// LLVM: %[[V19:.*]] = add i32 %[[V18]], 1
93+
// LLVM: store i32 %[[V19]], ptr %[[V2]], align 4
94+
// LLVM: call void @__cxa_end_catch()
95+
96+
void refoo2() {
97+
int r = 1;
98+
try {
99+
for (int i = 0; i < 5; i++) {
100+
S s;
101+
throw;
102+
}
103+
S s;
104+
} catch (...) {
105+
++r;
106+
}
107+
}
108+
109+
// CIR-LABEL: @_Z6refoo2v()
110+
// CIR: %[[V0:.*]] = cir.alloca !s32i, !cir.ptr<!s32i>, ["r", init] {alignment = 4 : i64}
111+
// CIR: %[[V1:.*]] = cir.const #cir.int<1> : !s32i
112+
// CIR: cir.store %[[V1]], %[[V0]] : !s32i, !cir.ptr<!s32i>
113+
// CIR: cir.scope {
114+
// CIR: %[[V2:.*]] = cir.alloca !ty_S, !cir.ptr<!ty_S>, ["s", init] {alignment = 1 : i64}
115+
// CIR: cir.try {
116+
// CIR: cir.scope {
117+
// CIR: %[[V3:.*]] = cir.alloca !s32i, !cir.ptr<!s32i>, ["i", init] {alignment = 4 : i64}
118+
// CIR: %[[V4:.*]] = cir.const #cir.int<0> : !s32i
119+
// CIR: cir.store %[[V4]], %[[V3]] : !s32i, !cir.ptr<!s32i>
120+
// CIR: cir.for : cond {
121+
// CIR: %[[V5:.*]] = cir.load %[[V3]] : !cir.ptr<!s32i>, !s32i
122+
// CIR: %[[V6:.*]] = cir.const #cir.int<5> : !s32i
123+
// CIR: %[[V7:.*]] = cir.cmp(lt, %[[V5]], %[[V6]]) : !s32i, !cir.bool
124+
// CIR: cir.condition(%[[V7]])
125+
// CIR: } body {
126+
// CIR: cir.scope {
127+
// CIR: %[[V5:.*]] = cir.alloca !ty_S, !cir.ptr<!ty_S>, ["s", init] {alignment = 1 : i64}
128+
// CIR: cir.call exception @_ZN1SC2Ev(%[[V5]]) : (!cir.ptr<!ty_S>) -> ()
129+
// CIR: cir.call exception @__cxa_rethrow() : () -> ()
130+
// CIR: cir.unreachable
131+
// CIR: }
132+
// CIR: cir.yield
133+
// CIR: } step {
134+
// CIR: %[[V5:.*]] = cir.load %[[V3]] : !cir.ptr<!s32i>, !s32i
135+
// CIR: %[[V6:.*]] = cir.unary(inc, %[[V5]]) : !s32i, !s32i
136+
// CIR: cir.store %[[V6]], %[[V3]] : !s32i, !cir.ptr<!s32i>
137+
// CIR: cir.yield
138+
// CIR: }
139+
// CIR: }
140+
// CIR: cir.call exception @_ZN1SC2Ev(%[[V2]]) : (!cir.ptr<!ty_S>) -> ()
141+
// CIR: cir.yield
142+
// CIR: } catch [type #cir.all {
143+
// CIR: %[[V3:.*]] = cir.catch_param -> !cir.ptr<!void>
144+
// CIR: %[[V4:.*]] = cir.load %[[V0]] : !cir.ptr<!s32i>, !s32i
145+
// CIR: %[[V5:.*]] = cir.unary(inc, %[[V4]]) : !s32i, !s32i
146+
// CIR: cir.store %[[V5]], %[[V0]] : !s32i, !cir.ptr<!s32i>
147+
// CIR: cir.yield
148+
// CIR: }]
149+
// CIR: }
150+
// CIR: cir.return
151+
// CIR: }
152+
153+
// LLVM: {{.*}}:
154+
// LLVM: invoke void @_ZN1SC2Ev(ptr %[[V3:.*]])
155+
// LLVM: to label %[[B13:.*]] unwind label %[[B22:.*]]
156+
// LLVM: [[B13]]:
157+
// LLVM: invoke void @__cxa_rethrow()
158+
// LLVM: to label %[[B14:.*]] unwind label %[[B26:.*]]
159+
// LLVM: [[B14]]:
160+
// LLVM: unreachable
161+
// LLVM: [[B15]]:
162+
// LLVM: br label %[[B16:.*]]
163+
// LLVM: [[B16]]:
164+
// LLVM: %[[V17]] = load i32, ptr {{.*}}, align 4
165+
// LLVM: %[[V18]] = add i32 %[[V17]], 1
166+
// LLVM: store i32 %[[V18]], ptr {{.*}}, align 4
167+
// LLVM: br label {{.*}}
168+
// LLVM: %[[B19:.*]]
169+
// LLVM: br label %[[B20:.*]]
170+
// LLVM: [[B20]]:
171+
// LLVM: invoke void @_ZN1SC2Ev(ptr {{.*}})
172+
// LLVM: to label %[[B21:.*]] unwind label %[[B30:.*]]
173+
// LLVM: [[B21]]:
174+
// LLVM: br label {{.*}}
175+
// LLVM: [[B22]]:
176+
// LLVM: %[[V23:.*]] = landingpad { ptr, i32 }
177+
// LLVM: catch ptr null
178+
// LLVM: %[[V24:.*]] = extractvalue { ptr, i32 } %[[V23]], 0
179+
// LLVM: %[[V25:.*]] = extractvalue { ptr, i32 } %[[V23]], 1
180+
// LLVM: br label %[[B34:.*]]
181+
// LLVM: [[B26]]:
182+
// LLVM: %[[V27:.*]] = landingpad { ptr, i32 }
183+
// LLVM: catch ptr null
184+
// LLVM: %[[V28:.*]] = extractvalue { ptr, i32 } %[[V27]], 0
185+
// LLVM: %[[V29:.*]] = extractvalue { ptr, i32 } %[[V27]], 1
186+
// LLVM: br label %[[B34:.*]]
187+
// LLVM: [[B30]]:
188+
// LLVM: %[[V31:.*]] = landingpad { ptr, i32 }
189+
// LLVM: catch ptr null
190+
// LLVM: %[[V32:.*]] = extractvalue { ptr, i32 } %[[V31]], 0
191+
// LLVM: %[[V33:.*]] = extractvalue { ptr, i32 } %[[V31]], 1
192+
// LLVM: br label %[[B34:.*]]
193+
// LLVM: [[B34]]:
194+
// LLVM: %[[V35:.*]] = phi ptr [ %[[V32]], %[[B30]] ], [ %[[V24]], %[[B22]] ], [ %[[V28]], %[[B26]] ]
195+
// LLVM: %[[V36:.*]] = call ptr @__cxa_begin_catch(ptr %[[V35]])
196+
// LLVM: %[[V37:.*]] = load i32, ptr {{.*}}, align 4
197+
// LLVM: %[[V38:.*]] = add i32 %[[V37]], 1
198+
// LLVM: store i32 %[[V38]], ptr {{.*}}, align 4
199+
// LLVM: call void @__cxa_end_catch()
200+
// LLVM: br label {{.*}}

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