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[CIR][DirectToLLVM] Lower cir.bool to i1
1 parent db8fde4 commit 3450f9e

26 files changed

+388
-231
lines changed

‎clang/lib/CIR/CodeGen/CIRGenModule.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -820,7 +820,7 @@ void CIRGenModule::replaceGlobal(cir::GlobalOp Old, cir::GlobalOp New) {
820820
mlir::Type ptrTy = builder.getPointerTo(OldTy);
821821
mlir::Value cast =
822822
builder.createBitcast(GGO->getLoc(), UseOpResultValue, ptrTy);
823-
UseOpResultValue.replaceAllUsesExcept(cast, {cast.getDefiningOp()});
823+
UseOpResultValue.replaceAllUsesExcept(cast, cast.getDefiningOp());
824824
}
825825
}
826826
}

‎clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp‎

Lines changed: 190 additions & 107 deletions
Large diffs are not rendered by default.

‎clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h‎

Lines changed: 45 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -14,13 +14,18 @@
1414
#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
1515
#include "mlir/Dialect/LLVMIR/LLVMTypes.h"
1616
#include "mlir/IR/MLIRContext.h"
17+
#include "mlir/Interfaces/DataLayoutInterfaces.h"
1718
#include "mlir/Transforms/DialectConversion.h"
1819

1920
namespace cir {
2021
namespace direct {
22+
23+
/// Convert a CIR attribute to an LLVM attribute. May use the datalayout for
24+
/// lowering attributes to-be-stored in memory.
2125
mlir::Value lowerCirAttrAsValue(mlir::Operation *parentOp, mlir::Attribute attr,
2226
mlir::ConversionPatternRewriter &rewriter,
23-
const mlir::TypeConverter *converter);
27+
const mlir::TypeConverter *converter,
28+
mlir::DataLayout const &dataLayout);
2429

2530
mlir::LLVM::Linkage convertLinkage(cir::GlobalLinkageKind linkage);
2631

@@ -137,7 +142,13 @@ class CIRToLLVMMemSetInlineOpLowering
137142

138143
class CIRToLLVMPtrStrideOpLowering
139144
: public mlir::OpConversionPattern<cir::PtrStrideOp> {
145+
mlir::DataLayout const &dataLayout;
146+
140147
public:
148+
CIRToLLVMPtrStrideOpLowering(const mlir::TypeConverter &typeConverter,
149+
mlir::MLIRContext *context,
150+
mlir::DataLayout const &dataLayout)
151+
: OpConversionPattern(typeConverter, context), dataLayout(dataLayout) {}
141152
using mlir::OpConversionPattern<cir::PtrStrideOp>::OpConversionPattern;
142153

143154
mlir::LogicalResult
@@ -216,9 +227,15 @@ class CIRToLLVMBrCondOpLowering
216227
};
217228

218229
class CIRToLLVMCastOpLowering : public mlir::OpConversionPattern<cir::CastOp> {
230+
mlir::DataLayout const &dataLayout;
231+
219232
mlir::Type convertTy(mlir::Type ty) const;
220233

221234
public:
235+
CIRToLLVMCastOpLowering(const mlir::TypeConverter &typeConverter,
236+
mlir::MLIRContext *context,
237+
mlir::DataLayout const &dataLayout)
238+
: OpConversionPattern(typeConverter, context), dataLayout(dataLayout) {}
222239
using mlir::OpConversionPattern<cir::CastOp>::OpConversionPattern;
223240

224241
mlir::LogicalResult
@@ -302,12 +319,15 @@ class CIRToLLVMAllocaOpLowering
302319

303320
class CIRToLLVMLoadOpLowering : public mlir::OpConversionPattern<cir::LoadOp> {
304321
cir::LowerModule *lowerMod;
322+
mlir::DataLayout const &dataLayout;
305323

306324
public:
307325
CIRToLLVMLoadOpLowering(const mlir::TypeConverter &typeConverter,
308326
mlir::MLIRContext *context,
309-
cir::LowerModule *lowerModule)
310-
: OpConversionPattern(typeConverter, context), lowerMod(lowerModule) {}
327+
cir::LowerModule *lowerModule,
328+
mlir::DataLayout const &dataLayout)
329+
: OpConversionPattern(typeConverter, context), lowerMod(lowerModule),
330+
dataLayout(dataLayout) {}
311331

312332
mlir::LogicalResult
313333
matchAndRewrite(cir::LoadOp op, OpAdaptor,
@@ -317,12 +337,15 @@ class CIRToLLVMLoadOpLowering : public mlir::OpConversionPattern<cir::LoadOp> {
317337
class CIRToLLVMStoreOpLowering
318338
: public mlir::OpConversionPattern<cir::StoreOp> {
319339
cir::LowerModule *lowerMod;
340+
mlir::DataLayout const &dataLayout;
320341

321342
public:
322343
CIRToLLVMStoreOpLowering(const mlir::TypeConverter &typeConverter,
323344
mlir::MLIRContext *context,
324-
cir::LowerModule *lowerModule)
325-
: OpConversionPattern(typeConverter, context), lowerMod(lowerModule) {}
345+
cir::LowerModule *lowerModule,
346+
mlir::DataLayout const &dataLayout)
347+
: OpConversionPattern(typeConverter, context), lowerMod(lowerModule),
348+
dataLayout(dataLayout) {}
326349

327350
mlir::LogicalResult
328351
matchAndRewrite(cir::StoreOp op, OpAdaptor,
@@ -332,12 +355,15 @@ class CIRToLLVMStoreOpLowering
332355
class CIRToLLVMConstantOpLowering
333356
: public mlir::OpConversionPattern<cir::ConstantOp> {
334357
cir::LowerModule *lowerMod;
358+
mlir::DataLayout const &dataLayout;
335359

336360
public:
337361
CIRToLLVMConstantOpLowering(const mlir::TypeConverter &typeConverter,
338362
mlir::MLIRContext *context,
339-
cir::LowerModule *lowerModule)
340-
: OpConversionPattern(typeConverter, context), lowerMod(lowerModule) {
363+
cir::LowerModule *lowerModule,
364+
mlir::DataLayout const &dataLayout)
365+
: OpConversionPattern(typeConverter, context), lowerMod(lowerModule),
366+
dataLayout(dataLayout) {
341367
setHasBoundedRewriteRecursion();
342368
}
343369

@@ -538,12 +564,15 @@ class CIRToLLVMSwitchFlatOpLowering
538564
class CIRToLLVMGlobalOpLowering
539565
: public mlir::OpConversionPattern<cir::GlobalOp> {
540566
cir::LowerModule *lowerMod;
567+
mlir::DataLayout const &dataLayout;
541568

542569
public:
543570
CIRToLLVMGlobalOpLowering(const mlir::TypeConverter &typeConverter,
544571
mlir::MLIRContext *context,
545-
cir::LowerModule *lowerModule)
546-
: OpConversionPattern(typeConverter, context), lowerMod(lowerModule) {
572+
cir::LowerModule *lowerModule,
573+
mlir::DataLayout const &dataLayout)
574+
: OpConversionPattern(typeConverter, context), lowerMod(lowerModule),
575+
dataLayout(dataLayout) {
547576
setHasBoundedRewriteRecursion();
548577
}
549578

@@ -904,7 +933,14 @@ class CIRToLLVMTrapOpLowering : public mlir::OpConversionPattern<cir::TrapOp> {
904933

905934
class CIRToLLVMInlineAsmOpLowering
906935
: public mlir::OpConversionPattern<cir::InlineAsmOp> {
936+
mlir::DataLayout const &dataLayout;
937+
907938
public:
939+
CIRToLLVMInlineAsmOpLowering(const mlir::TypeConverter &typeConverter,
940+
mlir::MLIRContext *context,
941+
mlir::DataLayout const &dataLayout)
942+
: OpConversionPattern(typeConverter, context), dataLayout(dataLayout) {}
943+
908944
using mlir::OpConversionPattern<cir::InlineAsmOp>::OpConversionPattern;
909945

910946
mlir::LogicalResult

‎clang/test/CIR/CodeGen/atomic-xchg-field.c‎

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -58,16 +58,14 @@ void structAtomicExchange(unsigned referenceCount, wPtr item) {
5858
// LLVM: %[[RES:.*]] = cmpxchg weak ptr %9, i32 %[[EXP]], i32 %[[DES]] seq_cst seq_cst
5959
// LLVM: %[[OLD:.*]] = extractvalue { i32, i1 } %[[RES]], 0
6060
// LLVM: %[[CMP:.*]] = extractvalue { i32, i1 } %[[RES]], 1
61-
// LLVM: %[[Z:.*]] = zext i1 %[[CMP]] to i8
62-
// LLVM: %[[X:.*]] = xor i8 %[[Z]], 1
63-
// LLVM: %[[FAIL:.*]] = trunc i8 %[[X]] to i1
64-
65-
// LLVM: br i1 %[[FAIL:.*]], label %[[STORE_OLD:.*]], label %[[CONTINUE:.*]]
61+
// LLVM: %[[FAIL:.*]] = xor i1 %[[CMP]], true
62+
// LLVM: br i1 %[[FAIL]], label %[[STORE_OLD:.*]], label %[[CONTINUE:.*]]
6663
// LLVM: [[STORE_OLD]]:
6764
// LLVM: store i32 %[[OLD]], ptr
6865
// LLVM: br label %[[CONTINUE]]
6966

7067
// LLVM: [[CONTINUE]]:
68+
// LLVM: %[[Z:.*]] = zext i1 %[[CMP]] to i8
7169
// LLVM: store i8 %[[Z]], ptr {{.*}}, align 1
7270
// LLVM: ret void
7371

‎clang/test/CIR/CodeGen/bf16-ops.c‎

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -41,14 +41,12 @@ void foo(void) {
4141
// NATIVE-NEXT: %{{.+}} = cir.cast(integral, %[[#C]] : !s32i), !u32i
4242

4343
// NONATIVE-LLVM: %[[#A:]] = fcmp une bfloat %{{.+}}, 0xR0000
44-
// NONATIVE-LLVM-NEXT: %[[#B:]] = zext i1 %[[#A]] to i8
45-
// NONATIVE-LLVM-NEXT: %[[#C:]] = xor i8 %[[#B]], 1
46-
// NONATIVE-LLVM-NEXT: %{{.+}} = zext i8 %[[#C]] to i32
44+
// NONATIVE-LLVM-NEXT: %[[#C:]] = xor i1 %[[#A]], true
45+
// NONATIVE-LLVM-NEXT: %{{.+}} = zext i1 %[[#C]] to i32
4746

4847
// NATIVE-LLVM: %[[#A:]] = fcmp une bfloat %{{.+}}, 0xR0000
49-
// NATIVE-LLVM-NEXT: %[[#B:]] = zext i1 %[[#A]] to i8
50-
// NATIVE-LLVM-NEXT: %[[#C:]] = xor i8 %[[#B]], 1
51-
// NATIVE-LLVM-NEXT: %{{.+}} = zext i8 %[[#C]] to i32
48+
// NATIVE-LLVM-NEXT: %[[#C:]] = xor i1 %[[#A]], true
49+
// NATIVE-LLVM-NEXT: %{{.+}} = zext i1 %[[#C]] to i32
5250

5351
h1 = -h1;
5452
// NONATIVE: %[[#A:]] = cir.cast(floating, %{{.+}} : !cir.bf16), !cir.float

‎clang/test/CIR/CodeGen/builtin-assume.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ int test_assume(int x) {
1616
// CIR: }
1717

1818
// LLVM: @_Z11test_assumei
19-
// LLVM: %[[#cond:]] = trunc i8 %{{.+}} to i1
19+
// LLVM: %[[#cond:]] = icmp sgt i32 %{{.+}}, 0
2020
// LLVM-NEXT: call void @llvm.assume(i1 %[[#cond]])
2121

2222
int test_assume_attr(int x) {
@@ -32,7 +32,7 @@ int test_assume_attr(int x) {
3232
// CIR: }
3333

3434
// LLVM: @_Z16test_assume_attri
35-
// LLVM: %[[#cond:]] = trunc i8 %{{.+}} to i1
35+
// LLVM: %[[#cond:]] = icmp sgt i32 %{{.+}}, 0
3636
// LLVM-NEXT: call void @llvm.assume(i1 %[[#cond]])
3737

3838
int test_assume_aligned(int *ptr) {

‎clang/test/CIR/CodeGen/builtin-constant-p.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -20,8 +20,7 @@ int foo() {
2020
// LLVM: [[TMP1:%.*]] = alloca i32, i64 1
2121
// LLVM: [[TMP2:%.*]] = load i32, ptr @a
2222
// LLVM: [[TMP3:%.*]] = call i1 @llvm.is.constant.i32(i32 [[TMP2]])
23-
// LLVM: [[TMP4:%.*]] = zext i1 [[TMP3]] to i8
24-
// LLVM: [[TMP5:%.*]] = zext i8 [[TMP4]] to i32
23+
// LLVM: [[TMP5:%.*]] = zext i1 [[TMP3]] to i32
2524
// LLVM: store i32 [[TMP5]], ptr [[TMP1]]
2625
// LLVM: [[TMP6:%.*]] = load i32, ptr [[TMP1]]
2726
// LLVM: ret i32 [[TMP6]]

‎clang/test/CIR/CodeGen/complex-arithmetic.c‎

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -303,12 +303,9 @@ void mul() {
303303
// LLVM-FULL-NEXT: %[[#F:]] = fadd double %[[#C]], %[[#D]]
304304
// LLVM-FULL-NEXT: %[[#G:]] = insertvalue { double, double } undef, double %[[#E]], 0
305305
// LLVM-FULL-NEXT: %[[#RES:]] = insertvalue { double, double } %[[#G]], double %[[#F]], 1
306-
// LLVM-FULL-NEXT: %[[#H:]] = fcmp une double %[[#E]], %[[#E]]
307-
// LLVM-FULL-NEXT: %[[#COND:]] = zext i1 %[[#H]] to i8
308-
// LLVM-FULL-NEXT: %[[#I:]] = fcmp une double %[[#F]], %[[#F]]
309-
// LLVM-FULL-NEXT: %[[#COND2:]] = zext i1 %[[#I]] to i8
310-
// LLVM-FULL-NEXT: %[[#J:]] = and i8 %[[#COND]], %[[#COND2]]
311-
// LLVM-FULL-NEXT: %[[#COND3:]] = trunc i8 %[[#J]] to i1
306+
// LLVM-FULL-NEXT: %[[#COND:]] = fcmp une double %[[#E]], %[[#E]]
307+
// LLVM-FULL-NEXT: %[[#COND2:]] = fcmp une double %[[#F]], %[[#F]]
308+
// LLVM-FULL-NEXT: %[[#COND3:]] = and i1 %[[#COND]], %[[#COND2]]
312309
// LLVM-FULL: {{.+}}:
313310
// LLVM-FULL-NEXT: %{{.+}} = call { double, double } @__muldc3(double %[[#LHSR]], double %[[#LHSI]], double %[[#RHSR]], double %[[#RHSI]])
314311
// LLVM-FULL-NEXT: br label %{{.+}}

‎clang/test/CIR/CodeGen/complex-cast.c‎

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -179,10 +179,8 @@ void complex_to_bool() {
179179
// LLVM: %[[#REAL:]] = extractvalue { double, double } %{{.+}}, 0
180180
// LLVM-NEXT: %[[#IMAG:]] = extractvalue { double, double } %{{.+}}, 1
181181
// LLVM-NEXT: %[[#RB:]] = fcmp une double %[[#REAL]], 0.000000e+00
182-
// LLVM-NEXT: %[[#RB2:]] = zext i1 %[[#RB]] to i8
183182
// LLVM-NEXT: %[[#IB:]] = fcmp une double %[[#IMAG]], 0.000000e+00
184-
// LLVM-NEXT: %[[#IB2:]] = zext i1 %[[#IB]] to i8
185-
// LLVM-NEXT: %{{.+}} = or i8 %[[#RB2]], %[[#IB2]]
183+
// LLVM-NEXT: %{{.+}} = or i1 %[[#RB]], %[[#IB]]
186184

187185
// CIR-BEFORE: %{{.+}} = cir.cast(int_complex_to_bool, %{{.+}} : !cir.complex<!s32i>), !cir.bool
188186

@@ -196,10 +194,8 @@ void complex_to_bool() {
196194
// LLVM: %[[#REAL:]] = extractvalue { i32, i32 } %{{.+}}, 0
197195
// LLVM-NEXT: %[[#IMAG:]] = extractvalue { i32, i32 } %{{.+}}, 1
198196
// LLVM-NEXT: %[[#RB:]] = icmp ne i32 %[[#REAL]], 0
199-
// LLVM-NEXT: %[[#RB2:]] = zext i1 %[[#RB]] to i8
200197
// LLVM-NEXT: %[[#IB:]] = icmp ne i32 %[[#IMAG]], 0
201-
// LLVM-NEXT: %[[#IB2:]] = zext i1 %[[#IB]] to i8
202-
// LLVM-NEXT: %{{.+}} = or i8 %[[#RB2]], %[[#IB2]]
198+
// LLVM-NEXT: %{{.+}} = or i1 %[[#RB]], %[[#IB]]
203199

204200
// CHECK: }
205201

‎clang/test/CIR/CodeGen/new-null.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -66,7 +66,7 @@ namespace test15 {
6666
// LLVM: %[[VAL_0:.*]] = alloca ptr, i64 1, align 8
6767
// LLVM: store ptr %[[VAL_1:.*]], ptr %[[VAL_0]], align 8
6868
// LLVM: %[[VAL_2:.*]] = load ptr, ptr %[[VAL_0]], align 8
69-
// LLVM: %[[VAL_3:.*]] = call ptr @_ZnwmPvb(i64 1, ptr %[[VAL_2]], i8 1)
69+
// LLVM: %[[VAL_3:.*]] = call ptr @_ZnwmPvb(i64 1, ptr %[[VAL_2]], i1 true)
7070
// LLVM: %[[VAL_4:.*]] = icmp ne ptr %[[VAL_3]], null
7171
// LLVM: br i1 %[[VAL_4]], label %[[VAL_5:.*]], label %[[VAL_6:.*]]
7272
// LLVM: [[VAL_5]]: ; preds = %[[VAL_7:.*]]

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