[CIR] Lower cir.bool to i1 (#1158)

This PR changes changes the lowering of `cir.bool` to `i1` in both
DorectToLLVM and ThroughMLIR. This dramatically simplifies the lowering
logic of most operations and the lowered code itself as it naturally
uses `i1` for anything boolean.

The change involves separating between type lowering when scalars are
involved and when memory is involved. This is a pattern that was
inspired by clang's codegen which directly emits `i1` from the AST
without intermediate higher level representation like CIR has.

This also paves the way to more complex lowerings that are implemented
in clang codegen through the three primitives added here: `Convert Type
For Memory`, `Emit For Memory` and `Emit To Memory`. They are used in
clang for non-trivial types like bitints but also extensible vectors.

Author: orbiri

clang/lib/CIR/CodeGen/CIRGenModule.cpp

@@ -820,7 +820,7 @@ void CIRGenModule::replaceGlobal(cir::GlobalOp Old, cir::GlobalOp New) {
           mlir::Type ptrTy = builder.getPointerTo(OldTy);
           mlir::Value cast =
               builder.createBitcast(GGO->getLoc(), UseOpResultValue, ptrTy);
-          UseOpResultValue.replaceAllUsesExcept(cast, {cast.getDefiningOp()});
+          UseOpResultValue.replaceAllUsesExcept(cast, cast.getDefiningOp());
         }
       }
     }

clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp

@@ -14,13 +14,18 @@
 #include "mlir/Dialect/LLVMIR/LLVMDialect.h"
 #include "mlir/Dialect/LLVMIR/LLVMTypes.h"
 #include "mlir/IR/MLIRContext.h"
+#include "mlir/Interfaces/DataLayoutInterfaces.h"
 #include "mlir/Transforms/DialectConversion.h"
 
 namespace cir {
 namespace direct {
+
+/// Convert a CIR attribute to an LLVM attribute. May use the datalayout for
+/// lowering attributes to-be-stored in memory.
 mlir::Value lowerCirAttrAsValue(mlir::Operation *parentOp, mlir::Attribute attr,
                                 mlir::ConversionPatternRewriter &rewriter,
-                                const mlir::TypeConverter *converter);
+                                const mlir::TypeConverter *converter,
+                                mlir::DataLayout const &dataLayout);
 
 mlir::LLVM::Linkage convertLinkage(cir::GlobalLinkageKind linkage);
 
@@ -137,7 +142,13 @@ class CIRToLLVMMemSetInlineOpLowering
 
 class CIRToLLVMPtrStrideOpLowering
     : public mlir::OpConversionPattern<cir::PtrStrideOp> {
+  mlir::DataLayout const &dataLayout;
+
 public:
+  CIRToLLVMPtrStrideOpLowering(const mlir::TypeConverter &typeConverter,
+                               mlir::MLIRContext *context,
+                               mlir::DataLayout const &dataLayout)
+      : OpConversionPattern(typeConverter, context), dataLayout(dataLayout) {}
   using mlir::OpConversionPattern<cir::PtrStrideOp>::OpConversionPattern;
 
   mlir::LogicalResult
@@ -216,9 +227,15 @@ class CIRToLLVMBrCondOpLowering
 };
 
 class CIRToLLVMCastOpLowering : public mlir::OpConversionPattern<cir::CastOp> {
+  mlir::DataLayout const &dataLayout;
+
   mlir::Type convertTy(mlir::Type ty) const;
 
 public:
+  CIRToLLVMCastOpLowering(const mlir::TypeConverter &typeConverter,
+                          mlir::MLIRContext *context,
+                          mlir::DataLayout const &dataLayout)
+      : OpConversionPattern(typeConverter, context), dataLayout(dataLayout) {}
   using mlir::OpConversionPattern<cir::CastOp>::OpConversionPattern;
 
   mlir::LogicalResult
@@ -302,12 +319,15 @@ class CIRToLLVMAllocaOpLowering
 
 class CIRToLLVMLoadOpLowering : public mlir::OpConversionPattern<cir::LoadOp> {
   cir::LowerModule *lowerMod;
+  mlir::DataLayout const &dataLayout;
 
 public:
   CIRToLLVMLoadOpLowering(const mlir::TypeConverter &typeConverter,
                           mlir::MLIRContext *context,
-                          cir::LowerModule *lowerModule)
-      : OpConversionPattern(typeConverter, context), lowerMod(lowerModule) {}
+                          cir::LowerModule *lowerModule,
+                          mlir::DataLayout const &dataLayout)
+      : OpConversionPattern(typeConverter, context), lowerMod(lowerModule),
+        dataLayout(dataLayout) {}
 
   mlir::LogicalResult
   matchAndRewrite(cir::LoadOp op, OpAdaptor,
@@ -317,12 +337,15 @@ class CIRToLLVMLoadOpLowering : public mlir::OpConversionPattern<cir::LoadOp> {
 class CIRToLLVMStoreOpLowering
     : public mlir::OpConversionPattern<cir::StoreOp> {
   cir::LowerModule *lowerMod;
+  mlir::DataLayout const &dataLayout;
 
 public:
   CIRToLLVMStoreOpLowering(const mlir::TypeConverter &typeConverter,
                            mlir::MLIRContext *context,
-                           cir::LowerModule *lowerModule)
-      : OpConversionPattern(typeConverter, context), lowerMod(lowerModule) {}
+                           cir::LowerModule *lowerModule,
+                           mlir::DataLayout const &dataLayout)
+      : OpConversionPattern(typeConverter, context), lowerMod(lowerModule),
+        dataLayout(dataLayout) {}
 
   mlir::LogicalResult
   matchAndRewrite(cir::StoreOp op, OpAdaptor,
@@ -332,12 +355,15 @@ class CIRToLLVMStoreOpLowering
 class CIRToLLVMConstantOpLowering
     : public mlir::OpConversionPattern<cir::ConstantOp> {
   cir::LowerModule *lowerMod;
+  mlir::DataLayout const &dataLayout;
 
 public:
   CIRToLLVMConstantOpLowering(const mlir::TypeConverter &typeConverter,
                               mlir::MLIRContext *context,
-                              cir::LowerModule *lowerModule)
-      : OpConversionPattern(typeConverter, context), lowerMod(lowerModule) {
+                              cir::LowerModule *lowerModule,
+                              mlir::DataLayout const &dataLayout)
+      : OpConversionPattern(typeConverter, context), lowerMod(lowerModule),
+        dataLayout(dataLayout) {
     setHasBoundedRewriteRecursion();
   }
 
@@ -538,12 +564,15 @@ class CIRToLLVMSwitchFlatOpLowering
 class CIRToLLVMGlobalOpLowering
     : public mlir::OpConversionPattern<cir::GlobalOp> {
   cir::LowerModule *lowerMod;
+  mlir::DataLayout const &dataLayout;
 
 public:
   CIRToLLVMGlobalOpLowering(const mlir::TypeConverter &typeConverter,
                             mlir::MLIRContext *context,
-                            cir::LowerModule *lowerModule)
-      : OpConversionPattern(typeConverter, context), lowerMod(lowerModule) {
+                            cir::LowerModule *lowerModule,
+                            mlir::DataLayout const &dataLayout)
+      : OpConversionPattern(typeConverter, context), lowerMod(lowerModule),
+        dataLayout(dataLayout) {
     setHasBoundedRewriteRecursion();
   }
 
@@ -904,7 +933,14 @@ class CIRToLLVMTrapOpLowering : public mlir::OpConversionPattern<cir::TrapOp> {
 
 class CIRToLLVMInlineAsmOpLowering
     : public mlir::OpConversionPattern<cir::InlineAsmOp> {
+  mlir::DataLayout const &dataLayout;
+
 public:
+  CIRToLLVMInlineAsmOpLowering(const mlir::TypeConverter &typeConverter,
+                               mlir::MLIRContext *context,
+                               mlir::DataLayout const &dataLayout)
+      : OpConversionPattern(typeConverter, context), dataLayout(dataLayout) {}
+
   using mlir::OpConversionPattern<cir::InlineAsmOp>::OpConversionPattern;
 
   mlir::LogicalResult

clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h

@@ -337,11 +337,8 @@ class CIRConditionOpLowering
     auto *parentOp = op->getParentOp();
     return llvm::TypeSwitch<mlir::Operation *, mlir::LogicalResult>(parentOp)
         .Case<mlir::scf::WhileOp>([&](auto) {
-          auto condition = adaptor.getCondition();
-          auto i1Condition = rewriter.create<mlir::arith::TruncIOp>(
-              op.getLoc(), rewriter.getI1Type(), condition);
           rewriter.replaceOpWithNewOp<mlir::scf::ConditionOp>(
-              op, i1Condition, parentOp->getOperands());
+              op, adaptor.getCondition(), parentOp->getOperands());
           return mlir::success();
         })
         .Default([](auto) { return mlir::failure(); });