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dtatuleaNipaLocal
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net/mlx5e: SHAMPO, Increase timeout to improve latency
During latency tests (netperf TCP_RR) a 30% degradation of HW GRO vs SW GRO was observed. This is due to SHAMPO triggering timeout filler CQEs instead of delivering the CQE for the packet. Having a short timeout for SHAMPO doesn't bring any benefits as it is the driver that does the merging, not the hardware. On the contrary, it can have a negative impact: additional filler CQEs are generated due to the timeout. As there is no way to disable this timeout, this change sets it to the maximum value. Instead of using the packet_merge.timeout parameter which is also used for LRO, set the value directly when filling in the rest of the SHAMPO parameters in mlx5e_build_rq_param(). Fixes: 99be561 ("net/mlx5e: SHAMPO, Re-enable HW-GRO") Signed-off-by: Dragos Tatulea <[email protected]> Signed-off-by: Tariq Toukan <[email protected]> Signed-off-by: NipaLocal <nipa@local>
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+17
-14
lines changed

4 files changed

+17
-14
lines changed

drivers/net/ethernet/mellanox/mlx5/core/en.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -130,7 +130,7 @@ struct page_pool;
130130
#define MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE_MPW 0x2
131131

132132
#define MLX5E_DEFAULT_LRO_TIMEOUT 32
133-
#define MLX5E_LRO_TIMEOUT_ARR_SIZE 4
133+
#define MLX5E_DEFAULT_SHAMPO_TIMEOUT 1024
134134

135135
#define MLX5E_PARAMS_DEFAULT_RX_CQ_MODERATION_USEC 0x10
136136
#define MLX5E_PARAMS_DEFAULT_RX_CQ_MODERATION_USEC_FROM_CQE 0x3

drivers/net/ethernet/mellanox/mlx5/core/en/params.c

Lines changed: 15 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -928,7 +928,7 @@ int mlx5e_build_rq_param(struct mlx5_core_dev *mdev,
928928
MLX5_SET(wq, wq, log_headers_entry_size,
929929
mlx5e_shampo_get_log_hd_entry_size(mdev, params));
930930
MLX5_SET(rqc, rqc, reservation_timeout,
931-
params->packet_merge.timeout);
931+
mlx5e_choose_lro_timeout(mdev, MLX5E_DEFAULT_SHAMPO_TIMEOUT));
932932
MLX5_SET(rqc, rqc, shampo_match_criteria_type,
933933
params->packet_merge.shampo.match_criteria_type);
934934
MLX5_SET(rqc, rqc, shampo_no_match_alignment_granularity,
@@ -1087,6 +1087,20 @@ static u32 mlx5e_shampo_icosq_sz(struct mlx5_core_dev *mdev,
10871087
return wqebbs;
10881088
}
10891089

1090+
#define MLX5E_LRO_TIMEOUT_ARR_SIZE 4
1091+
1092+
u32 mlx5e_choose_lro_timeout(struct mlx5_core_dev *mdev, u32 wanted_timeout)
1093+
{
1094+
int i;
1095+
1096+
/* The supported periods are organized in ascending order */
1097+
for (i = 0; i < MLX5E_LRO_TIMEOUT_ARR_SIZE - 1; i++)
1098+
if (MLX5_CAP_ETH(mdev, lro_timer_supported_periods[i]) >= wanted_timeout)
1099+
break;
1100+
1101+
return MLX5_CAP_ETH(mdev, lro_timer_supported_periods[i]);
1102+
}
1103+
10901104
static u32 mlx5e_mpwrq_total_umr_wqebbs(struct mlx5_core_dev *mdev,
10911105
struct mlx5e_params *params,
10921106
struct mlx5e_xsk_param *xsk)

drivers/net/ethernet/mellanox/mlx5/core/en/params.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -108,6 +108,7 @@ u32 mlx5e_shampo_hd_per_wqe(struct mlx5_core_dev *mdev,
108108
u32 mlx5e_shampo_hd_per_wq(struct mlx5_core_dev *mdev,
109109
struct mlx5e_params *params,
110110
struct mlx5e_rq_param *rq_param);
111+
u32 mlx5e_choose_lro_timeout(struct mlx5_core_dev *mdev, u32 wanted_timeout);
111112
u8 mlx5e_mpwqe_get_log_stride_size(struct mlx5_core_dev *mdev,
112113
struct mlx5e_params *params,
113114
struct mlx5e_xsk_param *xsk);

drivers/net/ethernet/mellanox/mlx5/core/en_main.c

Lines changed: 0 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -5167,18 +5167,6 @@ const struct net_device_ops mlx5e_netdev_ops = {
51675167
#endif
51685168
};
51695169

5170-
static u32 mlx5e_choose_lro_timeout(struct mlx5_core_dev *mdev, u32 wanted_timeout)
5171-
{
5172-
int i;
5173-
5174-
/* The supported periods are organized in ascending order */
5175-
for (i = 0; i < MLX5E_LRO_TIMEOUT_ARR_SIZE - 1; i++)
5176-
if (MLX5_CAP_ETH(mdev, lro_timer_supported_periods[i]) >= wanted_timeout)
5177-
break;
5178-
5179-
return MLX5_CAP_ETH(mdev, lro_timer_supported_periods[i]);
5180-
}
5181-
51825170
void mlx5e_build_nic_params(struct mlx5e_priv *priv, struct mlx5e_xsk *xsk, u16 mtu)
51835171
{
51845172
struct mlx5e_params *params = &priv->channels.params;

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