Revert "igzip/riscv64: Add RVV optimization for VLEN=128"

This reverts commit 7b5dd06.

Author: leiwen2025

igzip/riscv64/Makefile.am

@@ -30,5 +30,4 @@
 lsrc_riscv64 += \
 	igzip/riscv64/igzip_multibinary_riscv64_dispatcher.c \
 	igzip/riscv64/igzip_multibinary_riscv64.S \
-	igzip/riscv64/igzip_isal_adler32_rvv.S \
-        igzip/riscv64/igzip_isal_adler32_rvv128.S
+	igzip/riscv64/igzip_isal_adler32_rvv.S

igzip/riscv64/igzip_isal_adler32_rvv128.S

@@ -31,22 +31,14 @@
 extern uint32_t
 adler32_rvv(uint32_t, uint8_t *, uint64_t);
 extern uint32_t
-adler32_rvv128(uint32_t, uint8_t *, uint64_t);
-extern uint32_t
 adler32_base(uint32_t, uint8_t *, uint64_t);
 
 DEFINE_INTERFACE_DISPATCHER(isal_adler32)
 {
 #if HAVE_RVV
         const unsigned long hwcap = getauxval(AT_HWCAP);
-        if (hwcap & HWCAP_RV('V')) {
-            unsigned long vlenb;
-            __asm__ volatile ("csrr %0, vlenb" : "=r"(vlenb));
-            if (vlenb == 16)
-                return adler32_rvv128;
-            else
+        if (hwcap & HWCAP_RV('V'))
                 return adler32_rvv;
-        }
         else
 #endif
                 return adler32_base;