Skip to content

Commit 7869082

Browse files
Lzw655Lzw655
committed
feat(ports): add esp32 board ESP32_S3_BOX_3
1 parent bf32822 commit 7869082

34 files changed

+2602
-1
lines changed

‎.gitignore‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,3 +23,8 @@ user.props
2323

2424
# MacOS desktop metadata files
2525
.DS_Store
26+
27+
# lvgl
28+
**/**/lv_binding_micropython/*
29+
lextab.py
30+
yacctab.py

‎ports/esp32/CMakeLists.txt‎

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -57,7 +57,11 @@ set(SDKCONFIG_DEFAULTS ${CMAKE_BINARY_DIR}/sdkconfig.combined)
5757
include($ENV{IDF_PATH}/tools/cmake/project.cmake)
5858

5959
# Set the location of the main component for the project (one per target).
60-
list(APPEND EXTRA_COMPONENT_DIRS main_${IDF_TARGET})
60+
if (MAIN_VARIANT)
61+
list(APPEND EXTRA_COMPONENT_DIRS main_${IDF_TARGET}_${MAIN_VARIANT})
62+
else()
63+
list(APPEND EXTRA_COMPONENT_DIRS main_${IDF_TARGET})
64+
endif()
6165

6266
# Enable the panic handler wrapper
6367
idf_build_set_property(LINK_OPTIONS "-Wl,--wrap=esp_panic_handler" APPEND)

‎ports/esp32/Makefile‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,10 @@ else
2828
BUILD ?= build-$(BOARD)
2929
endif
3030

31+
ifneq ($(MAIN_VARIANT),)
32+
BUILD := $(BUILD)-$(MAIN_VARIANT)
33+
endif
34+
3135
# Device serial settings.
3236
PORT ?= /dev/ttyUSB0
3337
BAUD ?= 460800
@@ -52,6 +56,10 @@ ifdef BOARD_VARIANT
5256
IDFPY_FLAGS += -D MICROPY_BOARD_VARIANT=$(BOARD_VARIANT)
5357
endif
5458

59+
ifdef MAIN_VARIANT
60+
IDFPY_FLAGS += -D MAIN_VARIANT=$(MAIN_VARIANT)
61+
endif
62+
5563
ifdef MICROPY_PREVIEW_VERSION_2
5664
IDFPY_FLAGS += -D MICROPY_PREVIEW_VERSION_2=1
5765
endif
@@ -63,6 +71,7 @@ define RUN_IDF_PY
6371
endef
6472

6573
all:
74+
echo $(IDFPY_FLAGS)
6675
idf.py $(IDFPY_FLAGS) -B $(BUILD) build || (echo -e $(HELP_BUILD_ERROR); false)
6776
@$(PYTHON) makeimg.py \
6877
$(BUILD)/sdkconfig \

‎ports/esp32/boards/ESP32_S3_BOX_3/board.json‎

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,24 @@
1+
{
2+
"deploy": [
3+
"../deploy_s3.md"
4+
],
5+
"docs": "",
6+
"features": [
7+
"BLE",
8+
"External Flash",
9+
"External RAM",
10+
"WiFi"
11+
],
12+
"images": [
13+
"generic_s3.jpg"
14+
],
15+
"mcu": "esp32s3",
16+
"product": "ESP32-S3",
17+
"thumbnail": "",
18+
"url": "https://www.espressif.com/en/products/modules",
19+
"vendor": "Espressif",
20+
"variants": {
21+
"SPIRAM_OCT": "Support for Octal-SPIRAM",
22+
"FLASH_4M": "4MiB flash"
23+
}
24+
}

‎ports/esp32/boards/ESP32_S3_BOX_3/board.md‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
The following files are firmware that should work on most ESP32-S3-based
2+
boards with 4/8MiB of flash, including WROOM and MINI modules.
3+
4+
This firmware supports configurations with and without SPIRAM (also known as
5+
PSRAM) and will auto-detect a connected SPIRAM chip at startup and allocate
6+
the MicroPython heap accordingly. However if your board has Octal SPIRAM, then
7+
use the "spiram-oct" variant.
8+
9+
If your board has 4MiB flash (including ESP32-S3FH4R2 based ones with embedded flash), then use the "flash-4m" build.

‎ports/esp32/boards/ESP32_S3_BOX_3/mpconfigboard.cmake‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
set(IDF_TARGET esp32s3)
2+
3+
set(SDKCONFIG_DEFAULTS
4+
${SDKCONFIG_IDF_VERSION_SPECIFIC}
5+
boards/sdkconfig.usb
6+
boards/sdkconfig.ble
7+
boards/ESP32_S3_BOX_3/sdkconfig.base
8+
boards/ESP32_S3_BOX_3/sdkconfig.board
9+
)

‎ports/esp32/boards/ESP32_S3_BOX_3/mpconfigboard.h‎

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,11 @@
1+
#ifndef MICROPY_HW_BOARD_NAME
2+
// Can be set by mpconfigboard.cmake.
3+
#define MICROPY_HW_BOARD_NAME "ESP32-S3-BOX-3"
4+
#endif
5+
#define MICROPY_HW_MCU_NAME "ESP32S3"
6+
7+
// Enable UART REPL for modules that have an external USB-UART and don't use native USB.
8+
#define MICROPY_HW_ENABLE_UART_REPL (1)
9+
10+
#define MICROPY_HW_I2C0_SCL (9)
11+
#define MICROPY_HW_I2C0_SDA (8)

‎ports/esp32/boards/ESP32_S3_BOX_3/partitions-16MiB.csv‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,7 @@
1+
# Notes: the offset of the partition table itself is set in
2+
# $IDF_PATH/components/partition_table/Kconfig.projbuild.
3+
# Name, Type, SubType, Offset, Size, Flags
4+
nvs, data, nvs, 0x9000, 0x6000,
5+
phy_init, data, phy, , 0x1000,
6+
factory, app, factory, , 9M,
7+
vfs, data, fat, , 6M,

‎ports/esp32/boards/ESP32_S3_BOX_3/sdkconfig.base‎

Lines changed: 139 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,139 @@
1+
# MicroPython on ESP32, ESP IDF configuration
2+
# The following options override the defaults
3+
4+
CONFIG_IDF_FIRMWARE_CHIP_ID=0x0000
5+
6+
# Compiler options: use -O2 and disable assertions to improve performance
7+
CONFIG_COMPILER_OPTIMIZATION_PERF=y
8+
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE=y
9+
10+
# Application manager
11+
CONFIG_APP_EXCLUDE_PROJECT_VER_VAR=y
12+
CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR=y
13+
14+
# Bootloader config
15+
CONFIG_BOOTLOADER_LOG_LEVEL_WARN=y
16+
CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP=y
17+
CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE=y
18+
19+
# Change default log level to "ERROR" (instead of "INFO")
20+
CONFIG_LOG_DEFAULT_LEVEL_ERROR=y
21+
22+
# Set the maximum included log level higher than the default,
23+
# so esp.osdebug() can enable more logging at runtime.
24+
#
25+
# To increase the max log verbosity to Debug or Verbose instead, comment
26+
# CONFIG_LOG_MAXIMUM_LEVEL_INFO=y and uncomment one of the other settings.
27+
#
28+
# If not needed, the next line can be commented entirely to save binary size.
29+
CONFIG_LOG_MAXIMUM_LEVEL_INFO=y
30+
#CONFIG_LOG_MAXIMUM_LEVEL_DEBUG=y
31+
#CONFIG_LOG_MAXIMUM_LEVEL_VERBOSE=y
32+
33+
# Main XTAL Config
34+
# Only on: ESP32
35+
CONFIG_XTAL_FREQ_AUTO=y
36+
37+
# ESP System Settings
38+
# Only on: ESP32, ESP32S3
39+
CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=n
40+
CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1=n
41+
42+
# Power Management
43+
CONFIG_PM_ENABLE=y
44+
45+
# Memory protection
46+
# This is required to allow allocating IRAM
47+
CONFIG_ESP_SYSTEM_MEMPROT_FEATURE=n
48+
49+
# FreeRTOS
50+
CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=2
51+
CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y
52+
CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP=y
53+
54+
# UDP
55+
CONFIG_LWIP_PPP_SUPPORT=y
56+
CONFIG_LWIP_PPP_PAP_SUPPORT=y
57+
CONFIG_LWIP_PPP_CHAP_SUPPORT=y
58+
59+
# SSL
60+
# Use 4kiB output buffer instead of default 16kiB
61+
CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y
62+
CONFIG_MBEDTLS_HAVE_TIME_DATE=y
63+
CONFIG_MBEDTLS_PLATFORM_TIME_ALT=y
64+
CONFIG_MBEDTLS_HAVE_TIME=y
65+
66+
# Disable ALPN support as it's not implemented in MicroPython
67+
CONFIG_MBEDTLS_SSL_ALPN=n
68+
69+
# Disable slow or unused EC curves
70+
CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED=n
71+
CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED=n
72+
CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED=n
73+
CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED=n
74+
75+
# Disable certificate bundle as it's not implemented in MicroPython
76+
CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=n
77+
CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=n
78+
79+
# Allow mbedTLS to allocate from PSRAM or internal memory
80+
#
81+
# (The ESP-IDF default is internal-only, partly for physical security to prevent
82+
# possible information leakage from unencrypted PSRAM contents on the original
83+
# ESP32 - no PSRAM encryption on that chip. MicroPython doesn't support flash
84+
# encryption and is already storing the Python heap in PSRAM so this isn't a
85+
# significant factor in overall physical security.)
86+
CONFIG_MBEDTLS_DEFAULT_MEM_ALLOC=y
87+
88+
# ULP coprocessor support
89+
# Only on: ESP32, ESP32S2, ESP32S3
90+
CONFIG_ULP_COPROC_ENABLED=y
91+
CONFIG_ULP_COPROC_TYPE_FSM=y
92+
CONFIG_ULP_COPROC_RESERVE_MEM=2040
93+
94+
# For cmake build
95+
CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y
96+
CONFIG_PARTITION_TABLE_CUSTOM=y
97+
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions-4MiB.csv"
98+
99+
# To reduce iRAM usage
100+
CONFIG_ESP32_WIFI_IRAM_OPT=n
101+
CONFIG_ESP32_WIFI_RX_IRAM_OPT=n
102+
CONFIG_SPI_MASTER_ISR_IN_IRAM=n
103+
CONFIG_SPI_SLAVE_ISR_IN_IRAM=n
104+
CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR=n
105+
CONFIG_PERIPH_CTRL_FUNC_IN_IRAM=n
106+
107+
# Legacy ADC Calibration Configuration
108+
# Only on: ESP32
109+
CONFIG_ADC_CAL_EFUSE_TP_ENABLE=y
110+
CONFIG_ADC_CAL_EFUSE_VREF_ENABLE=y
111+
CONFIG_ADC_CAL_LUT_ENABLE=y
112+
113+
# UART Configuration
114+
CONFIG_UART_ISR_IN_IRAM=y
115+
116+
# IDF 5 deprecated
117+
CONFIG_ADC_SUPPRESS_DEPRECATE_WARN=y
118+
CONFIG_RMT_SUPPRESS_DEPRECATE_WARN=y
119+
120+
CONFIG_ETH_USE_SPI_ETHERNET=y
121+
CONFIG_ETH_SPI_ETHERNET_W5500=y
122+
CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL=y
123+
CONFIG_ETH_SPI_ETHERNET_DM9051=y
124+
125+
# Using newlib "nano" formatting saves size on SoCs where "nano" formatting
126+
# functions are in ROM. Note some newer chips (c2,c6) have "full" newlib
127+
# formatting in ROM instead and should override this, check
128+
# ESP_ROM_HAS_NEWLIB_NANO_FORMAT.
129+
CONFIG_NEWLIB_NANO_FORMAT=y
130+
131+
# IRAM/DRAM split protection is a memory protection feature on some parts
132+
# that support SOC_CPU_IDRAM_SPLIT_USING_PMP, eg. C2, C5, C6, H2
133+
# Due to limitations in the PMP system this feature breaks native emitters
134+
# so is disabled by default.
135+
CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT=n
136+
137+
# Further limit total sockets in TIME-WAIT when there are many short-lived
138+
# connections.
139+
CONFIG_LWIP_MAX_ACTIVE_TCP=12

‎ports/esp32/boards/ESP32_S3_BOX_3/sdkconfig.board‎

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,16 @@
1+
CONFIG_ESPTOOLPY_FLASHMODE_QIO=y
2+
CONFIG_ESPTOOLPY_FLASHSIZE_16MB=y
3+
CONFIG_PARTITION_TABLE_CUSTOM=y
4+
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="boards/ESP32_S3_BOX_3/partitions-16MiB.csv"
5+
CONFIG_COMPILER_OPTIMIZATION_PERF=y
6+
CONFIG_SPIRAM=y
7+
CONFIG_SPIRAM_MODE_OCT=y
8+
CONFIG_SPIRAM_FETCH_INSTRUCTIONS=y
9+
CONFIG_SPIRAM_RODATA=y
10+
CONFIG_SPIRAM_SPEED_80M=y
11+
CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240=y
12+
CONFIG_ESP_CONSOLE_UART_CUSTOM=y
13+
CONFIG_ESP_CONSOLE_UART_BAUDRATE=2000000
14+
CONFIG_FREERTOS_HZ=1000
15+
CONFIG_ESP_BROOKESIA_MEMORY_USE_CUSTOM=y
16+
CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG=y

0 commit comments

Comments
 (0)