ARM64: Switch Expansion Using Jump Table

Fixes #3332
To validate various addressing in #4896, I just enable this.
Previously, we only allow a load operation to JIT data (`ldr` or
`IF_LARGELDC`).
For switch expansion, jump table is also recorded into JIT data.
In this case, we only get the address of jump table head, and
load the right entry after computing offset. So, basically `adr` or
`IF_LARGEADR` is used to not only load label within code but also refer to
the location of JIT data.
The typical code sequence for switch expansion is like this:

```
  adr     x8, [@rwd00]          // load address of jump table head
  ldr     w8, [x8, x0, LSL #2]  // load jump entry from table addr + x0 * 4
  adr     x9, [G_M56320_IG02]   // load address of current baisc block
  add     x8, x8, x9            // Add them to compute the final target
  br      x8                    // Indirectly jump to the target
```

Author: kyulee1

src/jit/codegenarm64.cpp

@@ -4048,29 +4048,28 @@ void CodeGen::genCodeForCpBlk(GenTreeCpBlk* cpBlkNode)
 void
 CodeGen::genTableBasedSwitch(GenTree* treeNode)
 {
-    NYI("Emit table based switch");
     genConsumeOperands(treeNode->AsOp());
     regNumber idxReg = treeNode->gtOp.gtOp1->gtRegNum;
     regNumber baseReg = treeNode->gtOp.gtOp2->gtRegNum;
 
     regNumber tmpReg = genRegNumFromMask(treeNode->gtRsvdRegs);
 
     // load the ip-relative offset (which is relative to start of fgFirstBB)
-    //getEmitter()->emitIns_R_ARX(INS_mov, EA_4BYTE, baseReg, baseReg, idxReg, 4, 0);
+    getEmitter()->emitIns_R_R_R(INS_ldr, EA_4BYTE, baseReg, baseReg, idxReg, INS_OPTS_LSL);
 
     // add it to the absolute address of fgFirstBB
     compiler->fgFirstBB->bbFlags |= BBF_JMP_TARGET;
-    //getEmitter()->emitIns_R_L(INS_lea, EA_PTRSIZE, compiler->fgFirstBB, tmpReg);
-    //getEmitter()->emitIns_R_R(INS_add, EA_PTRSIZE, baseReg, tmpReg);
+    getEmitter()->emitIns_R_L(INS_adr, EA_PTRSIZE, compiler->fgFirstBB, tmpReg);
+    getEmitter()->emitIns_R_R_R(INS_add, EA_PTRSIZE, baseReg, baseReg, tmpReg);
+
     // jmp baseReg
-    // getEmitter()->emitIns_R(INS_i_jmp, emitTypeSize(TYP_I_IMPL), baseReg);
+    getEmitter()->emitIns_R(INS_br, emitTypeSize(TYP_I_IMPL), baseReg);
 }
 
 // emits the table and an instruction to get the address of the first element
 void
 CodeGen::genJumpTable(GenTree* treeNode)
 {
-    NYI("Emit Jump table");
     noway_assert(compiler->compCurBB->bbJumpKind == BBJ_SWITCH);
     assert(treeNode->OperGet() == GT_JMPTABLE);
 
@@ -4100,7 +4099,7 @@ CodeGen::genJumpTable(GenTree* treeNode)
     // Access to inline data is 'abstracted' by a special type of static member
     // (produced by eeFindJitDataOffs) which the emitter recognizes as being a reference
     // to constant data, not a real static field.
-    getEmitter()->emitIns_R_C(INS_lea,
+    getEmitter()->emitIns_R_C(INS_adr,
         emitTypeSize(TYP_I_IMPL),
         treeNode->gtRegNum,
         REG_NA,

src/jit/emit.cpp

@@ -3804,10 +3804,9 @@ void                emitter::emitJumpDistBind()
 #if defined(_TARGET_ARM64_)
         // JIT code and data will be allocated together for arm64 so the relative offset to JIT data is known.
         // In case such offset can be encodeable for `ldr` (+-1MB), shorten it.
-        if (emitIsLoadConstant(jmp))
+        if (jmp->idAddr()->iiaIsJitDataOffset())
         {
             // Reference to JIT data
-            assert(jmp->idAddr()->iiaIsJitDataOffset());
             assert(jmp->idIsBound());
             UNATIVE_OFFSET srcOffs = jmpIG->igOffs + jmp->idjOffs;
 
@@ -4289,6 +4288,14 @@ void                emitter::emitCheckFuncletBranch(instrDesc * jmp, insGroup *
     }
 #endif // _TARGET_ARMARCH_
 
+#ifdef _TARGET_ARM64_
+    // No interest if it's not jmp.
+    if (emitIsLoadLabel(jmp) || emitIsLoadConstant(jmp))
+    {
+        return;
+    }
+#endif // _TARGET_ARM64_
+
     insGroup * tgtIG = jmp->idAddr()->iiaIGlabel;
     assert(tgtIG);
     if (tgtIG->igFuncIdx != jmpIG->igFuncIdx)