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Verilog: rename convert_type method to elaborate_type #697

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Merged
merged 1 commit into from
Sep 17, 2024
Merged

Verilog: rename convert_type method to elaborate_type #697

merged 1 commit into from
Sep 17, 2024

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kroening
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This renames the method that elaborates types, given that it follows the elaboration procedure in the Verilog standard.

@kroening kroening marked this pull request as ready for review September 16, 2024 22:50
tautschnig
tautschnig approved these changes Sep 17, 2024
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Requires a rebase.

@kroening
Verilog: rename convert_type method to elaborate_type
f50ed82 
This renames the method that elaborates types, given that it follows the
elaboration procedure in the Verilog standard.
@kroening kroening merged commit d161573 into main Sep 17, 2024
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@kroening kroening deleted the elaborate_type branch September 17, 2024 12:19
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