ebmc: add --system-verilog command-line option

This adds the command-line option --system-verilog to ebmc, which switches
the Verilog front-end to recognize SystemVerilog.

Author: kroening

regression/verilog/force-system-verilog/main1.desc

@@ -0,0 +1,8 @@
+CORE
+main1.v
+--system-verilog
+^EXIT=10$
+^SIGNAL=0$
+^no properties$
+--
+^warning: ignoring

regression/verilog/force-system-verilog/main1.v

@@ -0,0 +1,5 @@
+module main;
+  // 'logic' is a SystemVerilog keyword
+  logic some_logic;
+  initial some_logic = 1;
+endmodule

src/ebmc/ebmc_parse_options.cpp

@@ -363,6 +363,7 @@ void ebmc_parse_optionst::help()
     " {y--show-properties}           \t list the properties in the model\n"
     " {y--property} {uid}            \t check the property with given ID\n"
     " {y-I} {upath}                  \t set include path\n"
+    " {y--system-verilog}            \t force SystemVerilog instead of Verilog\n"
     " {y--reset} {uexpr}             \t set up module reset\n"
     " {y--liveness-to-safety}        \t translate liveness properties to safety properties\n"
     "\n"

src/ebmc/ebmc_parse_options.h

@@ -46,7 +46,7 @@ class ebmc_parse_optionst:public parse_options_baset
         "(random-traces)(trace-steps):(random-seed):(number-of-traces):"
         "(random-trace)(random-waveform)"
         "(liveness-to-safety)"
-        "I:(preprocess)",
+        "I:(preprocess)(system-verilog)",
         argc,
         argv,
         std::string("EBMC ") + EBMC_VERSION),