usb: dwc3: gadget: Avoid using reserved endpoints on Intel Merrifield

JIRA: https://issues.redhat.com/browse/RHEL-78839
Conflicts:
* Context difference due to order of dwc3_pci_intel_byt_properties and
  dwc3_pci_intel_phy_charger_detect_properties structs on dwc3-pci.c

commit 461f24b
Author: Andy Shevchenko <[email protected]>
Date: Wed, 12 Feb 2025 21:28:04 +0200

  Intel Merrifield SoC uses these endpoints for tracing and they cannot
  be re-allocated if being used because the side band flow control signals
  are hard wired to certain endpoints:

  • 1 High BW Bulk IN (IN#1) (RTIT)
  • 1 1KB BW Bulk IN (IN#8) + 1 1KB BW Bulk OUT (Run Control) (OUT#8)

  In device mode, since RTIT (EP#1) and EXI/RunControl (EP#8) uses
  External Buffer Control (EBC) mode, these endpoints are to be mapped to
  EBC mode (to be done by EXI target driver). Additionally TRB for RTIT
  and EXI are maintained in STM (System Trace Module) unit and the EXI
  target driver will as well configure the TRB location for EP #1 IN
  and EP#8 (IN and OUT). Since STM/PTI and EXI hardware blocks manage
  these endpoints and interface to OTG3 controller through EBC interface,
  there is no need to enable any events (such as XferComplete etc)
  for these end points.

  Signed-off-by: Andy Shevchenko <[email protected]>
  Tested-by: Ferry Toth <[email protected]>
  Acked-by: Thinh Nguyen <[email protected]>
  Link: https://lore.kernel.org/r/[email protected]
  Signed-off-by: Greg Kroah-Hartman <[email protected]>

Signed-off-by: Desnes Nunes <[email protected]>

Author: Desnes Nunes

drivers/usb/dwc3/dwc3-pci.c

@@ -148,11 +148,21 @@ static const struct property_entry dwc3_pci_intel_phy_charger_detect_properties[
 	{}
 };
 
+/*
+ * Intel Merrifield SoC uses these endpoints for tracing and they cannot
+ * be re-allocated if being used because the side band flow control signals
+ * are hard wired to certain endpoints:
+ * - 1 High BW Bulk IN (IN#1) (RTIT)
+ * - 1 1KB BW Bulk IN (IN#8) + 1 1KB BW Bulk OUT (Run Control) (OUT#8)
+ */
+static const u8 dwc3_pci_mrfld_reserved_endpoints[] = { 3, 16, 17 };
+
 static const struct property_entry dwc3_pci_mrfld_properties[] = {
 	PROPERTY_ENTRY_STRING("dr_mode", "otg"),
 	PROPERTY_ENTRY_STRING("linux,extcon-name", "mrfld_bcove_pwrsrc"),
 	PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"),
 	PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"),
+	PROPERTY_ENTRY_U8_ARRAY("snps,reserved-endpoints", dwc3_pci_mrfld_reserved_endpoints),
 	PROPERTY_ENTRY_BOOL("snps,usb2-gadget-lpm-disable"),
 	PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
 	{}