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KurtEmjs513
authored and
pillo79
committed
Portenta H7: SPI, WIre, PWM, ADC, Video as wip
This is a replacement for PR: #71 and #82. All of the earlier commits were squashed into one. Then this was converted a few times during the #85 pr time frame as things kept changing and moving around. It has now been updated to the released .3 version. We defined the additional SPI ports and Wire ports. We defined an initial setup for Analog pins. Have similar hack to GIGA version for pure Analog. Added additional hacks for duplicated pins. That is two of the analog Pins are the exact same pin as some other digital pins... Added some PWM support. Also added WIP: camera support. Co-Authored-By: Mike S <[email protected]>
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5 files changed

+413
-21
lines changed

‎variants/arduino_portenta_h7_stm32h747xx_m7/arduino_portenta_h7_stm32h747xx_m7.conf‎

Lines changed: 19 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,9 @@ CONFIG_CDC_ACM_DTE_RATE_CALLBACK_SUPPORT=y
1111

1212
CONFIG_LLEXT_STORAGE_WRITABLE=n
1313

14+
CONFIG_SHARED_MULTI_HEAP=y
15+
CONFIG_HEAP_MEM_POOL_SIZE=2048
16+
1417
CONFIG_FPU=y
1518
CONFIG_ICACHE=y
1619
CONFIG_DCACHE=y
@@ -24,8 +27,12 @@ CONFIG_SHELL_STACK_SIZE=32768
2427
CONFIG_MAIN_STACK_SIZE=32768
2528
CONFIG_LLEXT_HEAP_SIZE=128
2629

27-
#CONFIG_ADC=y
28-
#CONFIG_PWM=y
30+
CONFIG_ADC=y
31+
CONFIG_PWM=y
32+
CONFIG_DMA=y
33+
CONFIG_MEMC=y
34+
CONFIG_SPI_ASYNC=y
35+
CONFIG_SPI_STM32_INTERRUPT=y
2936

3037
CONFIG_NET_CORE_LOG_LEVEL_DBG=y
3138

@@ -78,3 +85,13 @@ CONFIG_MBEDTLS_HEAP_SIZE=60000
7885
CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN=7168
7986
CONFIG_MBEDTLS_HASH_ALL_ENABLED=y
8087
CONFIG_MBEDTLS_CMAC=y
88+
89+
CONFIG_VIDEO=y
90+
CONFIG_VIDEO_LOG_LEVEL_DBG=y
91+
CONFIG_VIDEO_STM32_DCMI=y
92+
CONFIG_VIDEO_BUFFER_POOL_NUM_MAX=3
93+
CONFIG_VIDEO_BUFFER_POOL_SZ_MAX=614400
94+
CONFIG_VIDEO_BUFFER_POOL_ALIGN=32
95+
CONFIG_VIDEO_BUFFER_USE_SHARED_MULTI_HEAP=y
96+
CONFIG_VIDEO_BUFFER_SMH_ATTRIBUTE=2
97+
CONFIG_FLASH=y

‎variants/arduino_portenta_h7_stm32h747xx_m7/arduino_portenta_h7_stm32h747xx_m7.overlay‎

Lines changed: 308 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -14,20 +14,253 @@
1414
status = "okay";
1515
};
1616

17+
&i2c3 {
18+
status = "okay";
19+
20+
gc2145: gc2145@3c {
21+
compatible = "galaxycore,gc2145";
22+
reg = <0x3c>;
23+
status = "okay";
24+
25+
reset-gpios = <&gpioe 3 GPIO_ACTIVE_LOW>;
26+
pwdn-gpios = <&gpiod 5 GPIO_ACTIVE_LOW>;
27+
28+
port {
29+
gc2145_ep_out: endpoint {
30+
remote-endpoint = <&dcmi_ep_in>;
31+
};
32+
};
33+
};
34+
35+
ov7670: ov7670@21 {
36+
compatible = "ovti,ov7670";
37+
reg = <0x21>;
38+
39+
reset-gpios = <&gpioe 3 GPIO_ACTIVE_LOW>;
40+
pwdn-gpios = <&gpiod 5 GPIO_ACTIVE_LOW>;
41+
42+
port {
43+
ov7670_ep_out: endpoint {
44+
remote-endpoint = <&dcmi_ep_in>;
45+
};
46+
};
47+
};
48+
};
49+
50+
&i2c1 {
51+
status = "okay";
52+
};
53+
1754
&i2c4 {
1855
status = "okay";
1956
};
2057

58+
&spi2 {
59+
status = "okay";
60+
pinctrl-0 = <&spi2_sck_pi1
61+
&spi2_miso_pc2 &spi2_mosi_pc3>;
62+
pinctrl-names = "default";
63+
};
64+
65+
&timers1 {
66+
status = "okay";
67+
st,prescaler = <0>;
68+
69+
pwm1: pwm {
70+
status = "okay";
71+
pinctrl-0 = <&tim1_ch1_pa8 &tim1_ch2_pj11>;
72+
pinctrl-names = "default";
73+
};
74+
};
75+
76+
&timers3 {
77+
status = "okay";
78+
st,prescaler = <100>;
79+
80+
pwm3: pwm {
81+
status = "okay";
82+
pinctrl-0 = <&tim3_ch1_pc6 &tim3_ch2_pc7>;
83+
pinctrl-names = "default";
84+
};
85+
};
86+
87+
&timers8 {
88+
status = "okay";
89+
st,prescaler = <100>;
90+
91+
pwm8: pwm {
92+
status = "okay";
93+
pinctrl-0 = <&tim8_ch3n_ph15 &tim8_ch2_pj10 &tim8_ch2n_pj7>;
94+
pinctrl-names = "default";
95+
};
96+
};
97+
98+
&timers12 {
99+
status = "okay";
100+
st,prescaler = <100>;
101+
102+
pwm12: pwm {
103+
status = "okay";
104+
pinctrl-0 = <&tim12_ch1_ph6>;
105+
pinctrl-names = "default";
106+
};
107+
};
108+
109+
&pwm1 {
110+
/* Camera source clock */
111+
pwmclock: pwmclock {
112+
status = "okay";
113+
compatible = "pwm-clock";
114+
clock-frequency = <0>;
115+
#clock-cells = <1>;
116+
pwms = <&pwm1 1 PWM_HZ(12000000) PWM_POLARITY_NORMAL>;
117+
/* 12MHz for 7670, default is also 12MHz */
118+
};
119+
};
120+
21121
&rng {
22122
status = "okay";
23123
};
24124

125+
&dmamux1 {
126+
status = "okay";
127+
};
128+
129+
&dma1 {
130+
status = "okay";
131+
};
132+
133+
&dcmi {
134+
status = "okay";
135+
sensor = <&gc2145>;
136+
/* sensor = <&ov7670>; */
137+
/* ext-sdram = <&sdram1>; */
138+
pinctrl-0 = <&dcmi_hsync_pa4 &dcmi_pixclk_pa6 &dcmi_vsync_pi5
139+
&dcmi_d0_ph9 &dcmi_d1_ph10 &dcmi_d2_ph11 &dcmi_d3_ph12
140+
&dcmi_d4_ph14 &dcmi_d5_pi4 &dcmi_d6_pi6 &dcmi_d7_pi7>;
141+
pinctrl-names = "default";
142+
bus-width = <8>;
143+
hsync-active = <0>;
144+
vsync-active = <0>;
145+
pixelclk-active = <0>;
146+
capture-rate = <1>;
147+
dmas = <&dma1 0 75 (STM32_DMA_PERIPH_TO_MEMORY | STM32_DMA_PERIPH_NO_INC |
148+
STM32_DMA_MEM_INC | STM32_DMA_PERIPH_32BITS | STM32_DMA_MEM_32BITS |
149+
STM32_DMA_PRIORITY_HIGH) STM32_DMA_FIFO_FULL>; //FULL for 7670, default FIFO_1_4
150+
151+
port {
152+
dcmi_ep_in: endpoint {
153+
remote-endpoint = <&gc2145_ep_out>;
154+
//remote-endpoint = <&ov7670_ep_out>;
155+
};
156+
};
157+
};
158+
159+
160+
&adc1 {
161+
pinctrl-0 = <&adc1_inp12_pc2
162+
&adc1_inp13_pc3
163+
&adc1_inp18_pa4
164+
&adc1_inp3_pa6
165+
&adc1_inp0_pa0_c
166+
&adc1_inp1_pa1_c>;
167+
pinctrl-names = "default";
168+
st,adc-clock-source = "SYNC";
169+
st,adc-prescaler = <4>;
170+
status = "okay";
171+
172+
#address-cells = <1>;
173+
#size-cells = <0>;
174+
175+
channel@c {
176+
reg = <12>;
177+
zephyr,gain = "ADC_GAIN_1";
178+
zephyr,reference = "ADC_REF_INTERNAL";
179+
zephyr,acquisition-time = <ADC_ACQ_TIME_MAX>;
180+
zephyr,resolution = <16>;
181+
};
182+
channel@d {
183+
reg = <13>;
184+
zephyr,gain = "ADC_GAIN_1";
185+
zephyr,reference = "ADC_REF_INTERNAL";
186+
zephyr,acquisition-time = <ADC_ACQ_TIME_MAX>;
187+
zephyr,resolution = <16>;
188+
};
189+
channel@12 {
190+
reg = <18>;
191+
zephyr,gain = "ADC_GAIN_1";
192+
zephyr,reference = "ADC_REF_INTERNAL";
193+
zephyr,acquisition-time = <ADC_ACQ_TIME_MAX>;
194+
zephyr,resolution = <16>;
195+
};
196+
channel@3 {
197+
reg = <3>;
198+
zephyr,gain = "ADC_GAIN_1";
199+
zephyr,reference = "ADC_REF_INTERNAL";
200+
zephyr,acquisition-time = <ADC_ACQ_TIME_MAX>;
201+
zephyr,resolution = <16>;
202+
};
203+
204+
/* PA0_C and PA1_C */
205+
channel@0 {
206+
reg = <0>;
207+
zephyr,gain = "ADC_GAIN_1";
208+
zephyr,reference = "ADC_REF_INTERNAL";
209+
zephyr,acquisition-time = <ADC_ACQ_TIME_MAX>;
210+
zephyr,resolution = <16>;
211+
};
212+
channel@1 {
213+
reg = <1>;
214+
zephyr,gain = "ADC_GAIN_1";
215+
zephyr,reference = "ADC_REF_INTERNAL";
216+
zephyr,acquisition-time = <ADC_ACQ_TIME_MAX>;
217+
zephyr,resolution = <16>;
218+
};
219+
};
220+
221+
&adc3 {
222+
pinctrl-0 = <&adc3_inp0_pc2_c
223+
&adc3_inp1_pc3_c>;
224+
pinctrl-names = "default";
225+
st,adc-clock-source = "SYNC";
226+
st,adc-prescaler = <4>;
227+
status = "okay";
228+
229+
#address-cells = <1>;
230+
#size-cells = <0>;
231+
232+
channel@0 {
233+
reg = <0>;
234+
zephyr,gain = "ADC_GAIN_1";
235+
zephyr,reference = "ADC_REF_INTERNAL";
236+
zephyr,acquisition-time = <ADC_ACQ_TIME_MAX>;
237+
zephyr,resolution = <16>;
238+
};
239+
channel@1 {
240+
reg = <1>;
241+
zephyr,gain = "ADC_GAIN_1";
242+
zephyr,reference = "ADC_REF_INTERNAL";
243+
zephyr,acquisition-time = <ADC_ACQ_TIME_MAX>;
244+
zephyr,resolution = <16>;
245+
};
246+
};
247+
25248
/ {
26249
chosen {
250+
zephyr,camera = &dcmi;
27251
zephyr,console = &usart6;
28252
zephyr,shell-uart = &usart6;
29253
zephyr,cdc-acm-uart0 = &usart6;
30254
};
255+
256+
/* used to overcome problems with _C analog pins */
257+
gpioz: gpio@deadbeef {
258+
compatible = "vnd,gpio";
259+
gpio-controller;
260+
reg = <0xdeadbeef 0x1000>;
261+
#gpio-cells = <0x2>;
262+
status = "okay";
263+
};
31264
};
32265

33266
/ {
@@ -59,29 +292,85 @@
59292

60293
/ {
61294
zephyr,user {
62-
digital-pin-gpios = <&gpioh 15 GPIO_ACTIVE_LOW>,
63-
<&gpiok 1 GPIO_ACTIVE_LOW>,
64-
<&gpioj 11 GPIO_ACTIVE_LOW>,
65-
<&gpiog 7 GPIO_ACTIVE_LOW>,
66-
<&gpioc 7 GPIO_ACTIVE_LOW>,
67-
<&gpioc 6 GPIO_ACTIVE_LOW>,
68-
<&gpioa 8 GPIO_ACTIVE_LOW>,
69-
<&gpioi 0 GPIO_ACTIVE_LOW>,
70-
<&gpioc 3 GPIO_ACTIVE_LOW>,
71-
<&gpioi 1 GPIO_ACTIVE_LOW>,
72-
<&gpioc 2 GPIO_ACTIVE_LOW>,
73-
<&gpioh 8 GPIO_ACTIVE_LOW>,
74-
<&gpioh 7 GPIO_ACTIVE_LOW>,
75-
<&gpioa 10 GPIO_ACTIVE_LOW>,
76-
<&gpioa 9 GPIO_ACTIVE_LOW>,
77-
<&gpiok 5 GPIO_ACTIVE_LOW>; // LEDR
295+
digital-pin-gpios = <&gpioh 15 GPIO_ACTIVE_LOW>, /* D0 */
296+
<&gpiok 1 GPIO_ACTIVE_LOW>, /* D1 */
297+
<&gpioj 11 GPIO_ACTIVE_LOW>, /* D2 */
298+
<&gpiog 7 GPIO_ACTIVE_LOW>, /* D3 */
299+
<&gpioc 7 GPIO_ACTIVE_LOW>, /* D4 */
300+
<&gpioc 6 GPIO_ACTIVE_LOW>, /* D5 */
301+
<&gpioa 8 GPIO_ACTIVE_LOW>, /* D6 */
302+
<&gpioi 0 GPIO_ACTIVE_LOW>, /* D7 */
303+
<&gpioc 3 GPIO_ACTIVE_LOW>, /* D8 */
304+
<&gpioi 1 GPIO_ACTIVE_LOW>, /* D9 */
305+
<&gpioc 2 GPIO_ACTIVE_LOW>, /* D10 */
306+
<&gpioh 8 GPIO_ACTIVE_LOW>, /* D11 */
307+
<&gpioh 7 GPIO_ACTIVE_LOW>, /* D12 */
308+
<&gpioa 10 GPIO_ACTIVE_LOW>, /* D13 */
309+
<&gpioa 9 GPIO_ACTIVE_LOW>, /* D14 */
310+
311+
<&gpioz 0 GPIO_ACTIVE_LOW>, /* A0 ADC2_INP0 */
312+
<&gpioz 1 GPIO_ACTIVE_LOW>, /* A1 ADC2_INP1 */
313+
<&gpioz 2 GPIO_ACTIVE_LOW>, /* A2 ADC3_INP0 */
314+
<&gpioz 3 GPIO_ACTIVE_LOW>, /* A3 ADC3_INP1 */
315+
<&gpioz 4 GPIO_ACTIVE_LOW>, /* A4 hack for duplicate PC_2 */
316+
<&gpioz 5 GPIO_ACTIVE_LOW>, /* A5 hack for duplicate PC_3 */
317+
/* <&gpioc 2 GPIO_ACTIVE_LOW>, A4 _ALT0? ADC1_INP12 */
318+
/* <&gpioc 3 GPIO_ACTIVE_LOW>, A5 _ALT0? ADC1_INP13 */
319+
<&gpioa 4 GPIO_ACTIVE_LOW>, /* A6 ADC1_INP18 */
320+
<&gpioa 6 GPIO_ACTIVE_LOW>, /* A7 ADC1_INP7 */
321+
322+
<&gpiok 5 GPIO_ACTIVE_LOW>, /* LEDR */
323+
<&gpiok 6 GPIO_ACTIVE_LOW>, /* LEDG */
324+
<&gpiok 7 GPIO_ACTIVE_LOW>; /* LEDB */
78325

79326
builtin-led-gpios = <&gpiok 5 GPIO_ACTIVE_LOW>,
80-
<&gpiok 6 GPIO_ACTIVE_LOW>,
81-
<&gpiok 7 GPIO_ACTIVE_LOW>;
327+
<&gpiok 6 GPIO_ACTIVE_LOW>,
328+
<&gpiok 7 GPIO_ACTIVE_LOW>;
329+
330+
pwm-pin-gpios = <&gpioa 8 0>,
331+
<&gpioc 6 0>,
332+
<&gpioc 7 0>,
333+
//<&gpiog 7 0>,
334+
<&gpioj 11 0>,
335+
//<&gpiok 1 0>,
336+
<&gpioh 15 0>,
337+
<&gpioj 7 0>,
338+
<&gpioj 10 0>,
339+
<&gpioh 6 0>;
340+
341+
adc-pin-gpios = <&gpioz 0 0>, /* analog only */
342+
<&gpioz 1 0>, /* analog only */
343+
<&gpioz 2 0>, /* analog only */
344+
<&gpioz 3 0>, /* analog only */
345+
<&gpioc 2 0>,
346+
<&gpioc 3 0>,
347+
<&gpioa 4 0>,
348+
<&gpioa 6 0>,
349+
<&gpioz 4 0>, /* Hack for D19 */
350+
<&gpioz 5 0>; /* Hack for D20 */
82351

83352
serials = <&board_cdc_acm_uart>,<&usart6>, <&usart1>, <&uart4>;
84353
cdc-acm = <&board_cdc_acm_uart>;
85-
i2cs = <&i2c4>;
354+
i2cs = <&i2c3>, <&i2c1>, <&i2c4>;
355+
spis = <&spi2>;
356+
pwms = <&pwm1 1 PWM_HZ(12000000) PWM_POLARITY_NORMAL>, /* Camera */
357+
<&pwm3 1 PWM_HZ(500) PWM_POLARITY_NORMAL>,
358+
<&pwm3 2 PWM_HZ(500) PWM_POLARITY_NORMAL>,
359+
<&pwm1 2 PWM_HZ(5000) PWM_POLARITY_NORMAL>,
360+
<&pwm8 3 PWM_HZ(500) PWM_POLARITY_INVERTED>,
361+
<&pwm8 2 PWM_HZ(500) PWM_POLARITY_INVERTED>,
362+
<&pwm8 2 PWM_HZ(500) PWM_POLARITY_NORMAL>,
363+
<&pwm12 1 PWM_HZ(500) PWM_POLARITY_NORMAL>;
364+
365+
io-channels = <&adc1 0>,
366+
<&adc1 1>,
367+
<&adc3 0>,
368+
<&adc3 1>,
369+
<&adc1 12>,
370+
<&adc1 13>,
371+
<&adc1 18>,
372+
<&adc1 3>,
373+
<&adc1 12>, /* Hack for D19 */
374+
<&adc1 13>; /* Hack for D20 */
86375
};
87376
};

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