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lines changed Original file line number Diff line number Diff line change 33-DAPPLICATION_ADDR=0x8040000
44-DAPPLICATION_RAM_ADDR=0x24000000
55-DAPPLICATION_RAM_SIZE=0x80000
6- -DAPPLICATION_SIZE=0xc0000
6+ -DAPPLICATION_SIZE=0x1c0000
77-DMBED_RAM1_SIZE=0x80000
88-DMBED_RAM1_START=0x24000000
99-DMBED_RAM_SIZE=0x80000
1010-DMBED_RAM_START=0x24000000
11- -DMBED_ROM_SIZE=0x100000
11+ -DMBED_ROM_SIZE=0x200000
1212-DMBED_ROM_START=0x8000000
1313-DMBED_TRAP_ERRORS_ENABLED=1
1414-Os
Original file line number Diff line number Diff line change 55-DAPPLICATION_ADDR=0x8040000
66-DAPPLICATION_RAM_ADDR=0x24000000
77-DAPPLICATION_RAM_SIZE=0x80000
8- -DAPPLICATION_SIZE=0xc0000
8+ -DAPPLICATION_SIZE=0x1c0000
99-DMBED_RAM1_SIZE=0x80000
1010-DMBED_RAM1_START=0x24000000
1111-DMBED_RAM_SIZE=0x80000
1212-DMBED_RAM_START=0x24000000
13- -DMBED_ROM_SIZE=0x100000
13+ -DMBED_ROM_SIZE=0x200000
1414-DMBED_ROM_START=0x8000000
1515-DMBED_TRAP_ERRORS_ENABLED=1
1616-Os
Original file line number Diff line number Diff line change 4444-DEXTRA_IDLE_STACK_REQUIRED
4545-DFEATURE_BLE=1
4646-D__FPU_PRESENT=1
47+ -DLSE_STARTUP_TIMEOUT=200
4748-D__MBED__=1
48- -DMBED_BUILD_TIMESTAMP=1657634193.764244
49+ -DMBED_BUILD_TIMESTAMP=1661346223.3493464
4950-D__MBED_CMSIS_RTOS_CM
5051-DMBED_TICKLESS
5152-DMBEDTLS_FS_IO
8283-DUSE_HAL_DRIVER
8384-DVIRTIO_MASTER_ONLY
8485-DMBED_NO_GLOBAL_USING_DIRECTIVE=1
85- -DCORE_MAJOR=3
86- -DCORE_MINOR=2
87- -DCORE_PATCH=0
86+ -DCORE_MAJOR=
87+ -DCORE_MINOR=
88+ -DCORE_PATCH=
8889-DUSE_ARDUINO_PINOUT
Original file line number Diff line number Diff line change 1- -DMBED_APP_SIZE=0xc0000
1+ -DMBED_APP_SIZE=0x1c0000
22-DMBED_APP_START=0x8040000
33-DMBED_BOOT_STACK_SIZE=1024
44-DMBED_RAM1_SIZE=0x80000
55-DMBED_RAM1_START=0x24000000
66-DMBED_RAM_SIZE=0x80000
77-DMBED_RAM_START=0x24000000
8- -DMBED_ROM_SIZE=0x100000
8+ -DMBED_ROM_SIZE=0x200000
99-DMBED_ROM_START=0x8000000
1010-DXIP_ENABLE=0
1111-Wl,--gc-sections
Original file line number Diff line number Diff line change 11MEMORY
22{
3- FLASH (rx) : ORIGIN = 0x8040000 , LENGTH = CM4_BINARY_START - 0x8040000
3+ FLASH (rx) : ORIGIN = 0x8040000 , LENGTH = 0x1c0000
44 DTCMRAM (rwx) : ORIGIN = 0x20000000 + (((166 * 4 ) + 7 ) & 0xFFFFFFF8 ), LENGTH = 128K - (((166 * 4 ) + 7 ) & 0xFFFFFFF8 )
55 RAM (xrw) : ORIGIN = 0x24000000 , LENGTH = 0x80000
66 RAM_D2 (xrw) : ORIGIN = 0x30000000 , LENGTH = 288K
Original file line number Diff line number Diff line change 382382#define MBED_CONF_TARGET_LPTICKER_LPTIM 1 // set by target:MCU_STM32H7
383383#define MBED_CONF_TARGET_LPTICKER_LPTIM_CLOCK 1 // set by target:MCU_STM32
384384#define MBED_CONF_TARGET_LPUART_CLOCK_SOURCE USE_LPUART_CLK_LSE|USE_LPUART_CLK_PCLK1|USE_LPUART_CLK_PCLK3 // set by target:MCU_STM32
385- #define MBED_CONF_TARGET_LSE_AVAILABLE 0 // set by target:PORTENTA_H7
385+ #define MBED_CONF_TARGET_LSE_AVAILABLE 1 // set by target:PORTENTA_H7
386386#define MBED_CONF_TARGET_LSE_BYPASS 1 // set by target:PORTENTA_H7
387387#define MBED_CONF_TARGET_LSE_DRIVE_LOAD_LEVEL RCC_LSEDRIVE_LOW // set by target:MCU_STM32H7
388388#define MBED_CONF_TARGET_MPU_ROM_END 0x0fffffff // set by target:Target
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