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# General description
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This repository contains testbenches and verification components for systemlevel projects or components connected at block level from the [hdl](https://github.com/analogdevicesinc/hdl) repository.
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This repository contains testbenches and verification components for system-level projects or components connected at block level from the [hdl](https://github.com/analogdevicesinc/hdl) repository.
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This repository is not a stand alone one. It must be cloned or linked as a submodule inside the [hdl](https://github.com/analogdevicesinc/hdl) repository you want to test.
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This repository is not a standalone one. It must be cloned or linked as a submodule inside the [hdl](https://github.com/analogdevicesinc/hdl) repository you want to test.
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The folder structure of the hdl will look as follows:
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The folder structure of the HDL will look as follows:
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hdl
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- projects
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- library
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- testbenches
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## Setup
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The testbenches are built around Xilinx verification IPs so it requires Vivado to be set up according to the hdl repository requirenments.
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Running the testbenches relies on the build mechanism from the hdl repository, make sure you have a proper setup for Xilinx flow described [here](https://wiki.analog.com/resources/fpga/docs/build)
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The testbenches are built around Xilinx verification IPs so it requires Vivado to be set up according to the HDL repository requirements.
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Running the testbenches relies on the build mechanism from the HDL repository, make sure you have a proper setup for Xilinx flow described [here](https://wiki.analog.com/resources/fpga/docs/build)
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## Running a testbench:
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Change the workig directory to the testbench you want to run:
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Change the working directory to the testbench you want to run:
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cd testbenches/fmcomms2
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The scripts first will build all components used from the hdl library, build the block design environment based on a configuration file that describes parameters of under test block, then will actually run the test.
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These steps are separated in ordrer to be able to run multiple tests on the same configuration without rebuilding the block desing every time.
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The scripts first will build all components used from the HDL library, build the block design environment based on a configuration file that describes parameters of under test block, then will actually run the test.
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These steps are separated in order to be able to run multiple tests on the same configuration without rebuilding the block design every time.
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### Run all tests in batch mode:
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make CFG=<name of cfg> TST=<name of test> MODE=gui
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### Run all test from a configuration:
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### Run all tests from a configuration:
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make <name of cfg>
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*\<name of cfg\> is a file from the cfgs directory without the tcl extension of format cfg\*
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*\<name of test\> is a file from the tests directory without the tcl extension
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