Skip to content

Fix spi gaps #4487

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 5 commits into from
Mar 26, 2021
Merged

Fix spi gaps #4487

merged 5 commits into from
Mar 26, 2021

Conversation

jepler
Copy link

@jepler jepler commented Mar 25, 2021

It's possible to configure very large gaps between transfers (bytes), and indeed this is what we ended up with by using LPSPI_MasterGetDefaultConfig.

Set all the delays to zero, enable a bit for "continuous transfers", and cap the speed at 30MHz per the datasheet's restrictions.

After this change, here is a view of a transfer at 30MHz:
image

I tested on the MIMXRT1010-EVK both with a logic analyzer on the SCK and MOSI pins, and with a loopback wire from MOSI to MISO. (comment out the equality-assertion when scoping, put it back when looping back)

import sys
import time
import board
import digitalio

b = board.SPI()
l = digitalio.DigitalInOut(board.USER_LED)
l.switch_to_output()

while not b.try_lock():
    pass
data = bytes([0x55, 0xaa, 0, 0xff]) * 8
data_in = bytearray(len(data))

baudrates = [1_000_000 << rs for rs in range(6)]
while True:
    l.value = True
    for baudrate in baudrates:
        b.configure(baudrate=baudrate)
        print(baudrate, b.frequency)
        b.write_readinto(data, data_in)
        #b.write(data)
        print(data_in)
        assert data == data_in
    l.value = False
    time.sleep(1)

b.unlock()

image

Closes: #3062

Copy link
Member

@tannewt tannewt left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

One question. Good otherwise! Nice bug hunting!

tannewt
tannewt previously approved these changes Mar 25, 2021
Copy link
Member

@tannewt tannewt left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Nice work! Thank you!

ladyada
ladyada previously approved these changes Mar 25, 2021
Copy link
Member

@ladyada ladyada left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

definietely faster - esp32spi not working now but probably because some edge case in timing is being hit in the nina-fw.

jepler added 4 commits March 26, 2021 10:01
.. so that it is more conveniently like the metro m7 for my testing
.. and set the "MasterPcsContinuous" flag, which removes some of the
gap between bytes of a single SPI transaction
Set the betweenTransferDelay to the SCK low-time, to avoid long pauses
between bytes (transfers) while preventing the last SCK cycle in a byte
from being a runt pulse.

Compared to an earlier revision of this change, which just set the delays
all to zero, this doesn't break using an AirLift, which was sensitive
to the runt pulses (the simple loopback-wire test didn't detect the problem)
@jepler jepler dismissed stale reviews from ladyada and tannewt via 231cb1f March 26, 2021 15:59
Copy link
Member

@ladyada ladyada left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

yay this now works for ESP32SPI!

@jepler jepler merged commit 999f713 into adafruit:main Mar 26, 2021
@jepler jepler deleted the fix-spi-gaps branch November 3, 2021 21:09
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

Teensy 4.0 / i.MXRT1062 displayio via SPI very slow
3 participants