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#include " im2col.cuh"
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+ #define MIN (a, b ) (a) < (b) ? (a) : (b)
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+
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+ #define MAX_GRIDDIM_Z 65535
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+
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template <typename T>
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static __global__ void im2col_kernel (
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- const float * x, T * dst, int64_t batch_offset,
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- int64_t offset_delta, int64_t IC, int64_t IW, int64_t IH, int64_t OH, int64_t OW, int64_t KW, int64_t KH, int64_t pelements, int64_t CHW,
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+ const float * x, T * dst,
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+ int64_t IC, int64_t IW, int64_t IH, int64_t OH, int64_t OW, int64_t KW, int64_t KH,
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+ int64_t IC_IH_IW, int64_t IH_IW, int64_t N_OH, int64_t KH_KW, int64_t IC_KH_KW,
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int s0, int s1, int p0, int p1, int d0, int d1) {
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const int64_t i = threadIdx .x + blockIdx .x * blockDim .x ;
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- if (i >= pelements ) {
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+ if (i >= IC_KH_KW ) {
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return ;
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}
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- const int64_t ksize = OW * (KH > 1 ? KW : 1 );
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- const int64_t kx = i / ksize;
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- const int64_t kd = kx * ksize;
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- const int64_t ky = (i - kd) / OW;
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- const int64_t ix = i % OW;
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+ const int64_t iic = i / (KH_KW);
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+ const int64_t rem = i - iic * KH_KW;
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+ const int64_t ikh = rem / KW;
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+ const int64_t ikw = rem - ikh * KW;
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- const int64_t oh = blockIdx .y ;
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- const int64_t batch = blockIdx .z / IC;
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- const int64_t ic = blockIdx .z % IC;
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+ const int64_t iow = blockIdx .y ;
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+ for (int64_t iz = blockIdx .z ; iz < N_OH; iz+=MAX_GRIDDIM_Z) {
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+ const int64_t in = iz / OH;
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+ const int64_t ioh = iz - in * OH;
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- const int64_t iiw = ix * s0 + kx * d0 - p0;
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- const int64_t iih = oh * s1 + ky * d1 - p1;
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+ const int64_t iiw = iow * s0 + ikw * d0 - p0;
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+ const int64_t iih = ioh * s1 + ikh * d1 - p1;
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- const int64_t offset_dst =
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- ((batch * OH + oh) * OW + ix) * CHW +
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- (ic * (KW * KH) + ky * KW + kx);
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+ const int64_t offset_dst =
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+ ((in * OH + ioh) * OW + iow) * IC_KH_KW + iic * KH_KW + ikh * KW + ikw;
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- if (iih < 0 || iih >= IH || iiw < 0 || iiw >= IW) {
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- dst[offset_dst] = 0 .0f ;
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- } else {
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- const int64_t offset_src = ic * offset_delta + batch * batch_offset;
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- dst[offset_dst] = x[offset_src + iih * IW + iiw];
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+ if (iih < 0 || iih >= IH || iiw < 0 || iiw >= IW) {
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+ dst[offset_dst] = 0 .0f ;
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+ } else {
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+ const int64_t offset_src = iic * IC_IH_IW + in * IH_IW;
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+ dst[offset_dst] = x[offset_src + iih * IW + iiw];
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+ }
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}
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}
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+ // im2col: [N, IC, IH, IW] => [N, OH, OW, IC*KH*KW]
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template <typename T>
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static void im2col_cuda (const float * x, T* dst,
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int64_t IW, int64_t IH, int64_t OW, int64_t OH, int64_t KW, int64_t KH, int64_t IC,
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- int64_t batch , int64_t batch_offset , int64_t offset_delta ,
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+ int64_t N , int64_t IC_IH_IW , int64_t IH_IW ,
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int s0,int s1,int p0,int p1,int d0,int d1, cudaStream_t stream) {
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- const int parallel_elements = OW * KW * KH;
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- const int num_blocks = (parallel_elements + CUDA_IM2COL_BLOCK_SIZE - 1 ) / CUDA_IM2COL_BLOCK_SIZE;
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- dim3 block_nums (num_blocks, OH, batch * IC);
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- im2col_kernel<<<block_nums, CUDA_IM2COL_BLOCK_SIZE, 0 , stream>>> (x, dst, batch_offset, offset_delta, IC, IW, IH, OH, OW, KW, KH, parallel_elements, (IC * KH * KW), s0, s1, p0, p1, d0, d1);
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+ const int64_t IC_KH_KW = IC * KH * KW;
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+ const int64_t num_blocks = (IC_KH_KW + CUDA_IM2COL_BLOCK_SIZE - 1 ) / CUDA_IM2COL_BLOCK_SIZE;
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+ const int64_t N_OH = N * OH;
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+ const int64_t KH_KW = KW*KH;
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+ dim3 block_nums (num_blocks, OW, MIN (N_OH, MAX_GRIDDIM_Z));
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+ im2col_kernel<<<block_nums, MIN(IC_KH_KW, CUDA_IM2COL_BLOCK_SIZE) , 0 , stream>>> (x, dst, IC, IW, IH, OH, OW, KW, KH,
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+ IC_IH_IW, IH_IW, N_OH, KH_KW, IC_KH_KW,
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+ s0, s1, p0, p1, d0, d1);
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}
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static void im2col_cuda_f16 (const float * x, half * dst,
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int64_t IW, int64_t IH, int64_t OW, int64_t OH, int64_t KW, int64_t KH, int64_t IC,
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- int64_t batch , int64_t batch_offset , int64_t offset_delta ,
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+ int64_t N , int64_t IC_IH_IW , int64_t IH_IW ,
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int s0,int s1,int p0,int p1,int d0,int d1, cudaStream_t stream) {
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- im2col_cuda<half>(x, dst, IW, IH, OW, OH, KW, KH, IC, batch, batch_offset, offset_delta , s0, s1, p0, p1, d0, d1, stream);
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+ im2col_cuda<half>(x, dst, IW, IH, OW, OH, KW, KH, IC, N, IC_IH_IW, IH_IW , s0, s1, p0, p1, d0, d1, stream);
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}
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static void im2col_cuda_f32 (const float * x, float * dst,
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int64_t IW, int64_t IH, int64_t OW, int64_t OH, int64_t KW, int64_t KH, int64_t IC,
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- int64_t batch , int64_t batch_offset , int64_t offset_delta ,
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+ int64_t N , int64_t IC_IH_IW , int64_t IH_IW ,
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int s0,int s1,int p0,int p1,int d0,int d1, cudaStream_t stream) {
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- im2col_cuda<float >(x, dst, IW, IH, OW, OH, KW, KH, IC, batch, batch_offset, offset_delta , s0, s1, p0, p1, d0, d1, stream);
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+ im2col_cuda<float >(x, dst, IW, IH, OW, OH, KW, KH, IC, N, IC_IH_IW, IH_IW , s0, s1, p0, p1, d0, d1, stream);
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}
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void ggml_cuda_op_im2col (ggml_backend_cuda_context & ctx, ggml_tensor * dst) {
@@ -69,7 +79,6 @@ void ggml_cuda_op_im2col(ggml_backend_cuda_context & ctx, ggml_tensor * dst) {
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float * dst_d = (float *)dst->data ;
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cudaStream_t stream = ctx.stream ();
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- GGML_ASSERT (src0->type == GGML_TYPE_F16);
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GGML_ASSERT (src1->type == GGML_TYPE_F32);
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GGML_ASSERT ( dst->type == GGML_TYPE_F16 || dst->type == GGML_TYPE_F32);
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@@ -92,13 +101,13 @@ void ggml_cuda_op_im2col(ggml_backend_cuda_context & ctx, ggml_tensor * dst) {
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const int64_t OH = is_2D ? dst->ne [2 ] : 1 ;
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const int64_t OW = dst->ne [1 ];
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- const size_t delta_offset = src1->nb [is_2D ? 2 : 1 ] / 4 ; // nb is byte offset, src is type float32
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- const int64_t batch = src1->ne [3 ];
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- const size_t batch_offset = src1->nb [3 ] / 4 ; // nb is byte offset, src is type float32
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+ const int64_t IC_IH_IW = src1->nb [is_2D ? 2 : 1 ] / 4 ; // nb is byte offset, src is type float32
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+ const int64_t N = src1->ne [is_2D ? 3 : 2 ];
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+ const int64_t IH_IW = src1->nb [is_2D ? 3 : 2 ] / 4 ; // nb is byte offset, src is type float32
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if (dst->type == GGML_TYPE_F16) {
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- im2col_cuda_f16 (src1_d, (half *) dst_d, IW, IH, OW, OH, KW, KH, IC, batch, batch_offset, delta_offset , s0, s1, p0, p1, d0, d1, stream);
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+ im2col_cuda_f16 (src1_d, (half *) dst_d, IW, IH, OW, OH, KW, KH, IC, N, IC_IH_IW, IH_IW , s0, s1, p0, p1, d0, d1, stream);
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} else {
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- im2col_cuda_f32 (src1_d, (float *) dst_d, IW, IH, OW, OH, KW, KH, IC, batch, batch_offset, delta_offset , s0, s1, p0, p1, d0, d1, stream);
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+ im2col_cuda_f32 (src1_d, (float *) dst_d, IW, IH, OW, OH, KW, KH, IC, N, IC_IH_IW, IH_IW , s0, s1, p0, p1, d0, d1, stream);
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}
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}
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