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Merged main:71c83fb8b618 into amd-gfx:71157ae85e25
Local branch amd-gfx 71157ae Merged main:5bd1b93cb220 into amd-gfx:18b1fa897044 Remote branch main 71c83fb [LLD] Improve the lit tests added by 272bd6f Change-Id: Ie703606fdba1534ec832bd13806101d3e5cc3354
2 parents 71157ae + 71c83fb commit 286fb30

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lld/test/ELF/lto/devirt_validate_vtable_typeinfos.ll

Lines changed: 1 addition & 1 deletion
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@@ -3,7 +3,7 @@
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;; Common artifacts
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; RUN: opt --thinlto-bc -o %t1.o %s
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; RUN: opt --thinlto-bc --thinlto-split-lto-unit -o %t1_hybrid.o %s
6-
; RUN: cp %s %t1_regular.ll
6+
; RUN: cat %s > %t1_regular.ll
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; RUN: echo '!llvm.module.flags = !{!12, !13}' >> %t1_regular.ll
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; RUN: echo '!12 = !{i32 1, !"ThinLTO", i32 0}' >> %t1_regular.ll
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; RUN: echo '!13 = !{i32 1, !"EnableSplitLTOUnit", i32 1}' >> %t1_regular.ll

lld/test/ELF/lto/devirt_validate_vtable_typeinfos_no_rtti.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
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;; Common artifacts
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; RUN: opt --thinlto-bc -o %t1.o %s
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; RUN: opt --thinlto-bc --thinlto-split-lto-unit -o %t1_hybrid.o %s
6-
; RUN: cp %s %t1_regular.ll
6+
; RUN: cat %s > %t1_regular.ll
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; RUN: echo '!llvm.module.flags = !{!6, !7}' >> %t1_regular.ll
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; RUN: echo '!6 = !{i32 1, !"ThinLTO", i32 0}' >> %t1_regular.ll
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; RUN: echo '!7 = !{i32 1, !"EnableSplitLTOUnit", i32 1}' >> %t1_regular.ll

lld/test/ELF/lto/devirt_validate_vtable_typeinfos_ref.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
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;; Common artifacts
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; RUN: opt --thinlto-bc -o %t1.o %s
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; RUN: opt --thinlto-bc --thinlto-split-lto-unit -o %t1_hybrid.o %s
6-
; RUN: cp %s %t1_regular.ll
6+
; RUN: cat %s > %t1_regular.ll
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; RUN: echo '!llvm.module.flags = !{!2, !3}' >> %t1_regular.ll
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; RUN: echo '!2 = !{i32 1, !"ThinLTO", i32 0}' >> %t1_regular.ll
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; RUN: echo '!3 = !{i32 1, !"EnableSplitLTOUnit", i32 1}' >> %t1_regular.ll

lldb/include/lldb/Utility/RegisterValue.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,9 @@ class RegisterValue {
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// byte AArch64 SVE.
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kTypicalRegisterByteSize = 256u,
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// Anything else we'll heap allocate storage for it.
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kMaxRegisterByteSize = kTypicalRegisterByteSize,
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// 256x256 to support 256 byte AArch64 SME's array storage (ZA) register.
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// Which is a square of vector length x vector length.
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kMaxRegisterByteSize = 256u * 256u,
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};
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typedef llvm::SmallVector<uint8_t, kTypicalRegisterByteSize> BytesContainer;

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