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Remove __NVIC_PRIO_BITS and configPRIO_BITS check
* Remove __NVIC_PRIO_BITS and configPRIO_BITS check in CM3 and CM4 * Add hardware not implemented bits check. These bits should be zero.
1 parent 79eaf66 commit 13f418e

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16 files changed

+112
-464
lines changed

16 files changed

+112
-464
lines changed

‎portable/CCS/ARM_CM3/port.c

Lines changed: 7 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -249,6 +249,13 @@ BaseType_t xPortStartScheduler( void )
249249
* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
250250
configASSERT( ucMaxSysCallPriority );
251251

252+
/* Check if the bits hardware does not implement are zero in configMAX_SYSCALL_INTERRUPT_PRIORITY.
253+
* Assertion here helps inform that the configuration is not set to hardware
254+
* as expected, although hardware ignores these bits. Possible reason here is
255+
* that __NVIC_PRIO_BITS or configPRIO_BITS is set greater than hardware
256+
* implemented bits. */
257+
configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & ( ~ucMaxPriorityValue ) ) == 0U );
258+
252259
/* Calculate the maximum acceptable priority group value for the number
253260
* of bits read back. */
254261

@@ -285,35 +292,6 @@ BaseType_t xPortStartScheduler( void )
285292
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits;
286293
}
287294

288-
/* The interrupt priority bits are not modelled in QEMU and the assert that
289-
* checks the number of implemented bits and __NVIC_PRIO_BITS will always fail.
290-
* Therefore, this assert is not adding any value for QEMU targets. The config
291-
* option `configDISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
292-
* `FreeRTOSConfig.h` for QEMU targets. */
293-
#ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK
294-
{
295-
#ifdef __NVIC_PRIO_BITS
296-
{
297-
/*
298-
* Check that the number of implemented priority bits queried from
299-
* hardware is equal to the CMSIS __NVIC_PRIO_BITS configuration macro.
300-
*/
301-
configASSERT( ulImplementedPrioBits == __NVIC_PRIO_BITS );
302-
}
303-
#endif /* __NVIC_PRIO_BITS */
304-
305-
#ifdef configPRIO_BITS
306-
{
307-
/*
308-
* Check that the number of implemented priority bits queried from
309-
* hardware is equal to the FreeRTOS configPRIO_BITS configuration macro.
310-
*/
311-
configASSERT( ulImplementedPrioBits == configPRIO_BITS );
312-
}
313-
#endif /* configPRIO_BITS */
314-
}
315-
#endif /* #ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK */
316-
317295
/* Shift the priority group value back to its position within the AIRCR
318296
* register. */
319297
ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;

‎portable/CCS/ARM_CM4F/port.c

Lines changed: 7 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -268,6 +268,13 @@ BaseType_t xPortStartScheduler( void )
268268
* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
269269
configASSERT( ucMaxSysCallPriority );
270270

271+
/* Check if the bits hardware does not implement are zero in configMAX_SYSCALL_INTERRUPT_PRIORITY.
272+
* Assertion here helps inform that the configuration is not set to hardware
273+
* as expected, although hardware ignores these bits. Possible reason here is
274+
* that __NVIC_PRIO_BITS or configPRIO_BITS is set greater than hardware
275+
* implemented bits. */
276+
configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & ( ~ucMaxPriorityValue ) ) == 0U );
277+
271278
/* Calculate the maximum acceptable priority group value for the number
272279
* of bits read back. */
273280

@@ -304,35 +311,6 @@ BaseType_t xPortStartScheduler( void )
304311
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits;
305312
}
306313

307-
/* The interrupt priority bits are not modelled in QEMU and the assert that
308-
* checks the number of implemented bits and __NVIC_PRIO_BITS will always fail.
309-
* Therefore, this assert is not adding any value for QEMU targets. The config
310-
* option `configDISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
311-
* `FreeRTOSConfig.h` for QEMU targets. */
312-
#ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK
313-
{
314-
#ifdef __NVIC_PRIO_BITS
315-
{
316-
/*
317-
* Check that the number of implemented priority bits queried from
318-
* hardware is equal to the CMSIS __NVIC_PRIO_BITS configuration macro.
319-
*/
320-
configASSERT( ulImplementedPrioBits == __NVIC_PRIO_BITS );
321-
}
322-
#endif /* __NVIC_PRIO_BITS */
323-
324-
#ifdef configPRIO_BITS
325-
{
326-
/*
327-
* Check that the number of implemented priority bits queried from
328-
* hardware is equal to the FreeRTOS configPRIO_BITS configuration macro.
329-
*/
330-
configASSERT( ulImplementedPrioBits == configPRIO_BITS );
331-
}
332-
#endif /* configPRIO_BITS */
333-
}
334-
#endif /* #ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK */
335-
336314
/* Shift the priority group value back to its position within the AIRCR
337315
* register. */
338316
ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;

‎portable/GCC/ARM_CM3/port.c

Lines changed: 7 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -292,6 +292,13 @@ BaseType_t xPortStartScheduler( void )
292292
* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
293293
configASSERT( ucMaxSysCallPriority );
294294

295+
/* Check if the bits hardware does not implement are zero in configMAX_SYSCALL_INTERRUPT_PRIORITY.
296+
* Assertion here helps inform that the configuration is not set to hardware
297+
* as expected, although hardware ignores these bits. Possible reason here is
298+
* that __NVIC_PRIO_BITS or configPRIO_BITS is set greater than hardware
299+
* implemented bits. */
300+
configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & ( ~ucMaxPriorityValue ) ) == 0U );
301+
295302
/* Calculate the maximum acceptable priority group value for the number
296303
* of bits read back. */
297304

@@ -328,35 +335,6 @@ BaseType_t xPortStartScheduler( void )
328335
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits;
329336
}
330337

331-
/* The interrupt priority bits are not modelled in QEMU and the assert that
332-
* checks the number of implemented bits and __NVIC_PRIO_BITS will always fail.
333-
* Therefore, this assert is not adding any value for QEMU targets. The config
334-
* option `configDISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
335-
* `FreeRTOSConfig.h` for QEMU targets. */
336-
#ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK
337-
{
338-
#ifdef __NVIC_PRIO_BITS
339-
{
340-
/*
341-
* Check that the number of implemented priority bits queried from
342-
* hardware is equal to the CMSIS __NVIC_PRIO_BITS configuration macro.
343-
*/
344-
configASSERT( ulImplementedPrioBits == __NVIC_PRIO_BITS );
345-
}
346-
#endif /* __NVIC_PRIO_BITS */
347-
348-
#ifdef configPRIO_BITS
349-
{
350-
/*
351-
* Check that the number of implemented priority bits queried from
352-
* hardware is equal to the FreeRTOS configPRIO_BITS configuration macro.
353-
*/
354-
configASSERT( ulImplementedPrioBits == configPRIO_BITS );
355-
}
356-
#endif /* configPRIO_BITS */
357-
}
358-
#endif /* #ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK */
359-
360338
/* Shift the priority group value back to its position within the AIRCR
361339
* register. */
362340
ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;

‎portable/GCC/ARM_CM3_MPU/port.c

Lines changed: 7 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -415,6 +415,13 @@ BaseType_t xPortStartScheduler( void )
415415
* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
416416
configASSERT( ucMaxSysCallPriority );
417417

418+
/* Check if the bits hardware does not implement are zero in configMAX_SYSCALL_INTERRUPT_PRIORITY.
419+
* Assertion here helps inform that the configuration is not set to hardware
420+
* as expected, although hardware ignores these bits. Possible reason here is
421+
* that __NVIC_PRIO_BITS or configPRIO_BITS is set greater than hardware
422+
* implemented bits. */
423+
configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & ( ~ucMaxPriorityValue ) ) == 0U );
424+
418425
/* Calculate the maximum acceptable priority group value for the number
419426
* of bits read back. */
420427

@@ -451,35 +458,6 @@ BaseType_t xPortStartScheduler( void )
451458
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits;
452459
}
453460

454-
/* The interrupt priority bits are not modelled in QEMU and the assert that
455-
* checks the number of implemented bits and __NVIC_PRIO_BITS will always fail.
456-
* Therefore, this assert is not adding any value for QEMU targets. The config
457-
* option `configDISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
458-
* `FreeRTOSConfig.h` for QEMU targets. */
459-
#ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK
460-
{
461-
#ifdef __NVIC_PRIO_BITS
462-
{
463-
/*
464-
* Check that the number of implemented priority bits queried from
465-
* hardware is equal to the CMSIS __NVIC_PRIO_BITS configuration macro.
466-
*/
467-
configASSERT( ulImplementedPrioBits == __NVIC_PRIO_BITS );
468-
}
469-
#endif /* __NVIC_PRIO_BITS */
470-
471-
#ifdef configPRIO_BITS
472-
{
473-
/*
474-
* Check that the number of implemented priority bits queried from
475-
* hardware is equal to the FreeRTOS configPRIO_BITS configuration macro.
476-
*/
477-
configASSERT( ulImplementedPrioBits == configPRIO_BITS );
478-
}
479-
#endif /* configPRIO_BITS */
480-
}
481-
#endif /* #ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK */
482-
483461
/* Shift the priority group value back to its position within the AIRCR
484462
* register. */
485463
ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;

‎portable/GCC/ARM_CM4F/port.c

Lines changed: 7 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -335,6 +335,13 @@ BaseType_t xPortStartScheduler( void )
335335
* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
336336
configASSERT( ucMaxSysCallPriority );
337337

338+
/* Check if the bits hardware does not implement are zero in configMAX_SYSCALL_INTERRUPT_PRIORITY.
339+
* Assertion here helps inform that the configuration is not set to hardware
340+
* as expected, although hardware ignores these bits. Possible reason here is
341+
* that __NVIC_PRIO_BITS or configPRIO_BITS is set greater than hardware
342+
* implemented bits. */
343+
configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & ( ~ucMaxPriorityValue ) ) == 0U );
344+
338345
/* Calculate the maximum acceptable priority group value for the number
339346
* of bits read back. */
340347

@@ -371,35 +378,6 @@ BaseType_t xPortStartScheduler( void )
371378
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits;
372379
}
373380

374-
/* The interrupt priority bits are not modelled in QEMU and the assert that
375-
* checks the number of implemented bits and __NVIC_PRIO_BITS will always fail.
376-
* Therefore, this assert is not adding any value for QEMU targets. The config
377-
* option `configDISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
378-
* `FreeRTOSConfig.h` for QEMU targets. */
379-
#ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK
380-
{
381-
#ifdef __NVIC_PRIO_BITS
382-
{
383-
/*
384-
* Check that the number of implemented priority bits queried from
385-
* hardware is equal to the CMSIS __NVIC_PRIO_BITS configuration macro.
386-
*/
387-
configASSERT( ulImplementedPrioBits == __NVIC_PRIO_BITS );
388-
}
389-
#endif /* __NVIC_PRIO_BITS */
390-
391-
#ifdef configPRIO_BITS
392-
{
393-
/*
394-
* Check that the number of implemented priority bits queried from
395-
* hardware is equal to the FreeRTOS configPRIO_BITS configuration macro.
396-
*/
397-
configASSERT( ulImplementedPrioBits == configPRIO_BITS );
398-
}
399-
#endif /* configPRIO_BITS */
400-
}
401-
#endif /* #ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK */
402-
403381
/* Shift the priority group value back to its position within the AIRCR
404382
* register. */
405383
ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;

‎portable/GCC/ARM_CM4_MPU/port.c

Lines changed: 7 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -458,6 +458,13 @@ BaseType_t xPortStartScheduler( void )
458458
* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
459459
configASSERT( ucMaxSysCallPriority );
460460

461+
/* Check if the bits hardware does not implement are zero in configMAX_SYSCALL_INTERRUPT_PRIORITY.
462+
* Assertion here helps inform that the configuration is not set to hardware
463+
* as expected, although hardware ignores these bits. Possible reason here is
464+
* that __NVIC_PRIO_BITS or configPRIO_BITS is set greater than hardware
465+
* implemented bits. */
466+
configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & ( ~ucMaxPriorityValue ) ) == 0U );
467+
461468
/* Calculate the maximum acceptable priority group value for the number
462469
* of bits read back. */
463470

@@ -494,35 +501,6 @@ BaseType_t xPortStartScheduler( void )
494501
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits;
495502
}
496503

497-
/* The interrupt priority bits are not modelled in QEMU and the assert that
498-
* checks the number of implemented bits and __NVIC_PRIO_BITS will always fail.
499-
* Therefore, this assert is not adding any value for QEMU targets. The config
500-
* option `configDISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
501-
* `FreeRTOSConfig.h` for QEMU targets. */
502-
#ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK
503-
{
504-
#ifdef __NVIC_PRIO_BITS
505-
{
506-
/*
507-
* Check that the number of implemented priority bits queried from
508-
* hardware is equal to the CMSIS __NVIC_PRIO_BITS configuration macro.
509-
*/
510-
configASSERT( ulImplementedPrioBits == __NVIC_PRIO_BITS );
511-
}
512-
#endif /* __NVIC_PRIO_BITS */
513-
514-
#ifdef configPRIO_BITS
515-
{
516-
/*
517-
* Check that the number of implemented priority bits queried from
518-
* hardware is equal to the FreeRTOS configPRIO_BITS configuration macro.
519-
*/
520-
configASSERT( ulImplementedPrioBits == configPRIO_BITS );
521-
}
522-
#endif /* configPRIO_BITS */
523-
}
524-
#endif /* #ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK */
525-
526504
/* Shift the priority group value back to its position within the AIRCR
527505
* register. */
528506
ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;

‎portable/GCC/ARM_CM7/r0p1/port.c

Lines changed: 7 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -323,6 +323,13 @@ BaseType_t xPortStartScheduler( void )
323323
* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
324324
configASSERT( ucMaxSysCallPriority );
325325

326+
/* Check if the bits hardware does not implement are zero in configMAX_SYSCALL_INTERRUPT_PRIORITY.
327+
* Assertion here helps inform that the configuration is not set to hardware
328+
* as expected, although hardware ignores these bits. Possible reason here is
329+
* that __NVIC_PRIO_BITS or configPRIO_BITS is set greater than hardware
330+
* implemented bits. */
331+
configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & ( ~ucMaxPriorityValue ) ) == 0U );
332+
326333
/* Calculate the maximum acceptable priority group value for the number
327334
* of bits read back. */
328335

@@ -359,35 +366,6 @@ BaseType_t xPortStartScheduler( void )
359366
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits;
360367
}
361368

362-
/* The interrupt priority bits are not modelled in QEMU and the assert that
363-
* checks the number of implemented bits and __NVIC_PRIO_BITS will always fail.
364-
* Therefore, this assert is not adding any value for QEMU targets. The config
365-
* option `configDISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
366-
* `FreeRTOSConfig.h` for QEMU targets. */
367-
#ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK
368-
{
369-
#ifdef __NVIC_PRIO_BITS
370-
{
371-
/*
372-
* Check that the number of implemented priority bits queried from
373-
* hardware is equal to the CMSIS __NVIC_PRIO_BITS configuration macro.
374-
*/
375-
configASSERT( ulImplementedPrioBits == __NVIC_PRIO_BITS );
376-
}
377-
#endif /* __NVIC_PRIO_BITS */
378-
379-
#ifdef configPRIO_BITS
380-
{
381-
/*
382-
* Check that the number of implemented priority bits queried from
383-
* hardware is equal to the FreeRTOS configPRIO_BITS configuration macro.
384-
*/
385-
configASSERT( ulImplementedPrioBits == configPRIO_BITS );
386-
}
387-
#endif /* configPRIO_BITS */
388-
}
389-
#endif /* #ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK */
390-
391369
/* Shift the priority group value back to its position within the AIRCR
392370
* register. */
393371
ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;

‎portable/IAR/ARM_CM3/port.c

Lines changed: 7 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -241,6 +241,13 @@ BaseType_t xPortStartScheduler( void )
241241
* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
242242
configASSERT( ucMaxSysCallPriority );
243243

244+
/* Check if the bits hardware does not implement are zero in configMAX_SYSCALL_INTERRUPT_PRIORITY.
245+
* Assertion here helps inform that the configuration is not set to hardware
246+
* as expected, although hardware ignores these bits. Possible reason here is
247+
* that __NVIC_PRIO_BITS or configPRIO_BITS is set greater than hardware
248+
* implemented bits. */
249+
configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & ( ~ucMaxPriorityValue ) ) == 0U );
250+
244251
/* Calculate the maximum acceptable priority group value for the number
245252
* of bits read back. */
246253

@@ -277,35 +284,6 @@ BaseType_t xPortStartScheduler( void )
277284
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits;
278285
}
279286

280-
/* The interrupt priority bits are not modelled in QEMU and the assert that
281-
* checks the number of implemented bits and __NVIC_PRIO_BITS will always fail.
282-
* Therefore, this assert is not adding any value for QEMU targets. The config
283-
* option `configDISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
284-
* `FreeRTOSConfig.h` for QEMU targets. */
285-
#ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK
286-
{
287-
#ifdef __NVIC_PRIO_BITS
288-
{
289-
/*
290-
* Check that the number of implemented priority bits queried from
291-
* hardware is equal to the CMSIS __NVIC_PRIO_BITS configuration macro.
292-
*/
293-
configASSERT( ulImplementedPrioBits == __NVIC_PRIO_BITS );
294-
}
295-
#endif /* __NVIC_PRIO_BITS */
296-
297-
#ifdef configPRIO_BITS
298-
{
299-
/*
300-
* Check that the number of implemented priority bits queried from
301-
* hardware is equal to the FreeRTOS configPRIO_BITS configuration macro.
302-
*/
303-
configASSERT( ulImplementedPrioBits == configPRIO_BITS );
304-
}
305-
#endif /* configPRIO_BITS */
306-
}
307-
#endif /* #ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK */
308-
309287
/* Shift the priority group value back to its position within the AIRCR
310288
* register. */
311289
ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;

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