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Add config to disable prio bits check
* Add configDISABLE_INTERRUPT_PRIO_BITS_CHECK to disable cortex-M PRIO bits check.
1 parent 953c1ee commit 79eaf66

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16 files changed

+402
-290
lines changed

16 files changed

+402
-290
lines changed

‎portable/CCS/ARM_CM3/port.c

Lines changed: 25 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -285,27 +285,34 @@ BaseType_t xPortStartScheduler( void )
285285
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits;
286286
}
287287

288-
#ifdef __NVIC_PRIO_BITS
288+
/* The interrupt priority bits are not modelled in QEMU and the assert that
289+
* checks the number of implemented bits and __NVIC_PRIO_BITS will always fail.
290+
* Therefore, this assert is not adding any value for QEMU targets. The config
291+
* option `configDISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
292+
* `FreeRTOSConfig.h` for QEMU targets. */
293+
#ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK
289294
{
290-
/*
291-
* Check that the number of implemented priority bits queried from
292-
* hardware is at least as many as specified in the CMSIS
293-
* __NVIC_PRIO_BITS configuration macro.
294-
*/
295-
configASSERT( ulImplementedPrioBits >= __NVIC_PRIO_BITS );
296-
}
297-
#endif
295+
#ifdef __NVIC_PRIO_BITS
296+
{
297+
/*
298+
* Check that the number of implemented priority bits queried from
299+
* hardware is equal to the CMSIS __NVIC_PRIO_BITS configuration macro.
300+
*/
301+
configASSERT( ulImplementedPrioBits == __NVIC_PRIO_BITS );
302+
}
303+
#endif /* __NVIC_PRIO_BITS */
298304

299-
#ifdef configPRIO_BITS
300-
{
301-
/*
302-
* Check that the number of implemented priority bits queried from
303-
* hardware is at least as many as specified in the FreeRTOS
304-
* configPRIO_BITS configuration macro.
305-
*/
306-
configASSERT( ulImplementedPrioBits >= configPRIO_BITS );
305+
#ifdef configPRIO_BITS
306+
{
307+
/*
308+
* Check that the number of implemented priority bits queried from
309+
* hardware is equal to the FreeRTOS configPRIO_BITS configuration macro.
310+
*/
311+
configASSERT( ulImplementedPrioBits == configPRIO_BITS );
312+
}
313+
#endif /* configPRIO_BITS */
307314
}
308-
#endif
315+
#endif /* #ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK */
309316

310317
/* Shift the priority group value back to its position within the AIRCR
311318
* register. */

‎portable/CCS/ARM_CM4F/port.c

Lines changed: 25 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -304,27 +304,34 @@ BaseType_t xPortStartScheduler( void )
304304
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits;
305305
}
306306

307-
#ifdef __NVIC_PRIO_BITS
307+
/* The interrupt priority bits are not modelled in QEMU and the assert that
308+
* checks the number of implemented bits and __NVIC_PRIO_BITS will always fail.
309+
* Therefore, this assert is not adding any value for QEMU targets. The config
310+
* option `configDISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
311+
* `FreeRTOSConfig.h` for QEMU targets. */
312+
#ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK
308313
{
309-
/*
310-
* Check that the number of implemented priority bits queried from
311-
* hardware is at least as many as specified in the CMSIS
312-
* __NVIC_PRIO_BITS configuration macro.
313-
*/
314-
configASSERT( ulImplementedPrioBits >= __NVIC_PRIO_BITS );
315-
}
316-
#endif
314+
#ifdef __NVIC_PRIO_BITS
315+
{
316+
/*
317+
* Check that the number of implemented priority bits queried from
318+
* hardware is equal to the CMSIS __NVIC_PRIO_BITS configuration macro.
319+
*/
320+
configASSERT( ulImplementedPrioBits == __NVIC_PRIO_BITS );
321+
}
322+
#endif /* __NVIC_PRIO_BITS */
317323

318-
#ifdef configPRIO_BITS
319-
{
320-
/*
321-
* Check that the number of implemented priority bits queried from
322-
* hardware is at least as many as specified in the FreeRTOS
323-
* configPRIO_BITS configuration macro.
324-
*/
325-
configASSERT( ulImplementedPrioBits >= configPRIO_BITS );
324+
#ifdef configPRIO_BITS
325+
{
326+
/*
327+
* Check that the number of implemented priority bits queried from
328+
* hardware is equal to the FreeRTOS configPRIO_BITS configuration macro.
329+
*/
330+
configASSERT( ulImplementedPrioBits == configPRIO_BITS );
331+
}
332+
#endif /* configPRIO_BITS */
326333
}
327-
#endif
334+
#endif /* #ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK */
328335

329336
/* Shift the priority group value back to its position within the AIRCR
330337
* register. */

‎portable/GCC/ARM_CM3/port.c

Lines changed: 25 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -328,27 +328,34 @@ BaseType_t xPortStartScheduler( void )
328328
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits;
329329
}
330330

331-
#ifdef __NVIC_PRIO_BITS
331+
/* The interrupt priority bits are not modelled in QEMU and the assert that
332+
* checks the number of implemented bits and __NVIC_PRIO_BITS will always fail.
333+
* Therefore, this assert is not adding any value for QEMU targets. The config
334+
* option `configDISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
335+
* `FreeRTOSConfig.h` for QEMU targets. */
336+
#ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK
332337
{
333-
/*
334-
* Check that the number of implemented priority bits queried from
335-
* hardware is at least as many as specified in the CMSIS
336-
* __NVIC_PRIO_BITS configuration macro.
337-
*/
338-
configASSERT( ulImplementedPrioBits >= __NVIC_PRIO_BITS );
339-
}
340-
#endif
338+
#ifdef __NVIC_PRIO_BITS
339+
{
340+
/*
341+
* Check that the number of implemented priority bits queried from
342+
* hardware is equal to the CMSIS __NVIC_PRIO_BITS configuration macro.
343+
*/
344+
configASSERT( ulImplementedPrioBits == __NVIC_PRIO_BITS );
345+
}
346+
#endif /* __NVIC_PRIO_BITS */
341347

342-
#ifdef configPRIO_BITS
343-
{
344-
/*
345-
* Check that the number of implemented priority bits queried from
346-
* hardware is at least as many as specified in the FreeRTOS
347-
* configPRIO_BITS configuration macro.
348-
*/
349-
configASSERT( ulImplementedPrioBits >= configPRIO_BITS );
348+
#ifdef configPRIO_BITS
349+
{
350+
/*
351+
* Check that the number of implemented priority bits queried from
352+
* hardware is equal to the FreeRTOS configPRIO_BITS configuration macro.
353+
*/
354+
configASSERT( ulImplementedPrioBits == configPRIO_BITS );
355+
}
356+
#endif /* configPRIO_BITS */
350357
}
351-
#endif
358+
#endif /* #ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK */
352359

353360
/* Shift the priority group value back to its position within the AIRCR
354361
* register. */

‎portable/GCC/ARM_CM3_MPU/port.c

Lines changed: 26 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -451,27 +451,34 @@ BaseType_t xPortStartScheduler( void )
451451
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits;
452452
}
453453

454-
#ifdef __NVIC_PRIO_BITS
454+
/* The interrupt priority bits are not modelled in QEMU and the assert that
455+
* checks the number of implemented bits and __NVIC_PRIO_BITS will always fail.
456+
* Therefore, this assert is not adding any value for QEMU targets. The config
457+
* option `configDISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
458+
* `FreeRTOSConfig.h` for QEMU targets. */
459+
#ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK
455460
{
456-
/*
457-
* Check that the number of implemented priority bits queried from
458-
* hardware is at least as many as specified in the CMSIS
459-
* __NVIC_PRIO_BITS configuration macro.
460-
*/
461-
configASSERT( ulImplementedPrioBits >= __NVIC_PRIO_BITS );
461+
#ifdef __NVIC_PRIO_BITS
462+
{
463+
/*
464+
* Check that the number of implemented priority bits queried from
465+
* hardware is equal to the CMSIS __NVIC_PRIO_BITS configuration macro.
466+
*/
467+
configASSERT( ulImplementedPrioBits == __NVIC_PRIO_BITS );
468+
}
469+
#endif /* __NVIC_PRIO_BITS */
470+
471+
#ifdef configPRIO_BITS
472+
{
473+
/*
474+
* Check that the number of implemented priority bits queried from
475+
* hardware is equal to the FreeRTOS configPRIO_BITS configuration macro.
476+
*/
477+
configASSERT( ulImplementedPrioBits == configPRIO_BITS );
478+
}
479+
#endif /* configPRIO_BITS */
462480
}
463-
#endif
464-
465-
#ifdef configPRIO_BITS
466-
{
467-
/*
468-
* Check that the number of implemented priority bits queried from
469-
* hardware is at least as many as specified in the FreeRTOS
470-
* configPRIO_BITS configuration macro.
471-
*/
472-
configASSERT( ulImplementedPrioBits >= configPRIO_BITS );
473-
}
474-
#endif
481+
#endif /* #ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK */
475482

476483
/* Shift the priority group value back to its position within the AIRCR
477484
* register. */

‎portable/GCC/ARM_CM4F/port.c

Lines changed: 25 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -371,27 +371,34 @@ BaseType_t xPortStartScheduler( void )
371371
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits;
372372
}
373373

374-
#ifdef __NVIC_PRIO_BITS
374+
/* The interrupt priority bits are not modelled in QEMU and the assert that
375+
* checks the number of implemented bits and __NVIC_PRIO_BITS will always fail.
376+
* Therefore, this assert is not adding any value for QEMU targets. The config
377+
* option `configDISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
378+
* `FreeRTOSConfig.h` for QEMU targets. */
379+
#ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK
375380
{
376-
/*
377-
* Check that the number of implemented priority bits queried from
378-
* hardware is at least as many as specified in the CMSIS
379-
* __NVIC_PRIO_BITS configuration macro.
380-
*/
381-
configASSERT( ulImplementedPrioBits >= __NVIC_PRIO_BITS );
382-
}
383-
#endif
381+
#ifdef __NVIC_PRIO_BITS
382+
{
383+
/*
384+
* Check that the number of implemented priority bits queried from
385+
* hardware is equal to the CMSIS __NVIC_PRIO_BITS configuration macro.
386+
*/
387+
configASSERT( ulImplementedPrioBits == __NVIC_PRIO_BITS );
388+
}
389+
#endif /* __NVIC_PRIO_BITS */
384390

385-
#ifdef configPRIO_BITS
386-
{
387-
/*
388-
* Check that the number of implemented priority bits queried from
389-
* hardware is at least as many as specified in the FreeRTOS
390-
* configPRIO_BITS configuration macro.
391-
*/
392-
configASSERT( ulImplementedPrioBits >= configPRIO_BITS );
391+
#ifdef configPRIO_BITS
392+
{
393+
/*
394+
* Check that the number of implemented priority bits queried from
395+
* hardware is equal to the FreeRTOS configPRIO_BITS configuration macro.
396+
*/
397+
configASSERT( ulImplementedPrioBits == configPRIO_BITS );
398+
}
399+
#endif /* configPRIO_BITS */
393400
}
394-
#endif
401+
#endif /* #ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK */
395402

396403
/* Shift the priority group value back to its position within the AIRCR
397404
* register. */

‎portable/GCC/ARM_CM4_MPU/port.c

Lines changed: 26 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -494,27 +494,34 @@ BaseType_t xPortStartScheduler( void )
494494
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits;
495495
}
496496

497-
#ifdef __NVIC_PRIO_BITS
497+
/* The interrupt priority bits are not modelled in QEMU and the assert that
498+
* checks the number of implemented bits and __NVIC_PRIO_BITS will always fail.
499+
* Therefore, this assert is not adding any value for QEMU targets. The config
500+
* option `configDISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
501+
* `FreeRTOSConfig.h` for QEMU targets. */
502+
#ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK
498503
{
499-
/*
500-
* Check that the number of implemented priority bits queried
501-
* from hardware is at least as many as specified in the
502-
* CMSIS __NVIC_PRIO_BITS configuration macro.
503-
*/
504-
configASSERT( ulImplementedPrioBits >= __NVIC_PRIO_BITS );
504+
#ifdef __NVIC_PRIO_BITS
505+
{
506+
/*
507+
* Check that the number of implemented priority bits queried from
508+
* hardware is equal to the CMSIS __NVIC_PRIO_BITS configuration macro.
509+
*/
510+
configASSERT( ulImplementedPrioBits == __NVIC_PRIO_BITS );
511+
}
512+
#endif /* __NVIC_PRIO_BITS */
513+
514+
#ifdef configPRIO_BITS
515+
{
516+
/*
517+
* Check that the number of implemented priority bits queried from
518+
* hardware is equal to the FreeRTOS configPRIO_BITS configuration macro.
519+
*/
520+
configASSERT( ulImplementedPrioBits == configPRIO_BITS );
521+
}
522+
#endif /* configPRIO_BITS */
505523
}
506-
#endif
507-
508-
#ifdef configPRIO_BITS
509-
{
510-
/*
511-
* Check that the number of implemented priority bits queried
512-
* from hardware is at least as many as specified in the
513-
* FreeRTOS configPRIO_BITS configuration macro.
514-
*/
515-
configASSERT( ulImplementedPrioBits >= configPRIO_BITS );
516-
}
517-
#endif
524+
#endif /* #ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK */
518525

519526
/* Shift the priority group value back to its position within the AIRCR
520527
* register. */

‎portable/GCC/ARM_CM7/r0p1/port.c

Lines changed: 25 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -359,27 +359,34 @@ BaseType_t xPortStartScheduler( void )
359359
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits;
360360
}
361361

362-
#ifdef __NVIC_PRIO_BITS
362+
/* The interrupt priority bits are not modelled in QEMU and the assert that
363+
* checks the number of implemented bits and __NVIC_PRIO_BITS will always fail.
364+
* Therefore, this assert is not adding any value for QEMU targets. The config
365+
* option `configDISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
366+
* `FreeRTOSConfig.h` for QEMU targets. */
367+
#ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK
363368
{
364-
/*
365-
* Check that the number of implemented priority bits queried from
366-
* hardware is at least as many as specified in the CMSIS
367-
* __NVIC_PRIO_BITS configuration macro.
368-
*/
369-
configASSERT( ulImplementedPrioBits >= __NVIC_PRIO_BITS );
370-
}
371-
#endif
369+
#ifdef __NVIC_PRIO_BITS
370+
{
371+
/*
372+
* Check that the number of implemented priority bits queried from
373+
* hardware is equal to the CMSIS __NVIC_PRIO_BITS configuration macro.
374+
*/
375+
configASSERT( ulImplementedPrioBits == __NVIC_PRIO_BITS );
376+
}
377+
#endif /* __NVIC_PRIO_BITS */
372378

373-
#ifdef configPRIO_BITS
374-
{
375-
/*
376-
* Check that the number of implemented priority bits queried from
377-
* hardware is at least as many as specified in the FreeRTOS
378-
* configPRIO_BITS configuration macro.
379-
*/
380-
configASSERT( ulImplementedPrioBits >= configPRIO_BITS );
379+
#ifdef configPRIO_BITS
380+
{
381+
/*
382+
* Check that the number of implemented priority bits queried from
383+
* hardware is equal to the FreeRTOS configPRIO_BITS configuration macro.
384+
*/
385+
configASSERT( ulImplementedPrioBits == configPRIO_BITS );
386+
}
387+
#endif /* configPRIO_BITS */
381388
}
382-
#endif
389+
#endif /* #ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK */
383390

384391
/* Shift the priority group value back to its position within the AIRCR
385392
* register. */

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