Skip to content

Commit ddd8dd8

Browse files
author
Peter Enderborg
committed
Add MaxLinear GSW144 DSA driver support
Change-Id: I60e50dd5689819943a0e3e71699cd40075a5689f
1 parent d991fd2 commit ddd8dd8

File tree

9 files changed

+202
-0
lines changed

9 files changed

+202
-0
lines changed

Makefile.in

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -120,6 +120,7 @@ LIBNETDISSECT_SRC=\
120120
print-dhcp6.c \
121121
print-domain.c \
122122
print-dsa.c \
123+
print-dsa-gsw1xx.c \
123124
print-dtp.c \
124125
print-dvmrp.c \
125126
print-eap.c \

ethertype.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -182,6 +182,9 @@
182182
#ifndef ETHERTYPE_AOE
183183
#define ETHERTYPE_AOE 0x88a2
184184
#endif
185+
#ifndef ETHERTYPE_GSW1XX
186+
#define ETHERTYPE_GSW1XX 0x88c3
187+
#endif
185188
#ifndef ETHERTYPE_PTP
186189
#define ETHERTYPE_PTP 0x88f7
187190
#endif

netdissect.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -556,6 +556,7 @@ extern void chdlc_if_print IF_PRINTER_ARGS;
556556
extern void cip_if_print IF_PRINTER_ARGS;
557557
extern void dsa_if_print IF_PRINTER_ARGS;
558558
extern void edsa_if_print IF_PRINTER_ARGS;
559+
extern void edsa_gsw1xx_if_print IF_PRINTER_ARGS;
559560
extern void enc_if_print IF_PRINTER_ARGS;
560561
extern void ether_if_print IF_PRINTER_ARGS;
561562
extern void fddi_if_print IF_PRINTER_ARGS;

print-dsa-gsw1xx.c

Lines changed: 189 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,189 @@
1+
/*
2+
* Copyright (c) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997
3+
* The Regents of the University of California. All rights reserved.
4+
*
5+
* Redistribution and use in source and binary forms, with or without
6+
* modification, are permitted provided that: (1) source code distributions
7+
* retain the above copyright notice and this paragraph in its entirety, (2)
8+
* distributions including binary code include the above copyright notice and
9+
* this paragraph in its entirety in the documentation or other materials
10+
* provided with the distribution, and (3) all advertising materials mentioning
11+
* features or use of this software display the following acknowledgement:
12+
* ``This product includes software developed by the University of California,
13+
* Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
14+
* the University nor the names of its contributors may be used to endorse
15+
* or promote products derived from this software without specific prior
16+
* written permission.
17+
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
18+
* WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
19+
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
20+
*/
21+
22+
/* based on print-dsa.c */
23+
24+
/* \summary: MaxLinear (Ethertype) Distributed Switch Architecture */
25+
26+
#ifdef HAVE_CONFIG_H
27+
#include <config.h>
28+
#endif
29+
30+
#include "netdissect-stdinc.h"
31+
32+
#include "netdissect.h"
33+
#include "ethertype.h"
34+
#include "addrtoname.h"
35+
#include "extract.h"
36+
37+
/*
38+
* Ingress and Egress have different formats.
39+
* Format of (Ethertyped) Ingress tagged frames:
40+
*
41+
* 7 6 5 4 3 2 1 0
42+
* . . . . . . . . .
43+
* 0 +---+---+---+---+---+---+---+---+
44+
* | Ether Destination Address |
45+
* +6 +---+---+---+---+---+---+---+---+
46+
* | Ether Source Address |
47+
* +6 +---+---+---+---+---+---+---+---+ +-
48+
* | Prog. DSA Ether Type [15:8] | | (8-byte) EDSA Tag
49+
* +1 +---+---+---+---+---+---+---+---+ | Contains a programmable Ether type.
50+
* | Prog. DSA Ether Type [7:0] | | +
51+
* +1 +---+---+---+---+---+---+---+---+ | | (6-byte) Special Tag Content
52+
* | ME|TCE|TSE|FNL| TTC [3:0] | | |
53+
* +1 +---+---+---+---+---+---+---+---+ | |
54+
* |TEPM Mode |b29| Src/Trg Dev| | | (4-byte) DSA Tag
55+
* +1 +---+---+---+---+---+---+---+---+ | | Contains a DSA tag mode,
56+
* |Src/Trg Port/Trunk |b18|b17|b16| | | source or target switch device,
57+
* +1 +---+---+---+---+---+---+---+---+ | | source or target port or trunk,
58+
* | PRI [2:0] |b12| VID [11:8] | | | and misc (IEEE and FPri) bits.
59+
* +1 +---+---+---+---+---+---+---+---+ | |
60+
* | VID [7:0] | | |
61+
* +1 +---+---+---+---+---+---+---+---+ +- +-
62+
* | Ether Length/Type |
63+
* +2 +---+---+---+---+---+---+---+---+
64+
* . . . . . . . . .
65+
* Format of (Ethertyped) Egress tagged frames:
66+
*
67+
* 7 6 5 4 3 2 1 0
68+
* . . . . . . . . .
69+
* 0 +---+---+---+---+---+---+---+---+
70+
* | Ether Destination Address |
71+
* +6 +---+---+---+---+---+---+---+---+
72+
* | Ether Source Address |
73+
* +6 +---+---+---+---+---+---+---+---+ +-
74+
* | Prog. DSA Ether Type [15:8] | | (8-byte) EDSA Tag
75+
* +1 +---+---+---+---+---+---+---+---+ | Contains a programmable Ether type.
76+
* | Prog. DSA Ether Type [7:0] | | +
77+
* +1 +---+---+---+---+---+---+---+---+ | | (6-byte) Special Tag Content
78+
* | ME|TCE|TSE|FNL| TTC [3:0] | | |
79+
* +1 +---+---+---+---+---+---+---+---+ | |
80+
* |TEPM Mode |b29| Src/Trg Dev | | | (4-byte) DSA Tag
81+
* +1 +---+---+---+---+---+---+---+---+ | | Contains a DSA tag mode,
82+
* |Src/Trg Port/Trunk |b18|b17|b16| | | source or target switch device,
83+
* +1 +---+---+---+---+---+---+---+---+ | | source or target port or trunk,
84+
* | PRI [2:0] |b12| VID [11:8] | | | and misc (IEEE and FPri) bits.
85+
* +1 +---+---+---+---+---+---+---+---+ | |
86+
* | VID [7:0] | | |
87+
* +1 +---+---+---+---+---+---+---+---+ +- +-
88+
* | Ether Length/Type |
89+
* +2 +---+---+---+---+---+---+---+---+
90+
* . . . . . . . . .
91+
*
92+
*
93+
* Mode: Forward, To_CPU, From_CPU, To_Sniffer
94+
* b29: (Source or Target) IEEE Tag Mode
95+
* b18: Forward's Src_Is_Trunk, To_CPU's Code[2], To_Sniffer's Rx_Sniff
96+
* b17: To_CPU's Code[1]
97+
* b16: Original frame's CFI
98+
* b12: To_CPU's Code[0]
99+
*/
100+
101+
#define TOK(tag, byte, mask, shift) ((GET_U_1(&(((const u_char *) tag)[byte])) & (mask)) >> (shift))
102+
103+
#define GSW1XX_ET1(tag) TOK(tag, 0, 0xFF, 0)
104+
#define GSW1XX_ET2(tag) TOK(tag, 1, 0xFF, 0)
105+
#define GSW1XX_PME(tag) TOK(tag, 2, 0x80, 7) // port map enable
106+
#define GSW1XX_TCE(tag) TOK(tag, 2, 0x40, 6) // traffic class enable
107+
#define GSW1XX_TSE(tag) TOK(tag, 2, 0x20, 5) // time stamp enable
108+
#define GSW1XX_FNL(tag) TOK(tag, 2, 0x10, 4) // force no learning
109+
#define GSW1XX_TTC(tag) TOK(tag, 2, 0x08, 0) // target traffic class
110+
#define GSW1XX_MAP_LOW(tag) TOK(tag, 3, 0xFF, 0)
111+
#define GSW1XX_MAP_HIGH(tag) TOK(tag, 4, 0xFF, 0)
112+
#define GSW1XX_MAP(tag) ((GSW1XX_MAP_HIGH(tag) << 8) + GSW1XX_MAP_LOW(tag))
113+
// #define GSW1XX_RES(tag) TOK(tag, 5, 0xFF, 0)
114+
#define GSW1XX_LEN_LOW(tag) TOK(tag, 7, 0xFF, 0)
115+
#define GSW1XX_LEN_HIGH(tag) TOK(tag, 6, 0x3F, 0)
116+
#define GSW1XX_LEN(tag) ((GSW1XX_LEN_HIGH(tag) << 8) + GSW1XX_LEN_LOW(tag))
117+
#define GSW1XX_IE(tag) TOK(tag, 5, 0x10, 3)
118+
#define GSW1XX_IPN(tag) TOK(tag, 2, 0x0F, 0) // ingress port number
119+
#define GSW1XX_EG_TC(tag) TOK(tag, 2, 0xF0, 4)
120+
#define GSW1XX_EG_EPN(tag) TOK(tag, 2, 0x0F, 0)
121+
#define GSW1XX_EG_POE(tag) TOK(tag, 2, 0x80, 7)
122+
#define GSW1XX_EG_IV4(tag) TOK(tag, 2, 0x40, 6)
123+
#define GSW1XX_EG_IPO(tag) TOK(tag, 3, 0x3F, 0)
124+
125+
#define EDSA_LEN 8
126+
#define GSW1XX_TAG (0x88c3)
127+
static void
128+
tag_common_print(netdissect_options *ndo, const u_char *p)
129+
{
130+
if (ndo->ndo_eflag ) {
131+
int egress = !!GSW1XX_LEN(p);
132+
133+
if (egress) {
134+
ND_PRINT("Egress Port %d,", GSW1XX_IPN(p));
135+
if (ndo->ndo_eflag > 1) {
136+
ND_PRINT("TTC %d,", GSW1XX_TTC(p));
137+
ND_PRINT("TCE %d,", GSW1XX_TCE(p));
138+
ND_PRINT("TC %d,", GSW1XX_EG_TC(p));
139+
ND_PRINT("EPN %d,", GSW1XX_EG_EPN(p));
140+
ND_PRINT("POE %d,", GSW1XX_EG_POE(p));
141+
if (GSW1XX_EG_IPO(p)) {
142+
ND_PRINT("IV4 %d,", GSW1XX_EG_IV4(p));
143+
ND_PRINT("IPO %d,", GSW1XX_EG_IPO(p));
144+
}
145+
ND_PRINT("Len %d,", GSW1XX_LEN(p));
146+
}
147+
} else {
148+
ND_PRINT("Ingress Port %d,", GSW1XX_IPN(p));
149+
ND_PRINT("MAP %d,", GSW1XX_MAP(p));
150+
if (ndo->ndo_eflag > 1) {
151+
ND_PRINT("PME %d,", GSW1XX_PME(p));
152+
ND_PRINT("TCE %d,", GSW1XX_TCE(p));
153+
ND_PRINT("TTC %d,", GSW1XX_TTC(p));
154+
ND_PRINT("FNL %d,", GSW1XX_FNL(p));
155+
ND_PRINT("irq %d,", GSW1XX_IE(p));
156+
}
157+
}
158+
}
159+
}
160+
161+
static void
162+
edsa_tag_print(netdissect_options *ndo, const u_char *bp)
163+
{
164+
const u_char *p = bp;
165+
uint16_t edsa_etype;
166+
167+
edsa_etype = GET_BE_U_2(p);
168+
if (ndo->ndo_eflag > 2) {
169+
ND_PRINT("MaxLinear ethertype 0x%04x (%s), ", edsa_etype,
170+
tok2str(ethertype_values, "Unknown", edsa_etype));
171+
} else {
172+
if (edsa_etype == GSW1XX_TAG)
173+
ND_PRINT("GSW1XX ");
174+
else
175+
ND_PRINT("GSW1XX Unknown 0x%04x, ", edsa_etype);
176+
}
177+
tag_common_print(ndo, p);
178+
}
179+
180+
void
181+
edsa_gsw1xx_if_print(netdissect_options *ndo, const struct pcap_pkthdr *h, const u_char *p)
182+
{
183+
u_int caplen = h->caplen;
184+
u_int length = h->len;
185+
186+
ndo->ndo_protocol = "gsw1xx";
187+
ndo->ndo_ll_hdr_len +=
188+
ether_switch_tag_print(ndo, p, length, caplen, edsa_tag_print, EDSA_LEN);
189+
}

print-ether.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -102,6 +102,7 @@ const struct tok ethertype_values[] = {
102102
{ ETHERTYPE_AOE, "AoE" },
103103
{ ETHERTYPE_PTP, "PTP" },
104104
{ ETHERTYPE_ARISTA, "Arista Vendor Specific Protocol" },
105+
{ ETHERTYPE_GSW1XX, "GSW1XX" },
105106
{ 0, NULL}
106107
};
107108

print.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -75,6 +75,7 @@ static const struct printer printers[] = {
7575
#endif
7676
#ifdef DLT_DSA_TAG_DSA
7777
{ dsa_if_print, DLT_DSA_TAG_DSA },
78+
{ edsa_gsw1xx_if_print, DLT_DSA_TAG_GSW1XX },
7879
#endif
7980
#ifdef DLT_DSA_TAG_EDSA
8081
{ edsa_if_print, DLT_DSA_TAG_EDSA },

tests/TESTLIST

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -108,6 +108,9 @@ edsa-e edsa.pcap edsa-e.out -e
108108
edsa-high-vid edsa-high-vid.pcap edsa-high-vid.out
109109
edsa-high-vid-e edsa-high-vid.pcap edsa-high-vid-e.out -e
110110

111+
# MaxLinear DSA tag tests
112+
gsw1xx gsw1xx.pcap gsw1xx.out -n -e
113+
111114
# ESP tests
112115
esp0 02-sunrise-sunset-esp.pcap esp0.out
113116
esp_truncated esp_truncated.pcap esp_truncated.out

tests/gsw1xx.out

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,3 @@
1+
1 2025-10-29 11:53:16.673113 1c:fd:08:7c:0a:e1 > b8:a4:4f:fc:53:8a, GSW1XX Egress Port 1,ethertype IPv4 (0x0800), length 106: 192.168.0.1 > 192.168.0.240: ICMP echo request, id 5, seq 2918, length 64
2+
2 2025-10-29 11:53:16.673257 b8:a4:4f:fc:53:8a > 1c:fd:08:7c:0a:e1, GSW1XX Ingress Port 0,MAP 2,ethertype IPv4 (0x0800), length 106: 192.168.0.240 > 192.168.0.1: ICMP echo reply, id 5, seq 2918, length 64
3+
3 2025-10-29 11:53:16.674057 b8:a4:4f:fc:53:8a > 01:00:5e:00:00:fb, GSW1XX Ingress Port 0,MAP 2,ethertype IPv4 (0x0800), length 362: 192.168.0.240.5353 > 224.0.0.251.5353: 0*- [0q] 3/0/4 (Cache flush) PTR axis-b8a44ffc538a.local., (Cache flush) PTR axis-b8a44ffc538a.local., (Cache flush) PTR axis-b8a44ffc538a.local. (312)

tests/gsw1xx.pcap

646 Bytes
Binary file not shown.

0 commit comments

Comments
 (0)