Watchdog unit test seems to work not correctly

[Dudeplayz]

While I was working at the peripherals, I discovered that the WDR command does not need to be run in order to finish all the watchdog unit tests. But one unit test is written to exactly test this.

avr8js/src/peripherals/watchdog.spec.ts

Lines 93 to 130 in e76663c

	it('should extend the watchdog timeout when executing a WDR instruction', () => {
	const { program } = asmProgram(`
	; register addresses
	_REPLACE WDTCSR, ${WDTCSR}
	; Setup watchdog
	ldi r16, ${WDE | WDCE}
	sts WDTCSR, r16
	ldi r16, ${WDE}
	sts WDTCSR, r16
	wdr
	nop
	break
	`);
	const cpu = new CPU(program);
	const clock = new AVRClock(cpu, 16e6, clockConfig);
	const watchdog = new AVRWatchdog(cpu, watchdogConfig, clock);
	const runner = new TestProgramRunner(cpu);
	// Setup: enable watchdog timer
	runner.runInstructions(4);
	expect(watchdog.enabled).toBe(true);
	// Now we skip 8ms. Watchdog shouldn't fire, yet
	cpu.cycles += 16000 * 8;
	runner.runInstructions(1);
	// Now we skip an extra 8ms. We extended the timeout with WDR, so watchdog won't fire yet
	cpu.cycles += 16000 * 8;
	runner.runInstructions(1);
	// Finally, another 8ms bring us to 16ms since last WDR, and watchdog should fire
	cpu.cycles += 16000 * 8;
	cpu.tick();
	expect(cpu.pc).toEqual(0);
	});

If you comment out

avr8js/src/peripherals/watchdog.ts

Line 63 in e76663c

this.resetWatchdog();

it is still successful, which should not be the case. So the question is, is the unit test written wrong or is there another reason?
Locally I have also enhanced the unit test with a spy on the callback:

    const callbackSpy = jest.spyOn(cpu, 'onWatchdogReset');

    // Setup: enable watchdog timer
    runner.runInstructions(4);
    expect(watchdog.enabled).toBe(true);
    expect(callbackSpy).not.toHaveBeenCalled();

    // Now we skip 8ms. Watchdog shouldn't fire, yet
    cpu.cycles += 16000 * 8;
    runner.runInstructions(1);
    expect(callbackSpy).toHaveBeenCalled();

[urish]

is the unit test written wrong or is there another reason?

Hi Dario, Thanks for reporting!

The test isn't exactly written wrong, but it could be improved. I added two more assertions to catch the missing WDR. The new assertions make sure that the CPU resets at the right time, and not before.