From 2687025357a418500f393f2923e3702d7dea9911 Mon Sep 17 00:00:00 2001 From: Yuqi Zhang Date: Tue, 20 May 2025 17:42:20 +0000 Subject: [PATCH] Add half type support in reshape_and_cache_cpu_impl on x86 cpu platform Signed-off-by: Yuqi Zhang --- csrc/cpu/cpu_types_x86.hpp | 1 + 1 file changed, 1 insertion(+) diff --git a/csrc/cpu/cpu_types_x86.hpp b/csrc/cpu/cpu_types_x86.hpp index cf67847b45ba..9a613ba588dd 100644 --- a/csrc/cpu/cpu_types_x86.hpp +++ b/csrc/cpu/cpu_types_x86.hpp @@ -19,6 +19,7 @@ namespace vec_op { #define VLLM_DISPATCH_CASE_FLOATING_TYPES_FP8(...) \ AT_DISPATCH_CASE(at::ScalarType::Float, __VA_ARGS__) \ AT_DISPATCH_CASE(at::ScalarType::BFloat16, __VA_ARGS__) \ + AT_DISPATCH_CASE(at::ScalarType::Half, __VA_ARGS__) \ AT_DISPATCH_CASE(at::ScalarType::Float8_e5m2, __VA_ARGS__) #define VLLM_DISPATCH_FLOATING_TYPES(TYPE, NAME, ...) \