dpu: llvm: ISD::ADDRSPACECAST is not supported by the backend

print a diagnostic error if such a node is lowered.
Ref #1

Author: Romaric JODIN

llvm/lib/Target/DPU/DPUTargetLowering.cpp

@@ -241,6 +241,8 @@ DPUTargetLowering::DPUTargetLowering(const TargetMachine &TM, DPUSubtarget &STI)
   setOperationAction(ISD::VAEND, MVT::Other, Expand);
   setOperationAction(ISD::VACOPY, MVT::Other, Expand);
 
+  setOperationAction(ISD::ADDRSPACECAST, MVT::i32, Custom);
+
   for (MVT VT : MVT::integer_valuetypes()) {
     setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote);
     setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote);
@@ -260,6 +262,9 @@ SDValue DPUTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
     dbgs() << "\n";
   });
   switch (Op.getOpcode()) {
+  case ISD::ADDRSPACECAST:
+    return LowerAddrSpaceCast(Op, DAG);
+
   case ISD::MUL:
     return LowerMultiplication(Op, DAG);
 
@@ -592,6 +597,16 @@ const char *DPUTargetLowering::getTargetNodeName(unsigned Opcode) const {
   }
 }
 
+SDValue DPUTargetLowering::LowerAddrSpaceCast(SDValue Op, SelectionDAG &DAG) const {
+  const Function & Func = DAG.getMachineFunction().getFunction();
+  DiagnosticInfoUnsupported Diag(Func,
+                                 "Cast between addresses of different address space is not supported",
+                                 Op.getDebugLoc());
+  Func.getContext().diagnose(Diag);
+  report_fatal_error("Cast between addresses of different address space is not supported", false);
+  return Op;
+}
+
 SDValue DPUTargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) const {
   SDLoc DL(Op);
   SDValue Chain = Op.getOperand(0);

llvm/lib/Target/DPU/DPUTargetLowering.h

@@ -107,6 +107,8 @@ class DPUTargetLowering : public TargetLowering {
   SDValue LowerIntrinsic(SDValue Op, SelectionDAG &DAG,
                          int IntrinsicType) const;
 
+  SDValue LowerAddrSpaceCast(SDValue Op, SelectionDAG &DAG) const;
+
   // Analysis and mute for 64 bits emulation.
   // Shifts: third parameter stands for Left (0), Right (1) or Arithmetic (2)
   SDValue LowerShift(SDValue Op, SelectionDAG &DAG, int LRA) const;