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theaoqiqiaopengchenghaominwxiangzhaiheiher
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Sync-20200731 (dotnet#19)
* 13557: [MIPS64] PartD - Fixed the unaligned memory accessing within the pedecode and initial frame. Implements unaligned read within Indir. * 13833: Implement Nullable::UnBoxIntoArgNoGC when deal with Nullable<T> * 11772: added unstable tests into problem_list.txt * 13902: updated problem_list_sh.txt when crossgen or skipcrossgen match * 13740: [MIPS64] Fixed assert error "!CREATE_CHECK_STRING(pMT && pMT->Validate())" when testing with COMPlus_HeapVerify=1 and export COMPlus_GCStress=3. * 13790: PartA - Fix GCStress=0x4 infinite loop related issue. * 13790:[MIPS64] PartB - Fix update instructions error when GCStress=0x4. * 13740:[MIPS64] PartB - Fixed the assert error within "MethodTable::Validate" when GCstress=3/4. * 13849: Fix memory barriers. * 13790:[MIPS64] PartC - Fixed assert error "TypeFromToken(at) == mdtCustomAttribute" when GC=4. * 13936: Fix assert failure: !"Pointer updated without using write barrier" * 13951: Add a test case for uint type data comparison shift01.cs is for task dotnet#13159 * 13867: Implement 32-bit compare Co-authored-by: qiaopengcheng <[email protected]> Co-authored-by: wanghaomin <[email protected]> Co-authored-by: Leslie Zhai <[email protected]> Co-authored-by: wangrui <[email protected]> Co-authored-by: Guoyun Sun <[email protected]>
1 parent a55e590 commit ab58792

23 files changed

+744
-159
lines changed

src/gcinfo/gcinfodumper.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -190,7 +190,7 @@ BOOL GcInfoDumper::ReportPointerRecord (
190190
#elif defined(_TARGET_MIPS64_)
191191
#undef REG
192192
#define REG(reg, field) { FIELD_OFFSET(Mips64VolatileContextPointer, field) }
193-
//REG(zero, R0),
193+
REG(zero, R0),
194194
REG(at, At),
195195
REG(v0, V0),
196196
REG(v1, V1),

src/inc/regdisp.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -183,6 +183,7 @@ typedef struct _Arm64VolatileContextPointer
183183
#if defined(_TARGET_MIPS64_)
184184
typedef struct _Mips64VolatileContextPointer
185185
{
186+
PDWORD64 R0;
186187
PDWORD64 At;
187188
PDWORD64 V0;
188189
PDWORD64 V1;
@@ -468,6 +469,7 @@ inline void FillRegDisplay(const PREGDISPLAY pRD, PT_CONTEXT pctx, PT_CONTEXT pC
468469
pRD->volatileCurrContextPointers.X[i] = &pctx->X[i];
469470
#elif defined(_TARGET_MIPS64_) // _TARGET_ARM64_
470471
/* FIXME for MIPS */
472+
pRD->volatileCurrContextPointers.R0 = &pctx->R0;
471473
pRD->volatileCurrContextPointers.At = &pctx->At;
472474
pRD->volatileCurrContextPointers.V0 = &pctx->V0;
473475
pRD->volatileCurrContextPointers.V1 = &pctx->V1;

src/jit/codegen.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1490,8 +1490,7 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
14901490
#ifdef _TARGET_ARM64_
14911491
void instGen_MemoryBarrier(insBarrier barrierType = INS_BARRIER_ISH);
14921492
#elif defined(_TARGET_MIPS64_)
1493-
////FIXME for MIPS.
1494-
void instGen_MemoryBarrier(insBarrier barrierType = INS_BARRIER_ISH);
1493+
void instGen_MemoryBarrier(insBarrier barrierType = INS_BARRIER_MB);
14951494
#else
14961495
void instGen_MemoryBarrier();
14971496
#endif

src/jit/codegencommon.cpp

Lines changed: 22 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1872,18 +1872,25 @@ void CodeGen::genJumpToThrowHlpBlk(emitJumpKind jumpKind, SpecialCodeKind codeKi
18721872

18731873
BasicBlock* tgtBlk = nullptr;
18741874
emitJumpKind reverseJumpKind = emitter::emitReverseJumpKind(jumpKind);
1875+
#if defined(_TARGET_MIPS64_)
1876+
assert(reverseJumpKind == jumpKind);
1877+
tgtBlk = genCreateTempLabel();
1878+
#else
18751879
if (reverseJumpKind != jumpKind)
18761880
{
18771881
tgtBlk = genCreateTempLabel();
18781882
inst_JMP(reverseJumpKind, tgtBlk);
18791883
}
1884+
#endif
18801885

18811886
genEmitHelperCall(compiler->acdHelper(codeKind), 0, EA_UNKNOWN);//no branch-delay!
18821887

18831888
// Define the spot for the normal non-exception case to jump to.
18841889
if (tgtBlk != nullptr)
18851890
{
1891+
#ifndef _TARGET_MIPS64_
18861892
assert(reverseJumpKind != jumpKind);
1893+
#endif
18871894
genDefineTempLabel(tgtBlk);
18881895
}
18891896
}
@@ -7043,6 +7050,7 @@ void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg,
70437050
unsigned uCntBytes = untrLclHi - untrLclLo;
70447051
assert((uCntBytes % sizeof(int)) == 0); // The smallest stack slot is always 4 bytes.
70457052
unsigned uCntSlots = uCntBytes / REGSIZE_BYTES; // How many register sized stack slots we're going to use.
7053+
unsigned int padding = untrLclLo & 0x7;
70467054

70477055
// When uCntSlots is 9 or less, we will emit a sequence of sd instructions inline.
70487056
// When it is 10 or greater, we will emit a loop containing a sd instruction.
@@ -7062,6 +7070,7 @@ void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg,
70627070

70637071
// rAddr is not a live incoming argument reg
70647072
assert((genRegMask(rAddr) & intRegState.rsCalleeRegArgMaskLiveIn) == 0);
7073+
assert(untrLclLo%4 == 0);
70657074

70667075
if (emitter::emitIns_valid_imm_for_add(untrLclLo, EA_PTRSIZE))
70677076
{
@@ -7075,6 +7084,13 @@ void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg,
70757084
*pInitRegZeroed = false;
70767085
}
70777086

7087+
if (padding)
7088+
{
7089+
assert(padding == 4);
7090+
getEmitter()->emitIns_R_R_I(INS_sw, EA_4BYTE, REG_R0, rAddr, 0);
7091+
uCntBytes -= 4;
7092+
}
7093+
70787094
if (useLoop)
70797095
{
70807096
noway_assert(uCntSlots >= 2);
@@ -7088,17 +7104,18 @@ void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg,
70887104
while (uCntBytes >= REGSIZE_BYTES * 2)
70897105
{
70907106
/* FIXME for MIPS: can be optimize further */
7091-
getEmitter()->emitIns_R_R_I(INS_sd, EA_PTRSIZE, REG_R0, rAddr, 8);
7092-
getEmitter()->emitIns_R_R_I(INS_sd, EA_PTRSIZE, REG_R0, rAddr, 0);
7093-
getEmitter()->emitIns_R_R_I(INS_daddiu, EA_PTRSIZE, rAddr, rAddr, 2 * REGSIZE_BYTES);
7107+
getEmitter()->emitIns_R_R_I(INS_sd, EA_PTRSIZE, REG_R0, rAddr, 8 + padding);
7108+
getEmitter()->emitIns_R_R_I(INS_sd, EA_PTRSIZE, REG_R0, rAddr, 0 + padding);
7109+
getEmitter()->emitIns_R_R_I(INS_daddiu, EA_PTRSIZE, rAddr, rAddr, 2 * REGSIZE_BYTES + padding);
70947110
uCntBytes -= REGSIZE_BYTES * 2;
7111+
padding = 0;
70957112
}
70967113
}
70977114
else // useLoop is true
70987115
{
70997116
/* FIXME for MIPS: maybe optimize further */
7100-
getEmitter()->emitIns_R_R_I(INS_sd, EA_PTRSIZE, REG_R0, rAddr, 8);
7101-
getEmitter()->emitIns_R_R_I(INS_sd, EA_PTRSIZE, REG_R0, rAddr, 0);
7117+
getEmitter()->emitIns_R_R_I(INS_sd, EA_PTRSIZE, REG_R0, rAddr, 8 + padding);
7118+
getEmitter()->emitIns_R_R_I(INS_sd, EA_PTRSIZE, REG_R0, rAddr, 0 + padding);
71027119
getEmitter()->emitIns_R_R_I(INS_daddiu, EA_PTRSIZE, rCnt, rCnt, -1);
71037120
{
71047121
// bne rCnt, zero, -4 * 4

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