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toppercShao-Chung Wang
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[RISCV] Implement cross basic block VXRM write insertion. (llvm#70382)
This adds a new pass to insert VXRM writes for vector instructions. With the goal of avoiding redundant writes. The pass does 2 dataflow algorithms. The first is a forward data flow to calculate where a VXRM value is available. The second is a backwards dataflow to determine where a VXRM value is anticipated. Finally, we use the results of these two dataflows to insert VXRM writes where a value is anticipated, but not available. The pass does not split critical edges so we aren't always able to eliminate all redundancy. The pass will only insert vxrm writes on paths that always require it.
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8 files changed

+1020
-17
lines changed

8 files changed

+1020
-17
lines changed

llvm/lib/Target/RISCV/CMakeLists.txt

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@@ -31,6 +31,7 @@ add_llvm_target(RISCVCodeGen
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RISCVGlobalAlignment.cpp
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RISCVInsertVSETVLI.cpp
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RISCVInsertReadWriteCSR.cpp
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RISCVInsertWriteVXRM.cpp
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RISCVInstrInfo.cpp
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RISCVISelDAGToDAG.cpp
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RISCVISelLowering.cpp

llvm/lib/Target/RISCV/RISCV.h

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@@ -64,6 +64,9 @@ void initializeRISCVInsertVSETVLIPass(PassRegistry &);
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FunctionPass *createRISCVInsertReadWriteCSRPass();
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void initializeRISCVInsertReadWriteCSRPass(PassRegistry &);
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FunctionPass *createRISCVInsertWriteVXRMPass();
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void initializeRISCVInsertWriteVXRMPass(PassRegistry &);
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FunctionPass *createRISCVRedundantCopyEliminationPass();
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void initializeRISCVRedundantCopyEliminationPass(PassRegistry &);
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llvm/lib/Target/RISCV/RISCVInsertReadWriteCSR.cpp

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@@ -9,7 +9,6 @@
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// of the RISC-V instructions.
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//
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// Currently the pass implements:
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// -Naive insertion of a write to vxrm before an RVV fixed-point instruction.
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// -Writing and saving frm before an RVV floating-point instruction with a
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// static rounding mode and restores the value after.
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//
@@ -58,25 +57,11 @@ char RISCVInsertReadWriteCSR::ID = 0;
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INITIALIZE_PASS(RISCVInsertReadWriteCSR, DEBUG_TYPE,
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RISCV_INSERT_READ_WRITE_CSR_NAME, false, false)
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// This function inserts a write to vxrm when encountering an RVV fixed-point
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// instruction. This function also swaps frm and restores it when encountering
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// an RVV floating point instruction with a static rounding mode.
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// This function also swaps frm and restores it when encountering an RVV
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// floating point instruction with a static rounding mode.
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bool RISCVInsertReadWriteCSR::emitWriteRoundingMode(MachineBasicBlock &MBB) {
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bool Changed = false;
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for (MachineInstr &MI : MBB) {
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int VXRMIdx = RISCVII::getVXRMOpNum(MI.getDesc());
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if (VXRMIdx >= 0) {
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unsigned VXRMImm = MI.getOperand(VXRMIdx).getImm();
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Changed = true;
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BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(RISCV::WriteVXRMImm))
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.addImm(VXRMImm);
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MI.addOperand(MachineOperand::CreateReg(RISCV::VXRM, /*IsDef*/ false,
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/*IsImp*/ true));
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continue;
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}
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int FRMIdx = RISCVII::getFRMOpNum(MI.getDesc());
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if (FRMIdx < 0)
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continue;

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