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[ARM] Convert some tests to opaque pointers (NFC)
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843 files changed

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Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
; RUN: llc -mtriple=arm-eabi -mattr=+v6 %s -o /dev/null
22

3-
%struct.layer_data = type { i32, [2048 x i8], i8*, [16 x i8], i32, i8*, i32, i32, [64 x i32], [64 x i32], [64 x i32], [64 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [12 x [64 x i16]] }
4-
@ld = external global %struct.layer_data* ; <%struct.layer_data**> [#uses=1]
3+
%struct.layer_data = type { i32, [2048 x i8], ptr, [16 x i8], i32, ptr, i32, i32, [64 x i32], [64 x i32], [64 x i32], [64 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [12 x [64 x i16]] }
4+
@ld = external global ptr ; <ptr> [#uses=1]
55

66
define void @main() {
77
entry:
@@ -11,10 +11,10 @@ bb169.i: ; preds = %entry
1111
ret void
1212

1313
cond_true11: ; preds = %entry
14-
%tmp.i32 = load %struct.layer_data*, %struct.layer_data** @ld ; <%struct.layer_data*> [#uses=2]
15-
%tmp3.i35 = getelementptr %struct.layer_data, %struct.layer_data* %tmp.i32, i32 0, i32 1, i32 2048; <i8*> [#uses=2]
16-
%tmp.i36 = getelementptr %struct.layer_data, %struct.layer_data* %tmp.i32, i32 0, i32 2 ; <i8**> [#uses=1]
17-
store i8* %tmp3.i35, i8** %tmp.i36
18-
store i8* %tmp3.i35, i8** null
14+
%tmp.i32 = load ptr, ptr @ld ; <ptr> [#uses=2]
15+
%tmp3.i35 = getelementptr %struct.layer_data, ptr %tmp.i32, i32 0, i32 1, i32 2048; <ptr> [#uses=2]
16+
%tmp.i36 = getelementptr %struct.layer_data, ptr %tmp.i32, i32 0, i32 2 ; <ptr> [#uses=1]
17+
store ptr %tmp3.i35, ptr %tmp.i36
18+
store ptr %tmp3.i35, ptr null
1919
ret void
2020
}

llvm/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll

Lines changed: 22 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -4,30 +4,30 @@
44
; The execution domain checking code would translate vmovs to vorr whether or not
55
; we had NEON instructions. Verify we don't if we're not compiled with NEON.
66
; DOMAIN-NOT: vorr
7-
@quant_coef = external global [6 x [4 x [4 x i32]]] ; <[6 x [4 x [4 x i32]]]*> [#uses=1]
8-
@dequant_coef = external global [6 x [4 x [4 x i32]]] ; <[6 x [4 x [4 x i32]]]*> [#uses=1]
9-
@A = external global [4 x [4 x i32]] ; <[4 x [4 x i32]]*> [#uses=1]
7+
@quant_coef = external global [6 x [4 x [4 x i32]]] ; <ptr> [#uses=1]
8+
@dequant_coef = external global [6 x [4 x [4 x i32]]] ; <ptr> [#uses=1]
9+
@A = external global [4 x [4 x i32]] ; <ptr> [#uses=1]
1010

1111
; CHECK-LABEL: dct_luma_sp:
12-
define fastcc i32 @dct_luma_sp(i32 %block_x, i32 %block_y, i32* %coeff_cost) "frame-pointer"="all" {
12+
define fastcc i32 @dct_luma_sp(i32 %block_x, i32 %block_y, ptr %coeff_cost) "frame-pointer"="all" {
1313
entry:
1414
; Make sure to use base-updating stores for saving callee-saved registers.
1515
; CHECK: push
1616
; CHECK-NOT: sub sp
1717
; CHECK: push
18-
%predicted_block = alloca [4 x [4 x i32]], align 4 ; <[4 x [4 x i32]]*> [#uses=1]
18+
%predicted_block = alloca [4 x [4 x i32]], align 4 ; <ptr> [#uses=1]
1919
br label %cond_next489
2020

2121
cond_next489: ; preds = %cond_false, %bb471
22-
%j.7.in = load i8, i8* null ; <i8> [#uses=1]
23-
%i.8.in = load i8, i8* null ; <i8> [#uses=1]
22+
%j.7.in = load i8, ptr null ; <i8> [#uses=1]
23+
%i.8.in = load i8, ptr null ; <i8> [#uses=1]
2424
%i.8 = zext i8 %i.8.in to i32 ; <i32> [#uses=4]
2525
%j.7 = zext i8 %j.7.in to i32 ; <i32> [#uses=4]
26-
%tmp495 = getelementptr [4 x [4 x i32]], [4 x [4 x i32]]* %predicted_block, i32 0, i32 %i.8, i32 %j.7 ; <i32*> [#uses=2]
27-
%tmp496 = load i32, i32* %tmp495 ; <i32> [#uses=2]
28-
%tmp502 = load i32, i32* null ; <i32> [#uses=1]
29-
%tmp542 = getelementptr [6 x [4 x [4 x i32]]], [6 x [4 x [4 x i32]]]* @quant_coef, i32 0, i32 0, i32 %i.8, i32 %j.7 ; <i32*> [#uses=1]
30-
%tmp543 = load i32, i32* %tmp542 ; <i32> [#uses=1]
26+
%tmp495 = getelementptr [4 x [4 x i32]], ptr %predicted_block, i32 0, i32 %i.8, i32 %j.7 ; <ptr> [#uses=2]
27+
%tmp496 = load i32, ptr %tmp495 ; <i32> [#uses=2]
28+
%tmp502 = load i32, ptr null ; <i32> [#uses=1]
29+
%tmp542 = getelementptr [6 x [4 x [4 x i32]]], ptr @quant_coef, i32 0, i32 0, i32 %i.8, i32 %j.7 ; <ptr> [#uses=1]
30+
%tmp543 = load i32, ptr %tmp542 ; <i32> [#uses=1]
3131
%tmp548 = ashr i32 0, 0 ; <i32> [#uses=3]
3232
%tmp561 = sub i32 0, %tmp496 ; <i32> [#uses=3]
3333
%abscond563 = icmp sgt i32 %tmp561, -1 ; <i1> [#uses=1]
@@ -39,10 +39,10 @@ cond_next489: ; preds = %cond_false, %bb471
3939
br i1 %tmp579, label %bb712, label %cond_next589
4040

4141
cond_next589: ; preds = %cond_next489
42-
%tmp605 = getelementptr [6 x [4 x [4 x i32]]], [6 x [4 x [4 x i32]]]* @dequant_coef, i32 0, i32 0, i32 %i.8, i32 %j.7 ; <i32*> [#uses=1]
43-
%tmp606 = load i32, i32* %tmp605 ; <i32> [#uses=1]
44-
%tmp612 = load i32, i32* null ; <i32> [#uses=1]
45-
%tmp629 = load i32, i32* null ; <i32> [#uses=1]
42+
%tmp605 = getelementptr [6 x [4 x [4 x i32]]], ptr @dequant_coef, i32 0, i32 0, i32 %i.8, i32 %j.7 ; <ptr> [#uses=1]
43+
%tmp606 = load i32, ptr %tmp605 ; <i32> [#uses=1]
44+
%tmp612 = load i32, ptr null ; <i32> [#uses=1]
45+
%tmp629 = load i32, ptr null ; <i32> [#uses=1]
4646
%tmp629a = sitofp i32 %tmp629 to double ; <double> [#uses=1]
4747
%tmp631 = fmul double %tmp629a, 0.000000e+00 ; <double> [#uses=1]
4848
%tmp632 = fadd double 0.000000e+00, %tmp631 ; <double> [#uses=1]
@@ -54,7 +54,7 @@ cond_next589: ; preds = %cond_next489
5454
%tmp660 = sub i32 0, %tmp659 ; <i32> [#uses=1]
5555
%tmp666 = sub i32 %tmp660, %tmp496 ; <i32> [#uses=1]
5656
%tmp667 = sitofp i32 %tmp666 to double ; <double> [#uses=2]
57-
call void @levrun_linfo_inter( i32 %tmp576, i32 0, i32* null, i32* null )
57+
call void @levrun_linfo_inter( i32 %tmp576, i32 0, ptr null, ptr null )
5858
%tmp671 = fmul double %tmp667, %tmp667 ; <double> [#uses=1]
5959
%tmp675 = fadd double %tmp671, 0.000000e+00 ; <double> [#uses=1]
6060
%tmp678 = fcmp oeq double %tmp632, %tmp675 ; <i1> [#uses=1]
@@ -89,9 +89,9 @@ bb737: ; preds = %cond_false689
8989

9090
cond_true740: ; preds = %bb737
9191
%tmp761 = call fastcc i32 @sign( i32 %tmp576, i32 0 ) ; <i32> [#uses=1]
92-
%tmp780 = load i32, i32* null ; <i32> [#uses=1]
93-
%tmp785 = getelementptr [4 x [4 x i32]], [4 x [4 x i32]]* @A, i32 0, i32 %i.8, i32 %j.7 ; <i32*> [#uses=1]
94-
%tmp786 = load i32, i32* %tmp785 ; <i32> [#uses=1]
92+
%tmp780 = load i32, ptr null ; <i32> [#uses=1]
93+
%tmp785 = getelementptr [4 x [4 x i32]], ptr @A, i32 0, i32 %i.8, i32 %j.7 ; <ptr> [#uses=1]
94+
%tmp786 = load i32, ptr %tmp785 ; <i32> [#uses=1]
9595
%tmp781 = mul i32 %tmp780, %tmp761 ; <i32> [#uses=1]
9696
%tmp787 = mul i32 %tmp781, %tmp786 ; <i32> [#uses=1]
9797
%tmp789 = shl i32 %tmp787, 0 ; <i32> [#uses=1]
@@ -100,7 +100,7 @@ cond_true740: ; preds = %bb737
100100

101101
cond_next791: ; preds = %cond_true740, %bb737
102102
%ilev.1 = phi i32 [ %tmp790, %cond_true740 ], [ 0, %bb737 ] ; <i32> [#uses=1]
103-
%tmp796 = load i32, i32* %tmp495 ; <i32> [#uses=1]
103+
%tmp796 = load i32, ptr %tmp495 ; <i32> [#uses=1]
104104
%tmp798 = add i32 %tmp796, %ilev.1 ; <i32> [#uses=1]
105105
%tmp812 = mul i32 0, %tmp502 ; <i32> [#uses=0]
106106
%tmp818 = call fastcc i32 @sign( i32 0, i32 %tmp798 ) ; <i32> [#uses=0]
@@ -109,4 +109,4 @@ cond_next791: ; preds = %cond_true740, %bb737
109109

110110
declare i32 @sign(i32, i32)
111111

112-
declare void @levrun_linfo_inter(i32, i32, i32*, i32*)
112+
declare void @levrun_linfo_inter(i32, i32, ptr, ptr)
Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,13 +1,13 @@
11
; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6,+vfp2
22

3-
define fastcc i8* @read_sleb128(i8* %p, i32* %val) {
3+
define fastcc ptr @read_sleb128(ptr %p, ptr %val) {
44
br label %bb
55

66
bb: ; preds = %bb, %0
7-
%p_addr.0 = getelementptr i8, i8* %p, i32 0 ; <i8*> [#uses=1]
8-
%tmp2 = load i8, i8* %p_addr.0 ; <i8> [#uses=2]
7+
%p_addr.0 = getelementptr i8, ptr %p, i32 0 ; <ptr> [#uses=1]
8+
%tmp2 = load i8, ptr %p_addr.0 ; <i8> [#uses=2]
99
%tmp4.rec = add i32 0, 1 ; <i32> [#uses=1]
10-
%tmp4 = getelementptr i8, i8* %p, i32 %tmp4.rec ; <i8*> [#uses=1]
10+
%tmp4 = getelementptr i8, ptr %p, i32 %tmp4.rec ; <ptr> [#uses=1]
1111
%tmp56 = zext i8 %tmp2 to i32 ; <i32> [#uses=1]
1212
%tmp7 = and i32 %tmp56, 127 ; <i32> [#uses=1]
1313
%tmp9 = shl i32 %tmp7, 0 ; <i32> [#uses=1]
@@ -16,6 +16,6 @@ bb: ; preds = %bb, %0
1616
br i1 %1, label %bb, label %cond_next28
1717

1818
cond_next28: ; preds = %bb
19-
store i32 %tmp11, i32* %val
20-
ret i8* %tmp4
19+
store i32 %tmp11, ptr %val
20+
ret ptr %tmp4
2121
}

llvm/test/CodeGen/ARM/2007-03-13-InstrSched.ll

Lines changed: 18 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -2,49 +2,49 @@
22
; RUN: llc -mtriple arm-apple-darwin -relocation-model pic -mattr=+v6 -filetype asm -o - %s | FileCheck -check-prefix CHECK-R9 %s
33
; RUN: llc -mtriple arm-apple-darwin -relocation-model pic -mattr=+v6,+reserve-r9 -ifcvt-limit=0 -stats -o /dev/null %s 2>&1 | FileCheck -check-prefix CHECK-ASM-PRINTER %s
44

5-
define void @test(i32 %tmp56222, i32 %tmp36224, i32 %tmp46223, i32 %i.0196.0.ph, i32 %tmp8, i32* %tmp1011, i32** %tmp1, i32* %d2.1.out, i32* %d3.1.out, i32* %d0.1.out, i32* %d1.1.out) {
5+
define void @test(i32 %tmp56222, i32 %tmp36224, i32 %tmp46223, i32 %i.0196.0.ph, i32 %tmp8, ptr %tmp1011, ptr %tmp1, ptr %d2.1.out, ptr %d3.1.out, ptr %d0.1.out, ptr %d1.1.out) {
66
newFuncRoot:
77
br label %bb74
88

99
bb78.exitStub:
10-
store i32 %d2.1, i32* %d2.1.out
11-
store i32 %d3.1, i32* %d3.1.out
12-
store i32 %d0.1, i32* %d0.1.out
13-
store i32 %d1.1, i32* %d1.1.out
10+
store i32 %d2.1, ptr %d2.1.out
11+
store i32 %d3.1, ptr %d3.1.out
12+
store i32 %d0.1, ptr %d0.1.out
13+
store i32 %d1.1, ptr %d1.1.out
1414
ret void
1515

1616
bb74:
1717
%fp.1.rec = phi i32 [ 0, %newFuncRoot ], [ %tmp71.rec, %bb26 ]
18-
%fm.1.in = phi i32* [ %tmp71, %bb26 ], [ %tmp1011, %newFuncRoot ]
18+
%fm.1.in = phi ptr [ %tmp71, %bb26 ], [ %tmp1011, %newFuncRoot ]
1919
%d0.1 = phi i32 [ %tmp44, %bb26 ], [ 8192, %newFuncRoot ]
2020
%d1.1 = phi i32 [ %tmp54, %bb26 ], [ 8192, %newFuncRoot ]
2121
%d2.1 = phi i32 [ %tmp64, %bb26 ], [ 8192, %newFuncRoot ]
2222
%d3.1 = phi i32 [ %tmp69, %bb26 ], [ 8192, %newFuncRoot ]
23-
%fm.1 = load i32, i32* %fm.1.in
23+
%fm.1 = load i32, ptr %fm.1.in
2424
icmp eq i32 %fp.1.rec, %tmp8
2525
br i1 %0, label %bb78.exitStub, label %bb26
2626

2727
bb26:
28-
%tmp28 = getelementptr i32*, i32** %tmp1, i32 %fp.1.rec
29-
%tmp30 = load i32*, i32** %tmp28
30-
%tmp33 = getelementptr i32, i32* %tmp30, i32 %i.0196.0.ph
31-
%tmp34 = load i32, i32* %tmp33
32-
%tmp38 = getelementptr i32, i32* %tmp30, i32 %tmp36224
33-
%tmp39 = load i32, i32* %tmp38
28+
%tmp28 = getelementptr ptr, ptr %tmp1, i32 %fp.1.rec
29+
%tmp30 = load ptr, ptr %tmp28
30+
%tmp33 = getelementptr i32, ptr %tmp30, i32 %i.0196.0.ph
31+
%tmp34 = load i32, ptr %tmp33
32+
%tmp38 = getelementptr i32, ptr %tmp30, i32 %tmp36224
33+
%tmp39 = load i32, ptr %tmp38
3434
%tmp42 = mul i32 %tmp34, %fm.1
3535
%tmp44 = add i32 %tmp42, %d0.1
36-
%tmp48 = getelementptr i32, i32* %tmp30, i32 %tmp46223
37-
%tmp49 = load i32, i32* %tmp48
36+
%tmp48 = getelementptr i32, ptr %tmp30, i32 %tmp46223
37+
%tmp49 = load i32, ptr %tmp48
3838
%tmp52 = mul i32 %tmp39, %fm.1
3939
%tmp54 = add i32 %tmp52, %d1.1
40-
%tmp58 = getelementptr i32, i32* %tmp30, i32 %tmp56222
41-
%tmp59 = load i32, i32* %tmp58
40+
%tmp58 = getelementptr i32, ptr %tmp30, i32 %tmp56222
41+
%tmp59 = load i32, ptr %tmp58
4242
%tmp62 = mul i32 %tmp49, %fm.1
4343
%tmp64 = add i32 %tmp62, %d2.1
4444
%tmp67 = mul i32 %tmp59, %fm.1
4545
%tmp69 = add i32 %tmp67, %d3.1
4646
%tmp71.rec = add i32 %fp.1.rec, 1
47-
%tmp71 = getelementptr i32, i32* %tmp1011, i32 %tmp71.rec
47+
%tmp71 = getelementptr i32, ptr %tmp1011, i32 %tmp71.rec
4848
br label %bb74
4949
}
5050

llvm/test/CodeGen/ARM/2007-03-21-JoinIntervalsCrash.ll

Lines changed: 22 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -3,32 +3,32 @@
33

44
%struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32 }
55
%struct.arm_stack_offsets = type { i32, i32, i32, i32, i32 }
6-
%struct.c_arg_info = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i8 }
6+
%struct.c_arg_info = type { ptr, ptr, ptr, ptr, i8 }
77
%struct.c_language_function = type { %struct.stmt_tree_s }
88
%struct.c_switch = type opaque
99
%struct.eh_status = type opaque
10-
%struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** }
11-
%struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
12-
%struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i8, i8, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, i8, i8, i8 }
13-
%struct.ht_identifier = type { i8*, i32, i32 }
10+
%struct.emit_status = type { i32, i32, ptr, ptr, ptr, i32, %struct.location_t, i32, ptr, ptr }
11+
%struct.expr_status = type { i32, i32, i32, ptr, ptr, ptr }
12+
%struct.function = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i32, ptr, %struct.CUMULATIVE_ARGS, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i8, i32, i64, ptr, ptr, ptr, ptr, ptr, i32, ptr, i32, i32, ptr, ptr, i32, i32, i32, ptr, i32, i32, i8, i8, ptr, ptr, i32, i32, i32, i32, %struct.location_t, ptr, ptr, i8, i8, i8 }
13+
%struct.ht_identifier = type { ptr, i32, i32 }
1414
%struct.initial_value_struct = type opaque
1515
%struct.lang_decl = type { i8 }
16-
%struct.language_function = type { %struct.c_language_function, %struct.tree_node*, %struct.tree_node*, %struct.c_switch*, %struct.c_arg_info*, i32, i32, i32, i32 }
17-
%struct.location_t = type { i8*, i32 }
18-
%struct.machine_function = type { %struct.rtx_def*, i32, i32, i32, %struct.arm_stack_offsets, i32, i32, i32, [14 x %struct.rtx_def*] }
19-
%struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] }
16+
%struct.language_function = type { %struct.c_language_function, ptr, ptr, ptr, ptr, i32, i32, i32, i32 }
17+
%struct.location_t = type { ptr, i32 }
18+
%struct.machine_function = type { ptr, i32, i32, i32, %struct.arm_stack_offsets, i32, i32, i32, [14 x ptr] }
19+
%struct.rtvec_def = type { i32, [1 x ptr] }
2020
%struct.rtx_def = type { i16, i8, i8, %struct.u }
21-
%struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* }
22-
%struct.stmt_tree_s = type { %struct.tree_node*, i32 }
21+
%struct.sequence_stack = type { ptr, ptr, ptr }
22+
%struct.stmt_tree_s = type { ptr, i32 }
2323
%struct.temp_slot = type opaque
24-
%struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %union.tree_ann_d*, i8, i8, i8, i8, i8 }
25-
%struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
24+
%struct.tree_common = type { ptr, ptr, ptr, i8, i8, i8, i8, i8 }
25+
%struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, ptr, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, %struct.tree_decl_u2, ptr, ptr, i64, ptr }
2626
%struct.tree_decl_u1 = type { i64 }
27-
%struct.tree_decl_u2 = type { %struct.function* }
27+
%struct.tree_decl_u2 = type { ptr }
2828
%struct.tree_identifier = type { %struct.tree_common, %struct.ht_identifier }
2929
%struct.tree_node = type { %struct.tree_decl }
3030
%struct.u = type { [1 x i64] }
31-
%struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* }
31+
%struct.var_refs_queue = type { ptr, i32, i32, ptr }
3232
%struct.varasm_status = type opaque
3333
%struct.varray_head_tag = type opaque
3434
%union.tree_ann_d = type opaque
@@ -40,9 +40,8 @@ entry:
4040
%spec.1961.adj = shl i64 %spec.1961, 32 ; <i64> [#uses=1]
4141
%spec.1961.adj.ins = or i64 %spec.1961.adj, 0 ; <i64> [#uses=2]
4242
%tmp10959 = lshr i64 %spec.1961.adj.ins, 32 ; <i64> [#uses=2]
43-
%tmp1920 = inttoptr i64 %tmp10959 to %struct.tree_common* ; <%struct.tree_common*> [#uses=1]
44-
%tmp21 = getelementptr %struct.tree_common, %struct.tree_common* %tmp1920, i32 0, i32 3 ; <i8*> [#uses=1]
45-
%tmp2122 = bitcast i8* %tmp21 to i32* ; <i32*> [#uses=1]
43+
%tmp1920 = inttoptr i64 %tmp10959 to ptr ; <ptr> [#uses=1]
44+
%tmp21 = getelementptr %struct.tree_common, ptr %tmp1920, i32 0, i32 3 ; <ptr> [#uses=1]
4645
br i1 false, label %cond_next53, label %cond_true
4746

4847
cond_true: ; preds = %entry
@@ -71,7 +70,7 @@ cond_next856: ; preds = %cond_true851
7170
ret void
7271

7372
bb866: ; preds = %cond_true851
74-
%tmp874 = load i32, i32* %tmp2122 ; <i32> [#uses=1]
73+
%tmp874 = load i32, ptr %tmp21 ; <i32> [#uses=1]
7574
%tmp876877 = trunc i32 %tmp874 to i8 ; <i8> [#uses=1]
7675
icmp eq i8 %tmp876877, 1 ; <i1>:0 [#uses=1]
7776
br i1 %0, label %cond_next881, label %cond_true878
@@ -80,10 +79,10 @@ cond_true878: ; preds = %bb866
8079
unreachable
8180

8281
cond_next881: ; preds = %bb866
83-
%tmp884885 = inttoptr i64 %tmp10959 to %struct.tree_identifier* ; <%struct.tree_identifier*> [#uses=1]
84-
%tmp887 = getelementptr %struct.tree_identifier, %struct.tree_identifier* %tmp884885, i32 0, i32 1, i32 0 ; <i8**> [#uses=1]
85-
%tmp888 = load i8*, i8** %tmp887 ; <i8*> [#uses=1]
86-
tail call void (i32, ...) @error( i32 undef, i8* %tmp888 )
82+
%tmp884885 = inttoptr i64 %tmp10959 to ptr ; <ptr> [#uses=1]
83+
%tmp887 = getelementptr %struct.tree_identifier, ptr %tmp884885, i32 0, i32 1, i32 0 ; <ptr> [#uses=1]
84+
%tmp888 = load ptr, ptr %tmp887 ; <ptr> [#uses=1]
85+
tail call void (i32, ...) @error( i32 undef, ptr %tmp888 )
8786
ret void
8887

8988
cond_true918: ; preds = %cond_false841

llvm/test/CodeGen/ARM/2007-03-27-RegScavengerAssert.ll

Lines changed: 7 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -4,16 +4,16 @@
44
%struct.rtx_def = type { i16, i8, i8, %struct.u }
55
%struct.u = type { [1 x i64] }
66

7-
define fastcc void @find_reloads_address(%struct.rtx_def** %loc) {
7+
define fastcc void @find_reloads_address(ptr %loc) {
88
entry:
9-
%ad_addr = alloca %struct.rtx_def* ; <%struct.rtx_def**> [#uses=2]
9+
%ad_addr = alloca ptr ; <ptr> [#uses=2]
1010
br i1 false, label %cond_next416, label %cond_true340
1111

1212
cond_true340: ; preds = %entry
1313
ret void
1414

1515
cond_next416: ; preds = %entry
16-
%tmp1085 = load %struct.rtx_def*, %struct.rtx_def** %ad_addr ; <%struct.rtx_def*> [#uses=1]
16+
%tmp1085 = load ptr, ptr %ad_addr ; <ptr> [#uses=1]
1717
br i1 false, label %bb1084, label %cond_true418
1818

1919
cond_true418: ; preds = %cond_next416
@@ -23,13 +23,12 @@ bb1084: ; preds = %cond_next416
2323
br i1 false, label %cond_true1092, label %cond_next1102
2424

2525
cond_true1092: ; preds = %bb1084
26-
%tmp1094 = getelementptr %struct.rtx_def, %struct.rtx_def* %tmp1085, i32 0, i32 3 ; <%struct.u*> [#uses=1]
27-
%tmp10981099 = bitcast %struct.u* %tmp1094 to %struct.rtx_def** ; <%struct.rtx_def**> [#uses=2]
28-
%tmp1101 = load %struct.rtx_def*, %struct.rtx_def** %tmp10981099 ; <%struct.rtx_def*> [#uses=1]
29-
store %struct.rtx_def* %tmp1101, %struct.rtx_def** %ad_addr
26+
%tmp1094 = getelementptr %struct.rtx_def, ptr %tmp1085, i32 0, i32 3 ; <ptr> [#uses=1]
27+
%tmp1101 = load ptr, ptr %tmp1094 ; <ptr> [#uses=1]
28+
store ptr %tmp1101, ptr %ad_addr
3029
br label %cond_next1102
3130

3231
cond_next1102: ; preds = %cond_true1092, %bb1084
33-
%loc_addr.0 = phi %struct.rtx_def** [ %tmp10981099, %cond_true1092 ], [ %loc, %bb1084 ] ; <%struct.rtx_def**> [#uses=0]
32+
%loc_addr.0 = phi ptr [ %tmp1094, %cond_true1092 ], [ %loc, %bb1084 ] ; <ptr> [#uses=0]
3433
ret void
3534
}

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