diff --git a/CHANGELOG.md b/CHANGELOG.md index 517102c2..f1115cdd 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -12,6 +12,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/). - `Instance` for Timer's, rtic-monotonic fugit impl - Serial can now be reconfigured, allowing to change e.g. the baud rate after initialisation. +### Changed + +- replace `GetBusFreq` with `BusClock` and `BusTimerClock` + ## [v0.8.0] - 2021-12-29 ### Breaking changes diff --git a/src/i2c.rs b/src/i2c.rs index 3cc12cf2..295a5529 100644 --- a/src/i2c.rs +++ b/src/i2c.rs @@ -9,7 +9,7 @@ use crate::gpio::gpiob::{PB10, PB11, PB6, PB7, PB8, PB9}; use crate::gpio::{Alternate, OpenDrain}; use crate::hal::blocking::i2c::{Read, Write, WriteRead}; use crate::pac::{DWT, I2C1, I2C2, RCC}; -use crate::rcc::{Clocks, Enable, GetBusFreq, Reset}; +use crate::rcc::{BusClock, Clocks, Enable, Reset}; use crate::time::Hertz; use core::ops::Deref; use nb::Error::{Other, WouldBlock}; @@ -117,7 +117,7 @@ pub struct I2c { } pub trait Instance: - crate::Sealed + Deref + Enable + Reset + GetBusFreq + crate::Sealed + Deref + Enable + Reset + BusClock { } @@ -162,7 +162,7 @@ where I2C::enable(rcc); I2C::reset(rcc); - let pclk1 = I2C::get_frequency(&clocks).0; + let pclk1 = I2C::clock(&clocks).0; assert!(mode.get_frequency().0 <= 400_000); diff --git a/src/pwm_input.rs b/src/pwm_input.rs index 5d8c9c17..f35db817 100644 --- a/src/pwm_input.rs +++ b/src/pwm_input.rs @@ -13,7 +13,7 @@ use crate::pac::{TIM2, TIM3}; use crate::afio::MAPR; use crate::gpio::{self, Input}; -use crate::rcc::{Clocks, GetBusFreq, RccBus}; +use crate::rcc::{BusTimerClock, Clocks}; use crate::time::Hertz; use crate::timer::Timer; @@ -273,7 +273,7 @@ macro_rules! hal { if ccr1 == 0 { Err(Error::FrequencyTooLow) } else { - let clk : u32 = <$TIMX as RccBus>::Bus::get_timer_frequency(&clocks).0; + let clk : u32 = <$TIMX>::timer_clock(&clocks).0; Ok(Hertz(clk/((presc+1) as u32*(ccr1 + 1)as u32))) } } diff --git a/src/rcc.rs b/src/rcc.rs index b644d8cb..f6469b2a 100644 --- a/src/rcc.rs +++ b/src/rcc.rs @@ -416,46 +416,64 @@ impl Clocks { } } -pub trait GetBusFreq { - fn get_frequency(clocks: &Clocks) -> Hertz; - fn get_timer_frequency(clocks: &Clocks) -> Hertz { - Self::get_frequency(clocks) - } +/// Frequency on bus that peripheral is connected in +pub trait BusClock { + /// Calculates frequency depending on `Clock` state + fn clock(clocks: &Clocks) -> Hertz; +} + +/// Frequency on bus that timer is connected in +pub trait BusTimerClock { + /// Calculates base frequency of timer depending on `Clock` state + fn timer_clock(clocks: &Clocks) -> Hertz; } -impl GetBusFreq for T +impl BusClock for T where T: RccBus, - T::Bus: GetBusFreq, + T::Bus: BusClock, { - fn get_frequency(clocks: &Clocks) -> Hertz { - T::Bus::get_frequency(clocks) + fn clock(clocks: &Clocks) -> Hertz { + T::Bus::clock(clocks) } - fn get_timer_frequency(clocks: &Clocks) -> Hertz { - T::Bus::get_timer_frequency(clocks) +} + +impl BusTimerClock for T +where + T: RccBus, + T::Bus: BusTimerClock, +{ + fn timer_clock(clocks: &Clocks) -> Hertz { + T::Bus::timer_clock(clocks) } } -impl GetBusFreq for AHB { - fn get_frequency(clocks: &Clocks) -> Hertz { +impl BusClock for AHB { + fn clock(clocks: &Clocks) -> Hertz { clocks.hclk } } -impl GetBusFreq for APB1 { - fn get_frequency(clocks: &Clocks) -> Hertz { +impl BusClock for APB1 { + fn clock(clocks: &Clocks) -> Hertz { clocks.pclk1 } - fn get_timer_frequency(clocks: &Clocks) -> Hertz { - clocks.pclk1_tim() - } } -impl GetBusFreq for APB2 { - fn get_frequency(clocks: &Clocks) -> Hertz { +impl BusClock for APB2 { + fn clock(clocks: &Clocks) -> Hertz { clocks.pclk2 } - fn get_timer_frequency(clocks: &Clocks) -> Hertz { +} + +impl BusTimerClock for APB1 { + fn timer_clock(clocks: &Clocks) -> Hertz { + clocks.pclk1_tim() + } +} + +impl BusTimerClock for APB2 { + fn timer_clock(clocks: &Clocks) -> Hertz { clocks.pclk2_tim() } } diff --git a/src/serial.rs b/src/serial.rs index 881bd595..52b7f967 100644 --- a/src/serial.rs +++ b/src/serial.rs @@ -53,7 +53,7 @@ use crate::gpio::gpiob::{PB10, PB11, PB6, PB7}; use crate::gpio::gpioc::{PC10, PC11}; use crate::gpio::gpiod::{PD5, PD6, PD8, PD9}; use crate::gpio::{Alternate, Input}; -use crate::rcc::{Clocks, Enable, GetBusFreq, Reset}; +use crate::rcc::{BusClock, Clocks, Enable, Reset}; use crate::time::{Bps, U32Ext}; /// Interrupt event @@ -192,7 +192,7 @@ pub struct Serial { } pub trait Instance: - crate::Sealed + Deref + Enable + Reset + GetBusFreq + crate::Sealed + Deref + Enable + Reset + BusClock { #[doc(hidden)] fn ptr() -> *const uart_base::RegisterBlock; @@ -249,7 +249,7 @@ where fn apply_config(&self, config: Config, clocks: Clocks) { // Configure baud rate - let brr = USART::get_frequency(&clocks).0 / config.baudrate.0; + let brr = USART::clock(&clocks).0 / config.baudrate.0; assert!(brr >= 16, "impossible baud rate"); self.usart.brr.write(|w| unsafe { w.bits(brr) }); diff --git a/src/spi.rs b/src/spi.rs index 1f9a5916..0e35737c 100644 --- a/src/spi.rs +++ b/src/spi.rs @@ -51,7 +51,7 @@ use crate::gpio::gpiob::{PB13, PB14, PB15, PB3, PB4, PB5}; #[cfg(feature = "connectivity")] use crate::gpio::gpioc::{PC10, PC11, PC12}; use crate::gpio::{Alternate, Input}; -use crate::rcc::{Clocks, Enable, GetBusFreq, Reset}; +use crate::rcc::{BusClock, Clocks, Enable, Reset}; use crate::time::Hertz; use core::sync::atomic::{self, Ordering}; @@ -142,7 +142,7 @@ remap!(Spi3NoRemap, SPI3, false, PB3, PB4, PB5); remap!(Spi3Remap, SPI3, true, PC10, PC11, PC12); pub trait Instance: - crate::Sealed + Deref + Enable + Reset + GetBusFreq + crate::Sealed + Deref + Enable + Reset + BusClock { } @@ -342,7 +342,7 @@ where // disable SS output spi.cr2.write(|w| w.ssoe().clear_bit()); - let br = match SPI::get_frequency(&clocks).0 / freq.0 { + let br = match SPI::clock(&clocks).0 / freq.0 { 0 => unreachable!(), 1..=2 => 0b000, 3..=5 => 0b001, diff --git a/src/timer.rs b/src/timer.rs index 53c5619b..46ee70a9 100644 --- a/src/timer.rs +++ b/src/timer.rs @@ -278,7 +278,7 @@ impl Cancel for CountDownTimer { impl Periodic for CountDownTimer {} -pub trait Instance: crate::Sealed + rcc::Enable + rcc::Reset + rcc::GetBusFreq {} +pub trait Instance: crate::Sealed + rcc::Enable + rcc::Reset + rcc::BusTimerClock {} impl Timer where @@ -295,7 +295,7 @@ where } Self { - clk: TIM::get_timer_frequency(&clocks), + clk: TIM::timer_clock(clocks), tim, } }