diff --git a/boards.txt b/boards.txt index e8c580a..19ae235 100644 --- a/boards.txt +++ b/boards.txt @@ -28,7 +28,7 @@ menu.sbl_baud=Ambiq Secure Bootloader Baud Rate ############################################################### artemis.name=SparkFun Artemis Module -artemis.build.variant=SparkFun_Artemis +artemis.build.variant=artemis artemis.build.board=SFE_ARTEMIS artemis.upload.maximum_size=960000 artemis.upload.sbl_baud=115200 @@ -65,7 +65,7 @@ artemis.menu.loader.sparkfun_svl.build.ldscript={build.variant.path}/linker_scri ############################################################### amap3redboard.name=SparkFun RedBoard Artemis -amap3redboard.build.variant=SparkFun_RedBoard_Artemis +amap3redboard.build.variant=redboard_artemis amap3redboard.build.board=AM_AP3_SFE_BB_ARTEMIS amap3redboard.upload.maximum_size=960000 amap3redboard.upload.sbl_baud=115200 @@ -102,7 +102,7 @@ amap3redboard.menu.loader.sparkfun_svl.build.ldscript={build.variant.path}/linke ############################################################### amap3nano.name=SparkFun RedBoard Artemis Nano -amap3nano.build.variant=SparkFun_RedBoard_Artemis_Nano +amap3nano.build.variant=redboard_artemis_nano amap3nano.build.board=AM_AP3_SFE_BB_ARTEMIS_NANO amap3nano.upload.maximum_size=960000 amap3nano.upload.sbl_baud=115200 @@ -139,7 +139,7 @@ amap3nano.menu.loader.sparkfun_svl.build.ldscript={build.variant.path}/linker_sc ############################################################### amap3atp.name=SparkFun RedBoard Artemis ATP -amap3atp.build.variant=SparkFun_RedBoard_Artemis_ATP +amap3atp.build.variant=redboard_artemis_atp amap3atp.build.board=AM_AP3_SFE_BB_ARTEMIS_ATP amap3atp.upload.maximum_size=960000 amap3atp.upload.sbl_baud=115200 @@ -176,7 +176,7 @@ amap3atp.menu.loader.sparkfun_svl.build.ldscript={build.variant.path}/linker_scr ############################################################### amap3thing.name=SparkFun Artemis Thing Plus -amap3thing.build.variant=SparkFun_Artemis_Thing_Plus +amap3thing.build.variant=artemis_thing_plus amap3thing.build.board=AM_AP3_SFE_THING_PLUS amap3thing.upload.maximum_size=960000 amap3thing.upload.sbl_baud=115200 @@ -213,7 +213,7 @@ amap3thing.menu.loader.sparkfun_svl.build.ldscript={build.variant.path}/linker_s ############################################################### edge.name=SparkFun Edge -edge.build.variant=SparkFun_Edge +edge.build.variant=edge edge.build.board=SFE_EDGE edge.upload.tool=ambiq_bin2board edge.upload.maximum_size=960000 @@ -260,7 +260,7 @@ edge.menu.loader.sparkfun_svl.build.ldscript={build.variant.path}/linker_scripts ############################################################### edge2.name=SparkFun Edge2 -edge2.build.variant=SparkFun_Edge2 +edge2.build.variant=edge2 edge2.build.board=SFE_EDGE2 edge2.upload.maximum_size=960000 edge2.upload.sbl_baud=115200 diff --git a/tools/variants/README.md b/tools/variants/README.md new file mode 100644 index 0000000..ed0be93 --- /dev/null +++ b/tools/variants/README.md @@ -0,0 +1,7 @@ +Variant Tools +============= + +The 'single source of truth' for variants is the [SparkFun_AmbiqSuite_Apollo3_BSPs](https://github.com/sparkfun/SparkFun_Apollo3_AmbiqSuite_BSPs) repo. This script is used to sync Arduino's sources with the BSP repo by copying the relevant ```.c``` and ```.h``` files. + +* BSP libraries (```libam_bsp.a```) are not copied because Arduino compiles the bsp files with the core +* BSP source (```bsp_pins.src```) are not copied because you are not meant to edit variants in the Arduino environment \ No newline at end of file diff --git a/tools/variants/arduino_boards.sh b/tools/variants/arduino_boards.sh new file mode 100644 index 0000000..ec63bf1 --- /dev/null +++ b/tools/variants/arduino_boards.sh @@ -0,0 +1 @@ +export BOARDS="edge edge2 artemis artemis_thing_plus redboard_artemis redboard_artemis_atp redboard_artemis_nano" diff --git a/tools/variants/regen_variants.sh b/tools/variants/regen_variants.sh new file mode 100644 index 0000000..fcaa14c --- /dev/null +++ b/tools/variants/regen_variants.sh @@ -0,0 +1,56 @@ +#!/usr/bin/env bash + +# use this script to update variants based on bsp files + + + +# setup +set -e +set -o errexit +echo "" 1>&2 + +# get enclosing directory +DIR=$(dirname -- "$(readlink -f -- "$BASH_SOURCE")") + +# defaults +BSP_ROOT=. +BOARDS_FILE=$DIR/arduino_boards.sh +VARIANTS_ROOT=../../variants + +# handle arguments +while getopts ":r:b:" opt; do + case $opt in + r) BSP_ROOT="$OPTARG" + ;; + b) BOARDS_FILE="$OPTARG" + ;; + \?) echo "Invalid option -$OPTARG" 1>&2 + ;; + esac +done + +# verify bsp root +echo "Using \$BSP_ROOT=$BSP_ROOT" 1>&2 +VFILE=$BSP_ROOT/README.md +if [ -f "$VFILE" ]; +then + echo "\$BSP_ROOT verification passed" 1>&2 +else + echo "\$BSP_ROOT verification failed" 1>&2 + exit 1 +fi + +# load in boards to handle +echo "Using \$BOARDS_FILE=$BOARDS_FILE" 1>&2 +source $BOARDS_FILE + +# copy bsp files from BSP repo to Arduino variants +echo "" 1>&2 +for value in $BOARDS +do + echo "Copying bsp files for: $value" 1>&2 + cp $BSP_ROOT/$value/bsp/am_bsp_pins.c $VARIANTS_ROOT/$value/bsp/am_bsp_pins.c + cp $BSP_ROOT/$value/bsp/am_bsp_pins.h $VARIANTS_ROOT/$value/bsp/am_bsp_pins.h + cp $BSP_ROOT/$value/bsp/am_bsp.c $VARIANTS_ROOT/$value/bsp/am_bsp.c + cp $BSP_ROOT/$value/bsp/am_bsp.h $VARIANTS_ROOT/$value/bsp/am_bsp.h +done \ No newline at end of file diff --git a/variants/SparkFun_Artemis/bsp/bsp_pins.src b/variants/SparkFun_Artemis/bsp/bsp_pins.src deleted file mode 100644 index 4edf977..0000000 --- a/variants/SparkFun_Artemis/bsp/bsp_pins.src +++ /dev/null @@ -1,635 +0,0 @@ -# ****************************************************************************** -# * -# Copyright (c) 2018 Ambiq Micro. * -# * -#******************************************************************************* -# * -# File: bsp_pins.src * -# * -# Title: SparkFun Edge2 Board Pin Definitions * -# * -# Date: 06/14/2019 * -# * -#******************************************************************************* -# * -# This file contains descriptors for the various BSP pin definitions. * -# After completing the pin descriptors, the file is processed by a * -# Python script to generate the appropriate C and header file. * -# * -# NOTEs: * -# - This file should contain NO TAB characters, only spaces. * -# - Indentation is required, but the amount of indentation is not critical, * -# only the consistency of indentation. * -# - Comment lines always begin with a '#' sign. * -# - Letter case of keywords (left side of equal) is not important. * -# Letter case of the value (right side of equal) is not important when * -# processing standard values (e.g. "lo2hi"). However, letter case is * -# maintained when used for creating defines. * -# * -# Keywords: * -# All of the following keywords should begin in column 4. * -# name The name to be used for the pin. This name will be used as a * -# base for generating defines. Each pin name must be unique. * -# desc Optional: A description, if provided, will appear in the * -# generated header file. * -# funcsel A value 0-7, or the equivalent AM_HAL_PIN_nn_xxxx macro. * -# The AM_HAL_PIN_nn_xxxx nomenclature is preferred. * -# pinnum The pin number for the pin being defined (0-49). * -# drvstrength One of: 2, 4, 8, or 12. If not provided, 2 is default. * -# GPOutcfg Typically used if the pin is being defined as GPIO (funcsel=3).* -# One of: disable, pushpull, opendrain, tristate. * -# Also acceptable is a value 0-3, or a macro. * -# GPinput Only used if the pin is being defined as GPIO (funcsel=3). * -# One of: true, false. * -# GPRdZero One of readpin, zero (or true or false). * -# intdir One of: none, lo2hi, hi2lo, either. * -# Note - does not enable any interrupt. Only configures the * -# direction for when it is enabled. * -# pullup One of: none, 1_5K, 6K, 12K, 24K, weak, pulldown. * -# 1_5K - 24K: valid on I2C pins. * -# weak: Valid for pullups on all other (non-I2C) pins. * -# pulldown: Valid for pin 20 only. * -# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_PULLUP_1_5K). * -# PowerSw One of: VDD or VSS. * -# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_POWERSW_VDD). * -# * -# The following 3 parameters are used when the pin is being defined as a * -# chip enable, i.e. for SPI or MSPI. * -# IOMnum The IOM number pertaining to the CE. 0-5 for SPI, 6 for MSPI. * -# Also acceptable is a macro (e.g. one defined in am_bsp.h). * -# CEnum A value from 0-3. * -# If a value 0-3, a macro is created of the form: * -# #define AM_BSP__CHNL * -# Also acceptable is a macro (e.g. one defined in am_bsp.h), * -# in this case no other macro is created. * -# CEpol Chip enable polarity, active low or active high. * -# One of: LOW (default) or HIGH. * -# * -# ****************************************************************************** - -# ***************************************************************************** -# COM UART pins (UART0). -# ***************************************************************************** -pin - name = COM_UART_TX - desc = This pin is the COM_UART transmit pin. - pinnum = 48 - func_sel = AM_HAL_PIN_48_UART0TX - drvstrength = 2 - -pin - name = COM_UART_RX - desc = This pin is the COM_UART receive pin. - pinnum = 49 - func_sel = AM_HAL_PIN_49_UART0RX - - -# ***************************************************************************** -# IOM0 pins. -# ***************************************************************************** -pin - name = IOM0_CS - desc = I/O Master 0 chip select. - pinnum = 11 - func_sel = AM_HAL_PIN_11_NCE11 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 0 - CEnum = 0 - CEpol = low - -pin - name = IOM0_CS3 - desc = I/O Master 0 chip select. - pinnum = 15 - func_sel = AM_HAL_PIN_15_NCE15 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 0 - CEnum = 3 - CEpol = low - -pin - name = IOM0_MISO - desc = I/O Master 0 SPI MISO signal. - pinnum = 6 - func_sel = AM_HAL_PIN_6_M0MISO - IOMnum = 0 - -pin - name = IOM0_MOSI - desc = I/O Master 0 SPI MOSI signal. - pinnum = 7 - func_sel = AM_HAL_PIN_7_M0MOSI - drvstrength = 12 - IOMnum = 0 - -pin - name = IOM0_SCK - desc = I/O Master 0 SPI SCK signal. - pinnum = 5 - func_sel = AM_HAL_PIN_5_M0SCK - drvstrength = 12 - IOMnum = 0 - -pin - name = IOM0_SCL - desc = I/O Master 0 I2C clock signal. - pinnum = 5 - func_sel = AM_HAL_PIN_5_M0SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 0 - -pin - name = IOM0_SDA - desc = I/O Master 0 I2C data signal. - pinnum = 6 - func_sel = AM_HAL_PIN_6_M0SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 0 - -# ***************************************************************************** -# IOM1 pins. -# ***************************************************************************** -pin - name = IOM1_CS - desc = I/O Master 1 chip select. - pinnum = 14 - func_sel = AM_HAL_PIN_14_NCE14 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 1 - CEnum = 2 - CEpol = low - -pin - name = IOM1_MISO - desc = I/O Master 1 SPI MISO signal. - pinnum = 9 - func_sel = AM_HAL_PIN_9_M1MISO - IOMnum = 1 - -pin - name = IOM1_MOSI - desc = I/O Master 1 SPI MOSI signal. - pinnum = 10 - func_sel = AM_HAL_PIN_10_M1MOSI - drvstrength = 12 - IOMnum = 1 - -pin - name = IOM1_SCK - desc = I/O Master 1 SPI SCK signal. - pinnum = 8 - func_sel = AM_HAL_PIN_8_M1SCK - drvstrength = 12 - IOMnum = 1 - -pin - name = IOM1_SCL - desc = I/O Master 1 I2C clock signal. - pinnum = 8 - func_sel = AM_HAL_PIN_8_M1SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 1 - -pin - name = IOM1_SDA - desc = I/O Master 1 I2C data signal. - pinnum = 9 - func_sel = AM_HAL_PIN_9_M1SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 1 - -# ***************************************************************************** -# IOM2 pins. -# ***************************************************************************** -pin - name = IOM2_CS - desc = I/O Master 2 chip select. - pinnum = 15 - func_sel = AM_HAL_PIN_15_NCE15 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 2 - CEnum = 3 - CEpol = low - -pin - name = IOM2_MISO - desc = I/O Master 2 SPI MISO signal. - pinnum = 25 - func_sel = AM_HAL_PIN_25_M2MISO - IOMnum = 2 - -pin - name = IOM2_MOSI - desc = I/O Master 2 SPI MOSI signal. - pinnum = 28 - func_sel = AM_HAL_PIN_28_M2MOSI - drvstrength = 12 - IOMnum = 2 - -pin - name = IOM2_SCK - desc = I/O Master 2 SPI SCK signal. - pinnum = 27 - func_sel = AM_HAL_PIN_27_M2SCK - drvstrength = 12 - IOMnum = 2 - -pin - name = IOM2_SCL - desc = I/O Master 2 I2C clock signal. - pinnum = 27 - func_sel = AM_HAL_PIN_27_M2SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 2 - -pin - name = IOM2_SDA - desc = I/O Master 2 I2C data signal. - pinnum = 25 - func_sel = AM_HAL_PIN_25_M2SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 2 - -# ***************************************************************************** -# IOM3 pins. -# ***************************************************************************** -pin - name = IOM3_CS - desc = I/O Master 3 chip select. - pinnum = 12 - func_sel = AM_HAL_PIN_12_NCE12 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 3 - CEnum = 0 - CEpol = low - -pin - name = IOM3_MISO - desc = I/O Master 3 SPI MISO signal. - pinnum = 43 - func_sel = AM_HAL_PIN_43_M3MISO - IOMnum = 3 - -pin - name = IOM3_MOSI - desc = I/O Master 3 SPI MOSI signal. - pinnum = 38 - func_sel = AM_HAL_PIN_38_M3MOSI - drvstrength = 12 - IOMnum = 3 - -pin - name = IOM3_SCK - desc = I/O Master 3 SPI SCK signal. - pinnum = 42 - func_sel = AM_HAL_PIN_42_M3SCK - drvstrength = 12 - IOMnum = 3 - -pin - name = IOM3_SCL - desc = I/O Master 3 I2C clock signal. - pinnum = 42 - func_sel = AM_HAL_PIN_42_M3SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 3 - -pin - name = IOM3_SDA - desc = I/O Master 3 I2C data signal. - pinnum = 43 - func_sel = AM_HAL_PIN_43_M3SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 3 - -# ***************************************************************************** -# IOM4 pins. -# ***************************************************************************** -pin - name = IOM4_CS - desc = I/O Master 4 chip select. - pinnum = 13 - func_sel = AM_HAL_PIN_13_NCE13 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 4 - CEnum = 1 - CEpol = low - -pin - name = IOM4_MISO - desc = I/O Master 4 SPI MISO signal. - pinnum = 40 - func_sel = AM_HAL_PIN_40_M4MISO - IOMnum = 4 - -pin - name = IOM4_MOSI - desc = I/O Master 4 SPI MOSI signal. - pinnum = 44 - func_sel = AM_HAL_PIN_44_M4MOSI - drvstrength = 12 - IOMnum = 4 - -pin - name = IOM4_SCK - desc = I/O Master 4 SPI SCK signal. - pinnum = 39 - func_sel = AM_HAL_PIN_39_M4SCK - drvstrength = 12 - IOMnum = 4 - -pin - name = IOM4_SCL - desc = I/O Master 4 I2C clock signal. - pinnum = 39 - func_sel = AM_HAL_PIN_39_M4SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 4 - -pin - name = IOM4_SDA - desc = I/O Master 4 I2C data signal. - pinnum = 40 - func_sel = AM_HAL_PIN_40_M4SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 4 - -# ***************************************************************************** -# IOM5 pins. -# ***************************************************************************** -pin - name = IOM5_CS - desc = I/O Master 5 chip select. - pinnum = 16 - func_sel = AM_HAL_PIN_16_NCE16 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 5 - CEnum = 0 - CEpol = low - -pin - name = IOM5_MISO - desc = I/O Master 5 SPI MISO signal. - pinnum = 49 - func_sel = AM_HAL_PIN_49_M5MISO - IOMnum = 5 - -pin - name = IOM5_MOSI - desc = I/O Master 5 SPI MOSI signal. - pinnum = 47 - func_sel = AM_HAL_PIN_47_M5MOSI - drvstrength = 12 - IOMnum = 5 - -pin - name = IOM5_SCK - desc = I/O Master 5 SPI SCK signal. - pinnum = 48 - func_sel = AM_HAL_PIN_48_M5SCK - drvstrength = 12 - IOMnum = 5 - -pin - name = IOM5_SCL - desc = I/O Master 5 I2C clock signal. - pinnum = 48 - func_sel = AM_HAL_PIN_48_M5SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 5 - -pin - name = IOM5_SDA - desc = I/O Master 5 I2C data signal. - pinnum = 49 - func_sel = AM_HAL_PIN_49_M5SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 5 - -# ***************************************************************************** -# MSPI pins. -# ***************************************************************************** -pin - name = MSPI_CE0 - desc = MSPI chip select. - pinnum = 19 - func_sel = AM_HAL_PIN_19_NCE19 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 6 - CEnum = 0 - CEpol = low - -pin - name = MSPI_CE1 - desc = MSPI chip select. - pinnum = 41 - func_sel = AM_HAL_PIN_41_NCE41 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 6 - CEnum = 1 - CEpol = low - -pin - name = MSPI_D0 - desc = MSPI data 0. - pinnum = 22 - func_sel = AM_HAL_PIN_22_MSPI0 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D1 - desc = MSPI data 1. - pinnum = 26 - func_sel = AM_HAL_PIN_26_MSPI1 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D2 - desc = MSPI data 2. - pinnum = 4 - func_sel = AM_HAL_PIN_4_MSPI2 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D3 - desc = MSPI data 3. - pinnum = 23 - func_sel = AM_HAL_PIN_23_MSPI13 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D4 - desc = MSPI data 4. - pinnum = 0 - func_sel = AM_HAL_PIN_0_MSPI4 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D5 - desc = MSPI data 5. - pinnum = 1 - func_sel = AM_HAL_PIN_1_MSPI5 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D6 - desc = MSPI data 6. - pinnum = 2 - func_sel = AM_HAL_PIN_2_MSPI6 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D7 - desc = MSPI data 7. - pinnum = 3 - func_sel = AM_HAL_PIN_3_MSPI7 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_SCK - desc = MSPI clock. - pinnum = 24 - func_sel = AM_HAL_PIN_24_MSPI8 - drvstrength = 12 - intdir = lo2hi - IOMnum = 6 - -# ***************************************************************************** -# IOS pins. -# ***************************************************************************** -pin - name = IOS_CE - desc = I/O Slave chip select. - pinnum = 3 - func_sel = AM_HAL_PIN_3_SLnCE - GPinput = true - CEnum = 0 - CEpol = low - -pin - name = IOS_MISO - desc = I/O Slave SPI MISO signal. - pinnum = 2 - func_sel = AM_HAL_PIN_2_SLMISO - drvstrength = 12 - -pin - name = IOS_MOSI - desc = I/O Slave SPI MOSI signal. - pinnum = 1 - func_sel = AM_HAL_PIN_1_SLMOSI - GPinput = true - -pin - name = IOS_SCK - desc = I/O Slave SPI SCK signal. - pinnum = 0 - func_sel = AM_HAL_PIN_0_SLSCK - GPinput = true - -pin - name = IOS_SCL - desc = I/O Slave I2C clock signal. - pinnum = 0 - func_sel = AM_HAL_PIN_0_SLSCL - GPinput = true - -pin - name = IOS_SDA - desc = I/O Slave I2C data signal. - pinnum = 1 - func_sel = AM_HAL_PIN_1_SLSDAWIR3 - GPOutcfg = opendrain - pullup = 1_5K - -# # ***************************************************************************** -# # ITM pins. -# # ***************************************************************************** -# pin -# name = ITM_SWO -# desc = ITM Serial Wire Output. -# pinnum = 41 -# func_sel = AM_HAL_PIN_41_SWO -# drvstrength = 2 - -# ***************************************************************************** -# CORE pins. -# ***************************************************************************** -pin - name = SWDCK - desc = Cortex Serial Wire DCK. - pinnum = 20 - func_sel = AM_HAL_PIN_20_SWDCK - -pin - name = SWDIO - desc = Cortex Serial Wire DIO. - pinnum = 21 - func_sel = AM_HAL_PIN_21_SWDIO diff --git a/variants/SparkFun_Artemis/bsp/gcc/Makefile b/variants/SparkFun_Artemis/bsp/gcc/Makefile deleted file mode 100644 index fd0f93b..0000000 --- a/variants/SparkFun_Artemis/bsp/gcc/Makefile +++ /dev/null @@ -1,153 +0,0 @@ -#****************************************************************************** -# -# Makefile - Rules for building the libraries, examples and docs. -# -# Copyright (c) 2019, Ambiq Micro -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions are met: -# -# 1. Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# -# 3. Neither the name of the copyright holder nor the names of its -# contributors may be used to endorse or promote products derived from this -# software without specific prior written permission. -# -# Third party software included in this distribution is subject to the -# additional license terms as defined in the /docs/licenses directory. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. -# -# This is part of revision 2.1.0 of the AmbiqSuite Development Package. -# -#****************************************************************************** - -# Pull in exported paths -SDKPATH?=../../../.. -BOARDPATH?=../.. - -TARGET := libam_bsp -COMPILERNAME := gcc -PROJECT := libam_bsp_gcc -CONFIG := bin - -SHELL:=/bin/bash -#### Setup #### - -TOOLCHAIN ?= arm-none-eabi -PART = apollo3 -CPU = cortex-m4 -FPU = fpv4-sp-d16 -# Default to FPU hardware calling convention. However, some customers and/or -# applications may need the software calling convention. -#FABI = softfp -FABI = hard - -#### Required Executables #### -CC = $(TOOLCHAIN)-gcc -GCC = $(TOOLCHAIN)-gcc -CPP = $(TOOLCHAIN)-cpp -LD = $(TOOLCHAIN)-ld -CP = $(TOOLCHAIN)-objcopy -OD = $(TOOLCHAIN)-objdump -RD = $(TOOLCHAIN)-readelf -AR = $(TOOLCHAIN)-ar -SIZE = $(TOOLCHAIN)-size -RM = $(shell which rm 2>/dev/null) - -EXECUTABLES = CC LD CP OD AR RD SIZE GCC -K := $(foreach exec,$(EXECUTABLES),\ - $(if $(shell which $($(exec)) 2>/dev/null),,\ - $(info $(exec) not found on PATH ($($(exec))).)$(exec))) -$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found)) - -ifneq ($(strip $(value K)),) -all clean: - $(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.) - $(RM) -rf bin -else - -DEFINES = -DAM_PACKAGE_BGA -DEFINES+= -DAM_PART_APOLLO3 - -INCLUDES = -I$(SDKPATH)/utils -INCLUDES+= -I$(SDKPATH)/CMSIS/AmbiqMicro/Include -INCLUDES+= -I$(SDKPATH)/devices -INCLUDES+= -I$(SDKPATH)/mcu/apollo3 -INCLUDES+= -I$(SDKPATH)/CMSIS/ARM/Include - -VPATH = .. - -SRC = am_bsp.c -SRC += am_bsp_pins.c - -CSRC = $(filter %.c,$(SRC)) -ASRC = $(filter %.s,$(SRC)) - -OBJS = $(CSRC:%.c=$(CONFIG)/%.o) -OBJS+= $(ASRC:%.s=$(CONFIG)/%.o) - -DEPS = $(CSRC:%.c=$(CONFIG)/%.d) -DEPS+= $(ASRC:%.s=$(CONFIG)/%.d) - -CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI) -CFLAGS+= -ffunction-sections -fdata-sections -CFLAGS+= -MMD -MP -std=c99 -Wall -# Libraries O3 for production, examples O0 for debug. -CFLAGS+= -O3 -CFLAGS+= $(DEFINES) -CFLAGS+= $(INCLUDES) -CFLAGS+= - -# Additional user specified CFLAGS -CFLAGS+=$(EXTRA_CFLAGS) - -ODFLAGS = -S - -#### Rules #### -all: directories $(CONFIG)/$(TARGET).a - -directories: $(CONFIG) - -$(CONFIG): - @mkdir -p $@ - -$(CONFIG)/%.o: %.c $(CONFIG)/%.d $(INCS) - @echo " Compiling $(COMPILERNAME) $<" ;\ - $(CC) -c $(CFLAGS) $< -o $@ - -$(CONFIG)/%.o: %.s $(CONFIG)/%.d $(INCS) - @echo " Assembling $(COMPILERNAME) $<" ;\ - $(CC) -c $(CFLAGS) $< -o $@ - -$(CONFIG)/$(TARGET).a: $(OBJS) - @echo " Library $(COMPILERNAME) $@" ;\ - $(AR) rsvc $@ $(OBJS) - -clean: - @echo "Cleaning..." ;\ - $(RM) -f $(OBJS) $(DEPS) \ - $(CONFIG)/$(TARGET).a - -$(CONFIG)/%.d: ; - -# Automatically include any generated dependencies --include $(DEPS) -endif -.PHONY: all clean directories diff --git a/variants/SparkFun_Artemis/bsp/gcc/bin/libam_bsp.a b/variants/SparkFun_Artemis/bsp/gcc/bin/libam_bsp.a deleted file mode 100644 index 9b6205c..0000000 Binary files a/variants/SparkFun_Artemis/bsp/gcc/bin/libam_bsp.a and /dev/null differ diff --git a/variants/SparkFun_Artemis_Thing_Plus/bsp/bsp_pins.src b/variants/SparkFun_Artemis_Thing_Plus/bsp/bsp_pins.src deleted file mode 100644 index c4ec06d..0000000 --- a/variants/SparkFun_Artemis_Thing_Plus/bsp/bsp_pins.src +++ /dev/null @@ -1,662 +0,0 @@ -# ****************************************************************************** -# * -# Copyright (c) 2018 Ambiq Micro. * -# * -#******************************************************************************* -# * -# File: bsp_pins.src * -# * -# Title: SparkFun Edge2 Board Pin Definitions * -# * -# Date: 06/14/2019 * -# * -#******************************************************************************* -# * -# This file contains descriptors for the various BSP pin definitions. * -# After completing the pin descriptors, the file is processed by a * -# Python script to generate the appropriate C and header file. * -# * -# NOTEs: * -# - This file should contain NO TAB characters, only spaces. * -# - Indentation is required, but the amount of indentation is not critical, * -# only the consistency of indentation. * -# - Comment lines always begin with a '#' sign. * -# - Letter case of keywords (left side of equal) is not important. * -# Letter case of the value (right side of equal) is not important when * -# processing standard values (e.g. "lo2hi"). However, letter case is * -# maintained when used for creating defines. * -# * -# Keywords: * -# All of the following keywords should begin in column 4. * -# name The name to be used for the pin. This name will be used as a * -# base for generating defines. Each pin name must be unique. * -# desc Optional: A description, if provided, will appear in the * -# generated header file. * -# funcsel A value 0-7, or the equivalent AM_HAL_PIN_nn_xxxx macro. * -# The AM_HAL_PIN_nn_xxxx nomenclature is preferred. * -# pinnum The pin number for the pin being defined (0-49). * -# drvstrength One of: 2, 4, 8, or 12. If not provided, 2 is default. * -# GPOutcfg Typically used if the pin is being defined as GPIO (funcsel=3).* -# One of: disable, pushpull, opendrain, tristate. * -# Also acceptable is a value 0-3, or a macro. * -# GPinput Only used if the pin is being defined as GPIO (funcsel=3). * -# One of: true, false. * -# GPRdZero One of readpin, zero (or true or false). * -# intdir One of: none, lo2hi, hi2lo, either. * -# Note - does not enable any interrupt. Only configures the * -# direction for when it is enabled. * -# pullup One of: none, 1_5K, 6K, 12K, 24K, weak, pulldown. * -# 1_5K - 24K: valid on I2C pins. * -# weak: Valid for pullups on all other (non-I2C) pins. * -# pulldown: Valid for pin 20 only. * -# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_PULLUP_1_5K). * -# PowerSw One of: VDD or VSS. * -# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_POWERSW_VDD). * -# * -# The following 3 parameters are used when the pin is being defined as a * -# chip enable, i.e. for SPI or MSPI. * -# IOMnum The IOM number pertaining to the CE. 0-5 for SPI, 6 for MSPI. * -# Also acceptable is a macro (e.g. one defined in am_bsp.h). * -# CEnum A value from 0-3. * -# If a value 0-3, a macro is created of the form: * -# #define AM_BSP__CHNL * -# Also acceptable is a macro (e.g. one defined in am_bsp.h), * -# in this case no other macro is created. * -# CEpol Chip enable polarity, active low or active high. * -# One of: LOW (default) or HIGH. * -# * -# ****************************************************************************** - -# ***************************************************************************** -# PDM Microphone Lines -# ***************************************************************************** -pin - name = MIC_DATA - desc = Data line for PDM microphones - pinnum = 36 - func_sel = AM_HAL_PIN_36_PDMDATA - -pin - name = MIC_CLK - desc = Clock line for PDM microphones - pinnum = 37 - func_sel = AM_HAL_PIN_37_PDMCLK - - -# ***************************************************************************** -# LEDs and buttons -# ***************************************************************************** -pin - name = LED_BLUE - desc = The BLUE LED - pinnum = 26 - func_sel = AM_HAL_PIN_26_GPIO - drvstrength = 12 - - -# ***************************************************************************** -# COM UART pins (UART0). -# ***************************************************************************** -pin - name = COM_UART_TX - desc = This pin is the COM_UART transmit pin. - pinnum = 48 - func_sel = AM_HAL_PIN_48_UART0TX - drvstrength = 2 - -pin - name = COM_UART_RX - desc = This pin is the COM_UART receive pin. - pinnum = 49 - func_sel = AM_HAL_PIN_49_UART0RX - - -# ***************************************************************************** -# IOM0 pins. -# ***************************************************************************** -pin - name = IOM0_CS - desc = I/O Master 0 chip select. - pinnum = 11 - func_sel = AM_HAL_PIN_11_NCE11 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 0 - CEnum = 0 - CEpol = low - -pin - name = IOM0_CS3 - desc = I/O Master 0 chip select. - pinnum = 15 - func_sel = AM_HAL_PIN_15_NCE15 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 0 - CEnum = 3 - CEpol = low - -pin - name = IOM0_MISO - desc = I/O Master 0 SPI MISO signal. - pinnum = 6 - func_sel = AM_HAL_PIN_6_M0MISO - IOMnum = 0 - -pin - name = IOM0_MOSI - desc = I/O Master 0 SPI MOSI signal. - pinnum = 7 - func_sel = AM_HAL_PIN_7_M0MOSI - drvstrength = 12 - IOMnum = 0 - -pin - name = IOM0_SCK - desc = I/O Master 0 SPI SCK signal. - pinnum = 5 - func_sel = AM_HAL_PIN_5_M0SCK - drvstrength = 12 - IOMnum = 0 - -pin - name = IOM0_SCL - desc = I/O Master 0 I2C clock signal. - pinnum = 5 - func_sel = AM_HAL_PIN_5_M0SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 0 - -pin - name = IOM0_SDA - desc = I/O Master 0 I2C data signal. - pinnum = 6 - func_sel = AM_HAL_PIN_6_M0SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 0 - -# ***************************************************************************** -# IOM1 pins. -# ***************************************************************************** -pin - name = IOM1_CS - desc = I/O Master 1 chip select. - pinnum = 14 - func_sel = AM_HAL_PIN_14_NCE14 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 1 - CEnum = 2 - CEpol = low - -pin - name = IOM1_MISO - desc = I/O Master 1 SPI MISO signal. - pinnum = 9 - func_sel = AM_HAL_PIN_9_M1MISO - IOMnum = 1 - -pin - name = IOM1_MOSI - desc = I/O Master 1 SPI MOSI signal. - pinnum = 10 - func_sel = AM_HAL_PIN_10_M1MOSI - drvstrength = 12 - IOMnum = 1 - -pin - name = IOM1_SCK - desc = I/O Master 1 SPI SCK signal. - pinnum = 8 - func_sel = AM_HAL_PIN_8_M1SCK - drvstrength = 12 - IOMnum = 1 - -pin - name = IOM1_SCL - desc = I/O Master 1 I2C clock signal. - pinnum = 8 - func_sel = AM_HAL_PIN_8_M1SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 1 - -pin - name = IOM1_SDA - desc = I/O Master 1 I2C data signal. - pinnum = 9 - func_sel = AM_HAL_PIN_9_M1SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 1 - -# ***************************************************************************** -# IOM2 pins. -# ***************************************************************************** -pin - name = IOM2_CS - desc = I/O Master 2 chip select. - pinnum = 15 - func_sel = AM_HAL_PIN_15_NCE15 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 2 - CEnum = 3 - CEpol = low - -pin - name = IOM2_MISO - desc = I/O Master 2 SPI MISO signal. - pinnum = 25 - func_sel = AM_HAL_PIN_25_M2MISO - IOMnum = 2 - -pin - name = IOM2_MOSI - desc = I/O Master 2 SPI MOSI signal. - pinnum = 28 - func_sel = AM_HAL_PIN_28_M2MOSI - drvstrength = 12 - IOMnum = 2 - -pin - name = IOM2_SCK - desc = I/O Master 2 SPI SCK signal. - pinnum = 27 - func_sel = AM_HAL_PIN_27_M2SCK - drvstrength = 12 - IOMnum = 2 - -pin - name = IOM2_SCL - desc = I/O Master 2 I2C clock signal. - pinnum = 27 - func_sel = AM_HAL_PIN_27_M2SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 2 - -pin - name = IOM2_SDA - desc = I/O Master 2 I2C data signal. - pinnum = 25 - func_sel = AM_HAL_PIN_25_M2SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 2 - -# ***************************************************************************** -# IOM3 pins. -# ***************************************************************************** -pin - name = IOM3_CS - desc = I/O Master 3 chip select. - pinnum = 12 - func_sel = AM_HAL_PIN_12_NCE12 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 3 - CEnum = 0 - CEpol = low - -pin - name = IOM3_MISO - desc = I/O Master 3 SPI MISO signal. - pinnum = 43 - func_sel = AM_HAL_PIN_43_M3MISO - IOMnum = 3 - -pin - name = IOM3_MOSI - desc = I/O Master 3 SPI MOSI signal. - pinnum = 38 - func_sel = AM_HAL_PIN_38_M3MOSI - drvstrength = 12 - IOMnum = 3 - -pin - name = IOM3_SCK - desc = I/O Master 3 SPI SCK signal. - pinnum = 42 - func_sel = AM_HAL_PIN_42_M3SCK - drvstrength = 12 - IOMnum = 3 - -pin - name = IOM3_SCL - desc = I/O Master 3 I2C clock signal. - pinnum = 42 - func_sel = AM_HAL_PIN_42_M3SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 3 - -pin - name = IOM3_SDA - desc = I/O Master 3 I2C data signal. - pinnum = 43 - func_sel = AM_HAL_PIN_43_M3SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 3 - -# ***************************************************************************** -# IOM4 pins. -# ***************************************************************************** -pin - name = IOM4_CS - desc = I/O Master 4 chip select. - pinnum = 13 - func_sel = AM_HAL_PIN_13_NCE13 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 4 - CEnum = 1 - CEpol = low - -pin - name = IOM4_MISO - desc = I/O Master 4 SPI MISO signal. - pinnum = 40 - func_sel = AM_HAL_PIN_40_M4MISO - IOMnum = 4 - -pin - name = IOM4_MOSI - desc = I/O Master 4 SPI MOSI signal. - pinnum = 44 - func_sel = AM_HAL_PIN_44_M4MOSI - drvstrength = 12 - IOMnum = 4 - -pin - name = IOM4_SCK - desc = I/O Master 4 SPI SCK signal. - pinnum = 39 - func_sel = AM_HAL_PIN_39_M4SCK - drvstrength = 12 - IOMnum = 4 - -pin - name = IOM4_SCL - desc = I/O Master 4 I2C clock signal. - pinnum = 39 - func_sel = AM_HAL_PIN_39_M4SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 4 - -pin - name = IOM4_SDA - desc = I/O Master 4 I2C data signal. - pinnum = 40 - func_sel = AM_HAL_PIN_40_M4SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 4 - -# ***************************************************************************** -# IOM5 pins. -# ***************************************************************************** -pin - name = IOM5_CS - desc = I/O Master 5 chip select. - pinnum = 16 - func_sel = AM_HAL_PIN_16_NCE16 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 5 - CEnum = 0 - CEpol = low - -pin - name = IOM5_MISO - desc = I/O Master 5 SPI MISO signal. - pinnum = 49 - func_sel = AM_HAL_PIN_49_M5MISO - IOMnum = 5 - -pin - name = IOM5_MOSI - desc = I/O Master 5 SPI MOSI signal. - pinnum = 47 - func_sel = AM_HAL_PIN_47_M5MOSI - drvstrength = 12 - IOMnum = 5 - -pin - name = IOM5_SCK - desc = I/O Master 5 SPI SCK signal. - pinnum = 48 - func_sel = AM_HAL_PIN_48_M5SCK - drvstrength = 12 - IOMnum = 5 - -pin - name = IOM5_SCL - desc = I/O Master 5 I2C clock signal. - pinnum = 48 - func_sel = AM_HAL_PIN_48_M5SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 5 - -pin - name = IOM5_SDA - desc = I/O Master 5 I2C data signal. - pinnum = 49 - func_sel = AM_HAL_PIN_49_M5SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 5 - -# ***************************************************************************** -# MSPI pins. -# ***************************************************************************** -pin - name = MSPI_CE0 - desc = MSPI chip select. - pinnum = 19 - func_sel = AM_HAL_PIN_19_NCE19 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 6 - CEnum = 0 - CEpol = low - -pin - name = MSPI_CE1 - desc = MSPI chip select. - pinnum = 41 - func_sel = AM_HAL_PIN_41_NCE41 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 6 - CEnum = 1 - CEpol = low - -pin - name = MSPI_D0 - desc = MSPI data 0. - pinnum = 22 - func_sel = AM_HAL_PIN_22_MSPI0 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D1 - desc = MSPI data 1. - pinnum = 26 - func_sel = AM_HAL_PIN_26_MSPI1 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D2 - desc = MSPI data 2. - pinnum = 4 - func_sel = AM_HAL_PIN_4_MSPI2 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D3 - desc = MSPI data 3. - pinnum = 23 - func_sel = AM_HAL_PIN_23_MSPI13 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D4 - desc = MSPI data 4. - pinnum = 0 - func_sel = AM_HAL_PIN_0_MSPI4 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D5 - desc = MSPI data 5. - pinnum = 1 - func_sel = AM_HAL_PIN_1_MSPI5 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D6 - desc = MSPI data 6. - pinnum = 2 - func_sel = AM_HAL_PIN_2_MSPI6 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D7 - desc = MSPI data 7. - pinnum = 3 - func_sel = AM_HAL_PIN_3_MSPI7 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_SCK - desc = MSPI clock. - pinnum = 24 - func_sel = AM_HAL_PIN_24_MSPI8 - drvstrength = 12 - intdir = lo2hi - IOMnum = 6 - -# ***************************************************************************** -# IOS pins. -# ***************************************************************************** -pin - name = IOS_CE - desc = I/O Slave chip select. - pinnum = 3 - func_sel = AM_HAL_PIN_3_SLnCE - GPinput = true - CEnum = 0 - CEpol = low - -pin - name = IOS_MISO - desc = I/O Slave SPI MISO signal. - pinnum = 2 - func_sel = AM_HAL_PIN_2_SLMISO - drvstrength = 12 - -pin - name = IOS_MOSI - desc = I/O Slave SPI MOSI signal. - pinnum = 1 - func_sel = AM_HAL_PIN_1_SLMOSI - GPinput = true - -pin - name = IOS_SCK - desc = I/O Slave SPI SCK signal. - pinnum = 0 - func_sel = AM_HAL_PIN_0_SLSCK - GPinput = true - -pin - name = IOS_SCL - desc = I/O Slave I2C clock signal. - pinnum = 0 - func_sel = AM_HAL_PIN_0_SLSCL - GPinput = true - -pin - name = IOS_SDA - desc = I/O Slave I2C data signal. - pinnum = 1 - func_sel = AM_HAL_PIN_1_SLSDAWIR3 - GPOutcfg = opendrain - pullup = 1_5K - -# # ***************************************************************************** -# # ITM pins. -# # ***************************************************************************** -# pin -# name = ITM_SWO -# desc = ITM Serial Wire Output. -# pinnum = 41 -# func_sel = AM_HAL_PIN_41_SWO -# drvstrength = 2 - -# ***************************************************************************** -# CORE pins. -# ***************************************************************************** -pin - name = SWDCK - desc = Cortex Serial Wire DCK. - pinnum = 20 - func_sel = AM_HAL_PIN_20_SWDCK - -pin - name = SWDIO - desc = Cortex Serial Wire DIO. - pinnum = 21 - func_sel = AM_HAL_PIN_21_SWDIO diff --git a/variants/SparkFun_Artemis_Thing_Plus/bsp/gcc/Makefile b/variants/SparkFun_Artemis_Thing_Plus/bsp/gcc/Makefile deleted file mode 100644 index fd0f93b..0000000 --- a/variants/SparkFun_Artemis_Thing_Plus/bsp/gcc/Makefile +++ /dev/null @@ -1,153 +0,0 @@ -#****************************************************************************** -# -# Makefile - Rules for building the libraries, examples and docs. -# -# Copyright (c) 2019, Ambiq Micro -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions are met: -# -# 1. Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# -# 3. Neither the name of the copyright holder nor the names of its -# contributors may be used to endorse or promote products derived from this -# software without specific prior written permission. -# -# Third party software included in this distribution is subject to the -# additional license terms as defined in the /docs/licenses directory. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. -# -# This is part of revision 2.1.0 of the AmbiqSuite Development Package. -# -#****************************************************************************** - -# Pull in exported paths -SDKPATH?=../../../.. -BOARDPATH?=../.. - -TARGET := libam_bsp -COMPILERNAME := gcc -PROJECT := libam_bsp_gcc -CONFIG := bin - -SHELL:=/bin/bash -#### Setup #### - -TOOLCHAIN ?= arm-none-eabi -PART = apollo3 -CPU = cortex-m4 -FPU = fpv4-sp-d16 -# Default to FPU hardware calling convention. However, some customers and/or -# applications may need the software calling convention. -#FABI = softfp -FABI = hard - -#### Required Executables #### -CC = $(TOOLCHAIN)-gcc -GCC = $(TOOLCHAIN)-gcc -CPP = $(TOOLCHAIN)-cpp -LD = $(TOOLCHAIN)-ld -CP = $(TOOLCHAIN)-objcopy -OD = $(TOOLCHAIN)-objdump -RD = $(TOOLCHAIN)-readelf -AR = $(TOOLCHAIN)-ar -SIZE = $(TOOLCHAIN)-size -RM = $(shell which rm 2>/dev/null) - -EXECUTABLES = CC LD CP OD AR RD SIZE GCC -K := $(foreach exec,$(EXECUTABLES),\ - $(if $(shell which $($(exec)) 2>/dev/null),,\ - $(info $(exec) not found on PATH ($($(exec))).)$(exec))) -$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found)) - -ifneq ($(strip $(value K)),) -all clean: - $(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.) - $(RM) -rf bin -else - -DEFINES = -DAM_PACKAGE_BGA -DEFINES+= -DAM_PART_APOLLO3 - -INCLUDES = -I$(SDKPATH)/utils -INCLUDES+= -I$(SDKPATH)/CMSIS/AmbiqMicro/Include -INCLUDES+= -I$(SDKPATH)/devices -INCLUDES+= -I$(SDKPATH)/mcu/apollo3 -INCLUDES+= -I$(SDKPATH)/CMSIS/ARM/Include - -VPATH = .. - -SRC = am_bsp.c -SRC += am_bsp_pins.c - -CSRC = $(filter %.c,$(SRC)) -ASRC = $(filter %.s,$(SRC)) - -OBJS = $(CSRC:%.c=$(CONFIG)/%.o) -OBJS+= $(ASRC:%.s=$(CONFIG)/%.o) - -DEPS = $(CSRC:%.c=$(CONFIG)/%.d) -DEPS+= $(ASRC:%.s=$(CONFIG)/%.d) - -CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI) -CFLAGS+= -ffunction-sections -fdata-sections -CFLAGS+= -MMD -MP -std=c99 -Wall -# Libraries O3 for production, examples O0 for debug. -CFLAGS+= -O3 -CFLAGS+= $(DEFINES) -CFLAGS+= $(INCLUDES) -CFLAGS+= - -# Additional user specified CFLAGS -CFLAGS+=$(EXTRA_CFLAGS) - -ODFLAGS = -S - -#### Rules #### -all: directories $(CONFIG)/$(TARGET).a - -directories: $(CONFIG) - -$(CONFIG): - @mkdir -p $@ - -$(CONFIG)/%.o: %.c $(CONFIG)/%.d $(INCS) - @echo " Compiling $(COMPILERNAME) $<" ;\ - $(CC) -c $(CFLAGS) $< -o $@ - -$(CONFIG)/%.o: %.s $(CONFIG)/%.d $(INCS) - @echo " Assembling $(COMPILERNAME) $<" ;\ - $(CC) -c $(CFLAGS) $< -o $@ - -$(CONFIG)/$(TARGET).a: $(OBJS) - @echo " Library $(COMPILERNAME) $@" ;\ - $(AR) rsvc $@ $(OBJS) - -clean: - @echo "Cleaning..." ;\ - $(RM) -f $(OBJS) $(DEPS) \ - $(CONFIG)/$(TARGET).a - -$(CONFIG)/%.d: ; - -# Automatically include any generated dependencies --include $(DEPS) -endif -.PHONY: all clean directories diff --git a/variants/SparkFun_Artemis_Thing_Plus/bsp/gcc/bin/libam_bsp.a b/variants/SparkFun_Artemis_Thing_Plus/bsp/gcc/bin/libam_bsp.a deleted file mode 100644 index d2ddd28..0000000 Binary files a/variants/SparkFun_Artemis_Thing_Plus/bsp/gcc/bin/libam_bsp.a and /dev/null differ diff --git a/variants/SparkFun_Edge/bsp/bsp_pins.src b/variants/SparkFun_Edge/bsp/bsp_pins.src deleted file mode 100644 index 41f9c03..0000000 --- a/variants/SparkFun_Edge/bsp/bsp_pins.src +++ /dev/null @@ -1,801 +0,0 @@ -# ****************************************************************************** -# * -# Copyright (c) 2018 Ambiq Micro. * -# * -#******************************************************************************* -# * -# File: bsp_pins.src * -# * -# Title: SparkFun Edge Board Pin Definitions * -# * -# Date: 06/14/2019 * -# * -#******************************************************************************* -# * -# This file contains descriptors for the various BSP pin definitions. * -# After completing the pin descriptors, the file is processed by a * -# Python script to generate the appropriate C and header file. * -# * -# NOTEs: * -# - This file should contain NO TAB characters, only spaces. * -# - Indentation is required, but the amount of indentation is not critical, * -# only the consistency of indentation. * -# - Comment lines always begin with a '#' sign. * -# - Letter case of keywords (left side of equal) is not important. * -# Letter case of the value (right side of equal) is not important when * -# processing standard values (e.g. "lo2hi"). However, letter case is * -# maintained when used for creating defines. * -# * -# Keywords: * -# All of the following keywords should begin in column 4. * -# name The name to be used for the pin. This name will be used as a * -# base for generating defines. Each pin name must be unique. * -# desc Optional: A description, if provided, will appear in the * -# generated header file. * -# funcsel A value 0-7, or the equivalent AM_HAL_PIN_nn_xxxx macro. * -# The AM_HAL_PIN_nn_xxxx nomenclature is preferred. * -# pinnum The pin number for the pin being defined (0-49). * -# drvstrength One of: 2, 4, 8, or 12. If not provided, 2 is default. * -# GPOutcfg Typically used if the pin is being defined as GPIO (funcsel=3).* -# One of: disable, pushpull, opendrain, tristate. * -# Also acceptable is a value 0-3, or a macro. * -# GPinput Only used if the pin is being defined as GPIO (funcsel=3). * -# One of: true, false. * -# GPRdZero One of readpin, zero (or true or false). * -# intdir One of: none, lo2hi, hi2lo, either. * -# Note - does not enable any interrupt. Only configures the * -# direction for when it is enabled. * -# pullup One of: none, 1_5K, 6K, 12K, 24K, weak, pulldown. * -# 1_5K - 24K: valid on I2C pins. * -# weak: Valid for pullups on all other (non-I2C) pins. * -# pulldown: Valid for pin 20 only. * -# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_PULLUP_1_5K). * -# PowerSw One of: VDD or VSS. * -# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_POWERSW_VDD). * -# * -# The following 3 parameters are used when the pin is being defined as a * -# chip enable, i.e. for SPI or MSPI. * -# IOMnum The IOM number pertaining to the CE. 0-5 for SPI, 6 for MSPI. * -# Also acceptable is a macro (e.g. one defined in am_bsp.h). * -# CEnum A value from 0-3. * -# If a value 0-3, a macro is created of the form: * -# #define AM_BSP__CHNL * -# Also acceptable is a macro (e.g. one defined in am_bsp.h), * -# in this case no other macro is created. * -# CEpol Chip enable polarity, active low or active high. * -# One of: LOW (default) or HIGH. * -# * -# ****************************************************************************** - - -# ***************************************************************************** -# Camera Pins -# ***************************************************************************** -pin - name = CAMERA_HM01B0_D0 - pinnum = 24 - func_sel = AM_HAL_PIN_24_GPIO - drvstrength = 2 - GPinput = true - -pin - name = CAMERA_HM01B0_D1 - pinnum = 25 - func_sel = AM_HAL_PIN_25_GPIO - drvstrength = 2 - GPinput = true - -pin - name = CAMERA_HM01B0_D2 - pinnum = 26 - func_sel = AM_HAL_PIN_26_GPIO - drvstrength = 2 - GPinput = true - -pin - name = CAMERA_HM01B0_D3 - pinnum = 27 - func_sel = AM_HAL_PIN_27_GPIO - drvstrength = 2 - GPinput = true - -pin - name = CAMERA_HM01B0_D4 - pinnum = 28 - func_sel = AM_HAL_PIN_28_GPIO - drvstrength = 2 - GPinput = true - -pin - name = CAMERA_HM01B0_D5 - pinnum = 5 - func_sel = AM_HAL_PIN_5_GPIO - drvstrength = 2 - GPinput = true - -pin - name = CAMERA_HM01B0_D6 - pinnum = 6 - func_sel = AM_HAL_PIN_6_GPIO - drvstrength = 2 - GPinput = true - -pin - name = CAMERA_HM01B0_D7 - pinnum = 7 - func_sel = AM_HAL_PIN_7_GPIO - drvstrength = 2 - GPinput = true - -# pin -# name = CAMERA_HM01B0_MCLCK -# pinnum = -# func_sel = -# # this pin needs only the pad # to be defined b/c it is configured by "am_hal_ctimer_output_configure" - -pin - name = CAMERA_HM01B0_VSYNC - desc = Also called FVLD on the HM01B0 module - pinnum = 15 - func_sel = AM_HAL_PIN_15_GPIO - drvstrength = 2 - GPinput = true - -pin - name = CAMERA_HM01B0_HSYNC - desc = Also called LVLD on the HM01B0 module - pinnum = 22 - func_sel = AM_HAL_PIN_22_GPIO - drvstrength = 2 - GPinput = true - -pin - name = CAMERA_HM01B0_PCLK - pinnum = 23 - func_sel = AM_HAL_PIN_23_GPIO - drvstrength = 2 - GPinput = true - -pin - name = CAMERA_HM01B0_TRIG - pinnum = 12 - func_sel = AM_HAL_PIN_12_GPIO - drvstrength = 2 - GPinput = true - -pin - name = CAMERA_HM01B0_INT - pinnum = 4 - func_sel = AM_HAL_PIN_4_GPIO - drvstrength = 2 - GPinput = true - # todo: add interrupt capability for this pin according to polarity of HM01B0 module - -pin - name = CAMERA_HM01B0_DVDDEN - pinnum = 10 - func_sel = AM_HAL_PIN_10_GPIO - drvstrength = 2 - - -# ***************************************************************************** -# Analog Microphones -# ***************************************************************************** -pin - name = MIC0 - desc = Analog microphone near camera connector - pinnum = 11 - func_sel = AM_HAL_PIN_11_ADCSE2 - -pin - name = MIC1 - desc = Analog microphone near LEDs - pinnum = 29 - func_sel = AM_HAL_PIN_29_ADCSE1 - -# ***************************************************************************** -# LEDs and buttons -# ***************************************************************************** -pin - name = BUTTON14 - desc = Labeled 14 on the SparkFun Edge - pinnum = 14 - func_sel = AM_HAL_PIN_14_GPIO - drvstrength = 2 - GPinput = true - -pin - name = LED_RED - desc = The RED LED labelled 46 - pinnum = 46 - func_sel = AM_HAL_PIN_46_GPIO - drvstrength = 12 - -pin - name = LED_BLUE - desc = The BLUE LED labelled 37 - pinnum = 37 - func_sel = AM_HAL_PIN_37_GPIO - drvstrength = 12 - -pin - name = LED_GREEN - pinnum = 44 - desc = The GREEN LED labelled 44 - func_sel = AM_HAL_PIN_44_GPIO - drvstrength = 12 - -pin - name = LED_YELLOW - desc = The YELLOW LED labelled 47 - pinnum = 47 - func_sel = AM_HAL_PIN_47_GPIO - drvstrength = 12 - - -# ***************************************************************************** -# COM UART pins (UART0). -# ***************************************************************************** -pin - name = COM_UART_TX - desc = This pin is the COM_UART transmit pin. - pinnum = 48 - func_sel = AM_HAL_PIN_48_UART0TX - drvstrength = 2 - -pin - name = COM_UART_RX - desc = This pin is the COM_UART receive pin. - pinnum = 49 - func_sel = AM_HAL_PIN_49_UART0RX - - -# ***************************************************************************** -# IOM0 pins. -# ***************************************************************************** -pin - name = IOM0_CS - desc = I/O Master 0 chip select. - pinnum = 11 - func_sel = AM_HAL_PIN_11_NCE11 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 0 - CEnum = 0 - CEpol = low - -pin - name = IOM0_CS3 - desc = I/O Master 0 chip select. - pinnum = 15 - func_sel = AM_HAL_PIN_15_NCE15 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 0 - CEnum = 3 - CEpol = low - -pin - name = IOM0_MISO - desc = I/O Master 0 SPI MISO signal. - pinnum = 6 - func_sel = AM_HAL_PIN_6_M0MISO - IOMnum = 0 - -pin - name = IOM0_MOSI - desc = I/O Master 0 SPI MOSI signal. - pinnum = 7 - func_sel = AM_HAL_PIN_7_M0MOSI - drvstrength = 12 - IOMnum = 0 - -pin - name = IOM0_SCK - desc = I/O Master 0 SPI SCK signal. - pinnum = 5 - func_sel = AM_HAL_PIN_5_M0SCK - drvstrength = 12 - IOMnum = 0 - -pin - name = IOM0_SCL - desc = I/O Master 0 I2C clock signal. - pinnum = 5 - func_sel = AM_HAL_PIN_5_M0SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 0 - -pin - name = IOM0_SDA - desc = I/O Master 0 I2C data signal. - pinnum = 6 - func_sel = AM_HAL_PIN_6_M0SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 0 - -# ***************************************************************************** -# IOM1 pins. -# ***************************************************************************** -pin - name = IOM1_CS - desc = I/O Master 1 chip select. - pinnum = 14 - func_sel = AM_HAL_PIN_14_NCE14 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 1 - CEnum = 2 - CEpol = low - -pin - name = IOM1_MISO - desc = I/O Master 1 SPI MISO signal. - pinnum = 9 - func_sel = AM_HAL_PIN_9_M1MISO - IOMnum = 1 - -pin - name = IOM1_MOSI - desc = I/O Master 1 SPI MOSI signal. - pinnum = 10 - func_sel = AM_HAL_PIN_10_M1MOSI - drvstrength = 12 - IOMnum = 1 - -pin - name = IOM1_SCK - desc = I/O Master 1 SPI SCK signal. - pinnum = 8 - func_sel = AM_HAL_PIN_8_M1SCK - drvstrength = 12 - IOMnum = 1 - -pin - name = IOM1_SCL - desc = I/O Master 1 I2C clock signal. - pinnum = 8 - func_sel = AM_HAL_PIN_8_M1SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 1 - -pin - name = IOM1_SDA - desc = I/O Master 1 I2C data signal. - pinnum = 9 - func_sel = AM_HAL_PIN_9_M1SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 1 - -# ***************************************************************************** -# IOM2 pins. -# ***************************************************************************** -pin - name = IOM2_CS - desc = I/O Master 2 chip select. - pinnum = 15 - func_sel = AM_HAL_PIN_15_NCE15 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 2 - CEnum = 3 - CEpol = low - -pin - name = IOM2_MISO - desc = I/O Master 2 SPI MISO signal. - pinnum = 25 - func_sel = AM_HAL_PIN_25_M2MISO - IOMnum = 2 - -pin - name = IOM2_MOSI - desc = I/O Master 2 SPI MOSI signal. - pinnum = 28 - func_sel = AM_HAL_PIN_28_M2MOSI - drvstrength = 12 - IOMnum = 2 - -pin - name = IOM2_SCK - desc = I/O Master 2 SPI SCK signal. - pinnum = 27 - func_sel = AM_HAL_PIN_27_M2SCK - drvstrength = 12 - IOMnum = 2 - -pin - name = IOM2_SCL - desc = I/O Master 2 I2C clock signal. - pinnum = 27 - func_sel = AM_HAL_PIN_27_M2SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 2 - -pin - name = IOM2_SDA - desc = I/O Master 2 I2C data signal. - pinnum = 25 - func_sel = AM_HAL_PIN_25_M2SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 2 - -# ***************************************************************************** -# IOM3 pins. -# ***************************************************************************** -pin - name = IOM3_CS - desc = I/O Master 3 chip select. - pinnum = 12 - func_sel = AM_HAL_PIN_12_NCE12 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 3 - CEnum = 0 - CEpol = low - -pin - name = IOM3_MISO - desc = I/O Master 3 SPI MISO signal. - pinnum = 43 - func_sel = AM_HAL_PIN_43_M3MISO - IOMnum = 3 - -pin - name = IOM3_MOSI - desc = I/O Master 3 SPI MOSI signal. - pinnum = 38 - func_sel = AM_HAL_PIN_38_M3MOSI - drvstrength = 12 - IOMnum = 3 - -pin - name = IOM3_SCK - desc = I/O Master 3 SPI SCK signal. - pinnum = 42 - func_sel = AM_HAL_PIN_42_M3SCK - drvstrength = 12 - IOMnum = 3 - -pin - name = IOM3_SCL - desc = I/O Master 3 I2C clock signal. - pinnum = 42 - func_sel = AM_HAL_PIN_42_M3SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 3 - -pin - name = IOM3_SDA - desc = I/O Master 3 I2C data signal. - pinnum = 43 - func_sel = AM_HAL_PIN_43_M3SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 3 - -# ***************************************************************************** -# IOM4 pins. -# ***************************************************************************** -pin - name = IOM4_CS - desc = I/O Master 4 chip select. - pinnum = 13 - func_sel = AM_HAL_PIN_13_NCE13 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 4 - CEnum = 1 - CEpol = low - -pin - name = IOM4_MISO - desc = I/O Master 4 SPI MISO signal. - pinnum = 40 - func_sel = AM_HAL_PIN_40_M4MISO - IOMnum = 4 - -pin - name = IOM4_MOSI - desc = I/O Master 4 SPI MOSI signal. - pinnum = 44 - func_sel = AM_HAL_PIN_44_M4MOSI - drvstrength = 12 - IOMnum = 4 - -pin - name = IOM4_SCK - desc = I/O Master 4 SPI SCK signal. - pinnum = 39 - func_sel = AM_HAL_PIN_39_M4SCK - drvstrength = 12 - IOMnum = 4 - -pin - name = IOM4_SCL - desc = I/O Master 4 I2C clock signal. - pinnum = 39 - func_sel = AM_HAL_PIN_39_M4SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 4 - -pin - name = IOM4_SDA - desc = I/O Master 4 I2C data signal. - pinnum = 40 - func_sel = AM_HAL_PIN_40_M4SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 4 - -# ***************************************************************************** -# IOM5 pins. -# ***************************************************************************** -pin - name = IOM5_CS - desc = I/O Master 5 chip select. - pinnum = 16 - func_sel = AM_HAL_PIN_16_NCE16 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 5 - CEnum = 0 - CEpol = low - -pin - name = IOM5_MISO - desc = I/O Master 5 SPI MISO signal. - pinnum = 49 - func_sel = AM_HAL_PIN_49_M5MISO - IOMnum = 5 - -pin - name = IOM5_MOSI - desc = I/O Master 5 SPI MOSI signal. - pinnum = 47 - func_sel = AM_HAL_PIN_47_M5MOSI - drvstrength = 12 - IOMnum = 5 - -pin - name = IOM5_SCK - desc = I/O Master 5 SPI SCK signal. - pinnum = 48 - func_sel = AM_HAL_PIN_48_M5SCK - drvstrength = 12 - IOMnum = 5 - -pin - name = IOM5_SCL - desc = I/O Master 5 I2C clock signal. - pinnum = 48 - func_sel = AM_HAL_PIN_48_M5SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 5 - -pin - name = IOM5_SDA - desc = I/O Master 5 I2C data signal. - pinnum = 49 - func_sel = AM_HAL_PIN_49_M5SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 5 - -# ***************************************************************************** -# MSPI pins. -# ***************************************************************************** -pin - name = MSPI_CE0 - desc = MSPI chip select. - pinnum = 19 - func_sel = AM_HAL_PIN_19_NCE19 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 6 - CEnum = 0 - CEpol = low - -pin - name = MSPI_CE1 - desc = MSPI chip select. - pinnum = 41 - func_sel = AM_HAL_PIN_41_NCE41 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 6 - CEnum = 1 - CEpol = low - -pin - name = MSPI_D0 - desc = MSPI data 0. - pinnum = 22 - func_sel = AM_HAL_PIN_22_MSPI0 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D1 - desc = MSPI data 1. - pinnum = 26 - func_sel = AM_HAL_PIN_26_MSPI1 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D2 - desc = MSPI data 2. - pinnum = 4 - func_sel = AM_HAL_PIN_4_MSPI2 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D3 - desc = MSPI data 3. - pinnum = 23 - func_sel = AM_HAL_PIN_23_MSPI13 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D4 - desc = MSPI data 4. - pinnum = 0 - func_sel = AM_HAL_PIN_0_MSPI4 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D5 - desc = MSPI data 5. - pinnum = 1 - func_sel = AM_HAL_PIN_1_MSPI5 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D6 - desc = MSPI data 6. - pinnum = 2 - func_sel = AM_HAL_PIN_2_MSPI6 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D7 - desc = MSPI data 7. - pinnum = 3 - func_sel = AM_HAL_PIN_3_MSPI7 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_SCK - desc = MSPI clock. - pinnum = 24 - func_sel = AM_HAL_PIN_24_MSPI8 - drvstrength = 12 - intdir = lo2hi - IOMnum = 6 - -# ***************************************************************************** -# IOS pins. -# ***************************************************************************** -pin - name = IOS_CE - desc = I/O Slave chip select. - pinnum = 3 - func_sel = AM_HAL_PIN_3_SLnCE - GPinput = true - CEnum = 0 - CEpol = low - -pin - name = IOS_MISO - desc = I/O Slave SPI MISO signal. - pinnum = 2 - func_sel = AM_HAL_PIN_2_SLMISO - drvstrength = 12 - -pin - name = IOS_MOSI - desc = I/O Slave SPI MOSI signal. - pinnum = 1 - func_sel = AM_HAL_PIN_1_SLMOSI - GPinput = true - -pin - name = IOS_SCK - desc = I/O Slave SPI SCK signal. - pinnum = 0 - func_sel = AM_HAL_PIN_0_SLSCK - GPinput = true - -pin - name = IOS_SCL - desc = I/O Slave I2C clock signal. - pinnum = 0 - func_sel = AM_HAL_PIN_0_SLSCL - GPinput = true - -pin - name = IOS_SDA - desc = I/O Slave I2C data signal. - pinnum = 1 - func_sel = AM_HAL_PIN_1_SLSDAWIR3 - GPOutcfg = opendrain - pullup = 1_5K - -# # ***************************************************************************** -# # ITM pins. -# # ***************************************************************************** -# pin -# name = ITM_SWO -# desc = ITM Serial Wire Output. -# pinnum = 41 -# func_sel = AM_HAL_PIN_41_SWO -# drvstrength = 2 - -# ***************************************************************************** -# CORE pins. -# ***************************************************************************** -pin - name = SWDCK - desc = Cortex Serial Wire DCK. - pinnum = 20 - func_sel = AM_HAL_PIN_20_SWDCK - -pin - name = SWDIO - desc = Cortex Serial Wire DIO. - pinnum = 21 - func_sel = AM_HAL_PIN_21_SWDIO diff --git a/variants/SparkFun_Edge/bsp/gcc/Makefile b/variants/SparkFun_Edge/bsp/gcc/Makefile deleted file mode 100644 index fd0f93b..0000000 --- a/variants/SparkFun_Edge/bsp/gcc/Makefile +++ /dev/null @@ -1,153 +0,0 @@ -#****************************************************************************** -# -# Makefile - Rules for building the libraries, examples and docs. -# -# Copyright (c) 2019, Ambiq Micro -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions are met: -# -# 1. Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# -# 3. Neither the name of the copyright holder nor the names of its -# contributors may be used to endorse or promote products derived from this -# software without specific prior written permission. -# -# Third party software included in this distribution is subject to the -# additional license terms as defined in the /docs/licenses directory. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. -# -# This is part of revision 2.1.0 of the AmbiqSuite Development Package. -# -#****************************************************************************** - -# Pull in exported paths -SDKPATH?=../../../.. -BOARDPATH?=../.. - -TARGET := libam_bsp -COMPILERNAME := gcc -PROJECT := libam_bsp_gcc -CONFIG := bin - -SHELL:=/bin/bash -#### Setup #### - -TOOLCHAIN ?= arm-none-eabi -PART = apollo3 -CPU = cortex-m4 -FPU = fpv4-sp-d16 -# Default to FPU hardware calling convention. However, some customers and/or -# applications may need the software calling convention. -#FABI = softfp -FABI = hard - -#### Required Executables #### -CC = $(TOOLCHAIN)-gcc -GCC = $(TOOLCHAIN)-gcc -CPP = $(TOOLCHAIN)-cpp -LD = $(TOOLCHAIN)-ld -CP = $(TOOLCHAIN)-objcopy -OD = $(TOOLCHAIN)-objdump -RD = $(TOOLCHAIN)-readelf -AR = $(TOOLCHAIN)-ar -SIZE = $(TOOLCHAIN)-size -RM = $(shell which rm 2>/dev/null) - -EXECUTABLES = CC LD CP OD AR RD SIZE GCC -K := $(foreach exec,$(EXECUTABLES),\ - $(if $(shell which $($(exec)) 2>/dev/null),,\ - $(info $(exec) not found on PATH ($($(exec))).)$(exec))) -$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found)) - -ifneq ($(strip $(value K)),) -all clean: - $(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.) - $(RM) -rf bin -else - -DEFINES = -DAM_PACKAGE_BGA -DEFINES+= -DAM_PART_APOLLO3 - -INCLUDES = -I$(SDKPATH)/utils -INCLUDES+= -I$(SDKPATH)/CMSIS/AmbiqMicro/Include -INCLUDES+= -I$(SDKPATH)/devices -INCLUDES+= -I$(SDKPATH)/mcu/apollo3 -INCLUDES+= -I$(SDKPATH)/CMSIS/ARM/Include - -VPATH = .. - -SRC = am_bsp.c -SRC += am_bsp_pins.c - -CSRC = $(filter %.c,$(SRC)) -ASRC = $(filter %.s,$(SRC)) - -OBJS = $(CSRC:%.c=$(CONFIG)/%.o) -OBJS+= $(ASRC:%.s=$(CONFIG)/%.o) - -DEPS = $(CSRC:%.c=$(CONFIG)/%.d) -DEPS+= $(ASRC:%.s=$(CONFIG)/%.d) - -CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI) -CFLAGS+= -ffunction-sections -fdata-sections -CFLAGS+= -MMD -MP -std=c99 -Wall -# Libraries O3 for production, examples O0 for debug. -CFLAGS+= -O3 -CFLAGS+= $(DEFINES) -CFLAGS+= $(INCLUDES) -CFLAGS+= - -# Additional user specified CFLAGS -CFLAGS+=$(EXTRA_CFLAGS) - -ODFLAGS = -S - -#### Rules #### -all: directories $(CONFIG)/$(TARGET).a - -directories: $(CONFIG) - -$(CONFIG): - @mkdir -p $@ - -$(CONFIG)/%.o: %.c $(CONFIG)/%.d $(INCS) - @echo " Compiling $(COMPILERNAME) $<" ;\ - $(CC) -c $(CFLAGS) $< -o $@ - -$(CONFIG)/%.o: %.s $(CONFIG)/%.d $(INCS) - @echo " Assembling $(COMPILERNAME) $<" ;\ - $(CC) -c $(CFLAGS) $< -o $@ - -$(CONFIG)/$(TARGET).a: $(OBJS) - @echo " Library $(COMPILERNAME) $@" ;\ - $(AR) rsvc $@ $(OBJS) - -clean: - @echo "Cleaning..." ;\ - $(RM) -f $(OBJS) $(DEPS) \ - $(CONFIG)/$(TARGET).a - -$(CONFIG)/%.d: ; - -# Automatically include any generated dependencies --include $(DEPS) -endif -.PHONY: all clean directories diff --git a/variants/SparkFun_Edge/bsp/gcc/bin/libam_bsp.a b/variants/SparkFun_Edge/bsp/gcc/bin/libam_bsp.a deleted file mode 100644 index 5ae5400..0000000 Binary files a/variants/SparkFun_Edge/bsp/gcc/bin/libam_bsp.a and /dev/null differ diff --git a/variants/SparkFun_Edge2/bsp/bsp_pins.src b/variants/SparkFun_Edge2/bsp/bsp_pins.src deleted file mode 100644 index 7b25e74..0000000 --- a/variants/SparkFun_Edge2/bsp/bsp_pins.src +++ /dev/null @@ -1,793 +0,0 @@ -# ****************************************************************************** -# * -# Copyright (c) 2018 Ambiq Micro. * -# * -#******************************************************************************* -# * -# File: bsp_pins.src * -# * -# Title: SparkFun Edge2 Board Pin Definitions * -# * -# Date: 06/14/2019 * -# * -#******************************************************************************* -# * -# This file contains descriptors for the various BSP pin definitions. * -# After completing the pin descriptors, the file is processed by a * -# Python script to generate the appropriate C and header file. * -# * -# NOTEs: * -# - This file should contain NO TAB characters, only spaces. * -# - Indentation is required, but the amount of indentation is not critical, * -# only the consistency of indentation. * -# - Comment lines always begin with a '#' sign. * -# - Letter case of keywords (left side of equal) is not important. * -# Letter case of the value (right side of equal) is not important when * -# processing standard values (e.g. "lo2hi"). However, letter case is * -# maintained when used for creating defines. * -# * -# Keywords: * -# All of the following keywords should begin in column 4. * -# name The name to be used for the pin. This name will be used as a * -# base for generating defines. Each pin name must be unique. * -# desc Optional: A description, if provided, will appear in the * -# generated header file. * -# funcsel A value 0-7, or the equivalent AM_HAL_PIN_nn_xxxx macro. * -# The AM_HAL_PIN_nn_xxxx nomenclature is preferred. * -# pinnum The pin number for the pin being defined (0-49). * -# drvstrength One of: 2, 4, 8, or 12. If not provided, 2 is default. * -# GPOutcfg Typically used if the pin is being defined as GPIO (funcsel=3).* -# One of: disable, pushpull, opendrain, tristate. * -# Also acceptable is a value 0-3, or a macro. * -# GPinput Only used if the pin is being defined as GPIO (funcsel=3). * -# One of: true, false. * -# GPRdZero One of readpin, zero (or true or false). * -# intdir One of: none, lo2hi, hi2lo, either. * -# Note - does not enable any interrupt. Only configures the * -# direction for when it is enabled. * -# pullup One of: none, 1_5K, 6K, 12K, 24K, weak, pulldown. * -# 1_5K - 24K: valid on I2C pins. * -# weak: Valid for pullups on all other (non-I2C) pins. * -# pulldown: Valid for pin 20 only. * -# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_PULLUP_1_5K). * -# PowerSw One of: VDD or VSS. * -# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_POWERSW_VDD). * -# * -# The following 3 parameters are used when the pin is being defined as a * -# chip enable, i.e. for SPI or MSPI. * -# IOMnum The IOM number pertaining to the CE. 0-5 for SPI, 6 for MSPI. * -# Also acceptable is a macro (e.g. one defined in am_bsp.h). * -# CEnum A value from 0-3. * -# If a value 0-3, a macro is created of the form: * -# #define AM_BSP__CHNL * -# Also acceptable is a macro (e.g. one defined in am_bsp.h), * -# in this case no other macro is created. * -# CEpol Chip enable polarity, active low or active high. * -# One of: LOW (default) or HIGH. * -# * -# ****************************************************************************** - - -# ***************************************************************************** -# Camera Pins -# ***************************************************************************** -pin - name = CAMERA_HM01B0_D0 - pinnum = 14 - func_sel = AM_HAL_PIN_14_GPIO - drvstrength = 2 - GPinput = true - -pin - name = CAMERA_HM01B0_D1 - pinnum = 11 - func_sel = AM_HAL_PIN_11_GPIO - drvstrength = 2 - GPinput = true - -pin - name = CAMERA_HM01B0_D2 - pinnum = 25 - func_sel = AM_HAL_PIN_25_GPIO - drvstrength = 2 - GPinput = true - -pin - name = CAMERA_HM01B0_D3 - pinnum = 34 - func_sel = AM_HAL_PIN_34_GPIO - drvstrength = 2 - GPinput = true - -pin - name = CAMERA_HM01B0_D4 - pinnum = 6 - func_sel = AM_HAL_PIN_6_GPIO - drvstrength = 2 - GPinput = true - -pin - name = CAMERA_HM01B0_D5 - pinnum = 5 - func_sel = AM_HAL_PIN_5_GPIO - drvstrength = 2 - GPinput = true - -pin - name = CAMERA_HM01B0_D6 - pinnum = 35 - func_sel = AM_HAL_PIN_35_GPIO - drvstrength = 2 - GPinput = true - -pin - name = CAMERA_HM01B0_D7 - pinnum = 28 - func_sel = AM_HAL_PIN_28_GPIO - drvstrength = 2 - GPinput = true - -# pin -# name = CAMERA_HM01B0_MCLCK -# pinnum = -# func_sel = -# # this pin needs only the pad # to be defined b/c it is configured by "am_hal_ctimer_output_configure" - -pin - name = CAMERA_HM01B0_VSYNC - desc = Also called FVLD on the HM01B0 module - pinnum = 15 - func_sel = AM_HAL_PIN_15_GPIO - drvstrength = 2 - GPinput = true - -pin - name = CAMERA_HM01B0_HSYNC - desc = Also called LVLD on the HM01B0 module - pinnum = 27 - func_sel = AM_HAL_PIN_27_GPIO - drvstrength = 2 - GPinput = true - -pin - name = CAMERA_HM01B0_PCLK - pinnum = 7 - func_sel = AM_HAL_PIN_7_GPIO - drvstrength = 2 - GPinput = true - -pin - name = CAMERA_HM01B0_TRIG - pinnum = 13 - func_sel = AM_HAL_PIN_13_GPIO - drvstrength = 2 - GPinput = true - -pin - name = CAMERA_HM01B0_INT - pinnum = 23 - func_sel = AM_HAL_PIN_23_GPIO - drvstrength = 2 - GPinput = true - # todo: add interrupt capability for this pin according to polarity of HM01B0 module - -pin - name = CAMERA_HM01B0_DVDDEN - pinnum = 32 - func_sel = AM_HAL_PIN_32_GPIO - drvstrength = 2 - - -# ***************************************************************************** -# PDM Microphone Lines -# ***************************************************************************** -pin - name = MIC_DATA - desc = Data line for PDM microphones - pinnum = 29 - func_sel = AM_HAL_PIN_29_PDMDATA - -pin - name = MIC_CLK - desc = Clock line for PDM microphones - pinnum = 12 - func_sel = AM_HAL_PIN_12_PDMCLK - -# ***************************************************************************** -# LEDs and buttons -# ***************************************************************************** -pin - name = LED_RED - desc = The RED LED labelled 19 - pinnum = 19 - func_sel = AM_HAL_PIN_19_GPIO - drvstrength = 12 - -pin - name = LED_BLUE - desc = The BLUE LED labelled 18 - pinnum = 18 - func_sel = AM_HAL_PIN_18_GPIO - drvstrength = 12 - -pin - name = LED_GREEN - pinnum = 17 - desc = The GREEN LED labelled 17 - func_sel = AM_HAL_PIN_17_GPIO - drvstrength = 12 - -pin - name = LED_YELLOW - desc = The YELLOW LED labelled 37 - pinnum = 37 - func_sel = AM_HAL_PIN_37_GPIO - drvstrength = 12 - - -# ***************************************************************************** -# COM UART pins (UART0). -# ***************************************************************************** -pin - name = COM_UART_TX - desc = This pin is the COM_UART transmit pin. - pinnum = 48 - func_sel = AM_HAL_PIN_48_UART0TX - drvstrength = 2 - -pin - name = COM_UART_RX - desc = This pin is the COM_UART receive pin. - pinnum = 49 - func_sel = AM_HAL_PIN_49_UART0RX - - -# ***************************************************************************** -# IOM0 pins. -# ***************************************************************************** -pin - name = IOM0_CS - desc = I/O Master 0 chip select. - pinnum = 11 - func_sel = AM_HAL_PIN_11_NCE11 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 0 - CEnum = 0 - CEpol = low - -pin - name = IOM0_CS3 - desc = I/O Master 0 chip select. - pinnum = 15 - func_sel = AM_HAL_PIN_15_NCE15 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 0 - CEnum = 3 - CEpol = low - -pin - name = IOM0_MISO - desc = I/O Master 0 SPI MISO signal. - pinnum = 6 - func_sel = AM_HAL_PIN_6_M0MISO - IOMnum = 0 - -pin - name = IOM0_MOSI - desc = I/O Master 0 SPI MOSI signal. - pinnum = 7 - func_sel = AM_HAL_PIN_7_M0MOSI - drvstrength = 12 - IOMnum = 0 - -pin - name = IOM0_SCK - desc = I/O Master 0 SPI SCK signal. - pinnum = 5 - func_sel = AM_HAL_PIN_5_M0SCK - drvstrength = 12 - IOMnum = 0 - -pin - name = IOM0_SCL - desc = I/O Master 0 I2C clock signal. - pinnum = 5 - func_sel = AM_HAL_PIN_5_M0SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 0 - -pin - name = IOM0_SDA - desc = I/O Master 0 I2C data signal. - pinnum = 6 - func_sel = AM_HAL_PIN_6_M0SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 0 - -# ***************************************************************************** -# IOM1 pins. -# ***************************************************************************** -pin - name = IOM1_CS - desc = I/O Master 1 chip select. - pinnum = 14 - func_sel = AM_HAL_PIN_14_NCE14 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 1 - CEnum = 2 - CEpol = low - -pin - name = IOM1_MISO - desc = I/O Master 1 SPI MISO signal. - pinnum = 9 - func_sel = AM_HAL_PIN_9_M1MISO - IOMnum = 1 - -pin - name = IOM1_MOSI - desc = I/O Master 1 SPI MOSI signal. - pinnum = 10 - func_sel = AM_HAL_PIN_10_M1MOSI - drvstrength = 12 - IOMnum = 1 - -pin - name = IOM1_SCK - desc = I/O Master 1 SPI SCK signal. - pinnum = 8 - func_sel = AM_HAL_PIN_8_M1SCK - drvstrength = 12 - IOMnum = 1 - -pin - name = IOM1_SCL - desc = I/O Master 1 I2C clock signal. - pinnum = 8 - func_sel = AM_HAL_PIN_8_M1SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 1 - -pin - name = IOM1_SDA - desc = I/O Master 1 I2C data signal. - pinnum = 9 - func_sel = AM_HAL_PIN_9_M1SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 1 - -# ***************************************************************************** -# IOM2 pins. -# ***************************************************************************** -pin - name = IOM2_CS - desc = I/O Master 2 chip select. - pinnum = 15 - func_sel = AM_HAL_PIN_15_NCE15 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 2 - CEnum = 3 - CEpol = low - -pin - name = IOM2_MISO - desc = I/O Master 2 SPI MISO signal. - pinnum = 25 - func_sel = AM_HAL_PIN_25_M2MISO - IOMnum = 2 - -pin - name = IOM2_MOSI - desc = I/O Master 2 SPI MOSI signal. - pinnum = 28 - func_sel = AM_HAL_PIN_28_M2MOSI - drvstrength = 12 - IOMnum = 2 - -pin - name = IOM2_SCK - desc = I/O Master 2 SPI SCK signal. - pinnum = 27 - func_sel = AM_HAL_PIN_27_M2SCK - drvstrength = 12 - IOMnum = 2 - -pin - name = IOM2_SCL - desc = I/O Master 2 I2C clock signal. - pinnum = 27 - func_sel = AM_HAL_PIN_27_M2SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 2 - -pin - name = IOM2_SDA - desc = I/O Master 2 I2C data signal. - pinnum = 25 - func_sel = AM_HAL_PIN_25_M2SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 2 - -# ***************************************************************************** -# IOM3 pins. -# ***************************************************************************** -pin - name = IOM3_CS - desc = I/O Master 3 chip select. - pinnum = 12 - func_sel = AM_HAL_PIN_12_NCE12 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 3 - CEnum = 0 - CEpol = low - -pin - name = IOM3_MISO - desc = I/O Master 3 SPI MISO signal. - pinnum = 43 - func_sel = AM_HAL_PIN_43_M3MISO - IOMnum = 3 - -pin - name = IOM3_MOSI - desc = I/O Master 3 SPI MOSI signal. - pinnum = 38 - func_sel = AM_HAL_PIN_38_M3MOSI - drvstrength = 12 - IOMnum = 3 - -pin - name = IOM3_SCK - desc = I/O Master 3 SPI SCK signal. - pinnum = 42 - func_sel = AM_HAL_PIN_42_M3SCK - drvstrength = 12 - IOMnum = 3 - -pin - name = IOM3_SCL - desc = I/O Master 3 I2C clock signal. - pinnum = 42 - func_sel = AM_HAL_PIN_42_M3SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 3 - -pin - name = IOM3_SDA - desc = I/O Master 3 I2C data signal. - pinnum = 43 - func_sel = AM_HAL_PIN_43_M3SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 3 - -# ***************************************************************************** -# IOM4 pins. -# ***************************************************************************** -pin - name = IOM4_CS - desc = I/O Master 4 chip select. - pinnum = 13 - func_sel = AM_HAL_PIN_13_NCE13 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 4 - CEnum = 1 - CEpol = low - -pin - name = IOM4_MISO - desc = I/O Master 4 SPI MISO signal. - pinnum = 40 - func_sel = AM_HAL_PIN_40_M4MISO - IOMnum = 4 - -pin - name = IOM4_MOSI - desc = I/O Master 4 SPI MOSI signal. - pinnum = 44 - func_sel = AM_HAL_PIN_44_M4MOSI - drvstrength = 12 - IOMnum = 4 - -pin - name = IOM4_SCK - desc = I/O Master 4 SPI SCK signal. - pinnum = 39 - func_sel = AM_HAL_PIN_39_M4SCK - drvstrength = 12 - IOMnum = 4 - -pin - name = IOM4_SCL - desc = I/O Master 4 I2C clock signal. - pinnum = 39 - func_sel = AM_HAL_PIN_39_M4SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 4 - -pin - name = IOM4_SDA - desc = I/O Master 4 I2C data signal. - pinnum = 40 - func_sel = AM_HAL_PIN_40_M4SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 4 - -# ***************************************************************************** -# IOM5 pins. -# ***************************************************************************** -pin - name = IOM5_CS - desc = I/O Master 5 chip select. - pinnum = 16 - func_sel = AM_HAL_PIN_16_NCE16 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 5 - CEnum = 0 - CEpol = low - -pin - name = IOM5_MISO - desc = I/O Master 5 SPI MISO signal. - pinnum = 49 - func_sel = AM_HAL_PIN_49_M5MISO - IOMnum = 5 - -pin - name = IOM5_MOSI - desc = I/O Master 5 SPI MOSI signal. - pinnum = 47 - func_sel = AM_HAL_PIN_47_M5MOSI - drvstrength = 12 - IOMnum = 5 - -pin - name = IOM5_SCK - desc = I/O Master 5 SPI SCK signal. - pinnum = 48 - func_sel = AM_HAL_PIN_48_M5SCK - drvstrength = 12 - IOMnum = 5 - -pin - name = IOM5_SCL - desc = I/O Master 5 I2C clock signal. - pinnum = 48 - func_sel = AM_HAL_PIN_48_M5SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 5 - -pin - name = IOM5_SDA - desc = I/O Master 5 I2C data signal. - pinnum = 49 - func_sel = AM_HAL_PIN_49_M5SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 5 - -# ***************************************************************************** -# MSPI pins. -# ***************************************************************************** -pin - name = MSPI_CE0 - desc = MSPI chip select. - pinnum = 19 - func_sel = AM_HAL_PIN_19_NCE19 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 6 - CEnum = 0 - CEpol = low - -pin - name = MSPI_CE1 - desc = MSPI chip select. - pinnum = 41 - func_sel = AM_HAL_PIN_41_NCE41 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 6 - CEnum = 1 - CEpol = low - -pin - name = MSPI_D0 - desc = MSPI data 0. - pinnum = 22 - func_sel = AM_HAL_PIN_22_MSPI0 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D1 - desc = MSPI data 1. - pinnum = 26 - func_sel = AM_HAL_PIN_26_MSPI1 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D2 - desc = MSPI data 2. - pinnum = 4 - func_sel = AM_HAL_PIN_4_MSPI2 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D3 - desc = MSPI data 3. - pinnum = 23 - func_sel = AM_HAL_PIN_23_MSPI13 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D4 - desc = MSPI data 4. - pinnum = 0 - func_sel = AM_HAL_PIN_0_MSPI4 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D5 - desc = MSPI data 5. - pinnum = 1 - func_sel = AM_HAL_PIN_1_MSPI5 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D6 - desc = MSPI data 6. - pinnum = 2 - func_sel = AM_HAL_PIN_2_MSPI6 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D7 - desc = MSPI data 7. - pinnum = 3 - func_sel = AM_HAL_PIN_3_MSPI7 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_SCK - desc = MSPI clock. - pinnum = 24 - func_sel = AM_HAL_PIN_24_MSPI8 - drvstrength = 12 - intdir = lo2hi - IOMnum = 6 - -# ***************************************************************************** -# IOS pins. -# ***************************************************************************** -pin - name = IOS_CE - desc = I/O Slave chip select. - pinnum = 3 - func_sel = AM_HAL_PIN_3_SLnCE - GPinput = true - CEnum = 0 - CEpol = low - -pin - name = IOS_MISO - desc = I/O Slave SPI MISO signal. - pinnum = 2 - func_sel = AM_HAL_PIN_2_SLMISO - drvstrength = 12 - -pin - name = IOS_MOSI - desc = I/O Slave SPI MOSI signal. - pinnum = 1 - func_sel = AM_HAL_PIN_1_SLMOSI - GPinput = true - -pin - name = IOS_SCK - desc = I/O Slave SPI SCK signal. - pinnum = 0 - func_sel = AM_HAL_PIN_0_SLSCK - GPinput = true - -pin - name = IOS_SCL - desc = I/O Slave I2C clock signal. - pinnum = 0 - func_sel = AM_HAL_PIN_0_SLSCL - GPinput = true - -pin - name = IOS_SDA - desc = I/O Slave I2C data signal. - pinnum = 1 - func_sel = AM_HAL_PIN_1_SLSDAWIR3 - GPOutcfg = opendrain - pullup = 1_5K - -# # ***************************************************************************** -# # ITM pins. -# # ***************************************************************************** -# pin -# name = ITM_SWO -# desc = ITM Serial Wire Output. -# pinnum = 41 -# func_sel = AM_HAL_PIN_41_SWO -# drvstrength = 2 - -# ***************************************************************************** -# CORE pins. -# ***************************************************************************** -pin - name = SWDCK - desc = Cortex Serial Wire DCK. - pinnum = 20 - func_sel = AM_HAL_PIN_20_SWDCK - -pin - name = SWDIO - desc = Cortex Serial Wire DIO. - pinnum = 21 - func_sel = AM_HAL_PIN_21_SWDIO diff --git a/variants/SparkFun_Edge2/bsp/gcc/Makefile b/variants/SparkFun_Edge2/bsp/gcc/Makefile deleted file mode 100644 index fd0f93b..0000000 --- a/variants/SparkFun_Edge2/bsp/gcc/Makefile +++ /dev/null @@ -1,153 +0,0 @@ -#****************************************************************************** -# -# Makefile - Rules for building the libraries, examples and docs. -# -# Copyright (c) 2019, Ambiq Micro -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions are met: -# -# 1. Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# -# 3. Neither the name of the copyright holder nor the names of its -# contributors may be used to endorse or promote products derived from this -# software without specific prior written permission. -# -# Third party software included in this distribution is subject to the -# additional license terms as defined in the /docs/licenses directory. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. -# -# This is part of revision 2.1.0 of the AmbiqSuite Development Package. -# -#****************************************************************************** - -# Pull in exported paths -SDKPATH?=../../../.. -BOARDPATH?=../.. - -TARGET := libam_bsp -COMPILERNAME := gcc -PROJECT := libam_bsp_gcc -CONFIG := bin - -SHELL:=/bin/bash -#### Setup #### - -TOOLCHAIN ?= arm-none-eabi -PART = apollo3 -CPU = cortex-m4 -FPU = fpv4-sp-d16 -# Default to FPU hardware calling convention. However, some customers and/or -# applications may need the software calling convention. -#FABI = softfp -FABI = hard - -#### Required Executables #### -CC = $(TOOLCHAIN)-gcc -GCC = $(TOOLCHAIN)-gcc -CPP = $(TOOLCHAIN)-cpp -LD = $(TOOLCHAIN)-ld -CP = $(TOOLCHAIN)-objcopy -OD = $(TOOLCHAIN)-objdump -RD = $(TOOLCHAIN)-readelf -AR = $(TOOLCHAIN)-ar -SIZE = $(TOOLCHAIN)-size -RM = $(shell which rm 2>/dev/null) - -EXECUTABLES = CC LD CP OD AR RD SIZE GCC -K := $(foreach exec,$(EXECUTABLES),\ - $(if $(shell which $($(exec)) 2>/dev/null),,\ - $(info $(exec) not found on PATH ($($(exec))).)$(exec))) -$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found)) - -ifneq ($(strip $(value K)),) -all clean: - $(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.) - $(RM) -rf bin -else - -DEFINES = -DAM_PACKAGE_BGA -DEFINES+= -DAM_PART_APOLLO3 - -INCLUDES = -I$(SDKPATH)/utils -INCLUDES+= -I$(SDKPATH)/CMSIS/AmbiqMicro/Include -INCLUDES+= -I$(SDKPATH)/devices -INCLUDES+= -I$(SDKPATH)/mcu/apollo3 -INCLUDES+= -I$(SDKPATH)/CMSIS/ARM/Include - -VPATH = .. - -SRC = am_bsp.c -SRC += am_bsp_pins.c - -CSRC = $(filter %.c,$(SRC)) -ASRC = $(filter %.s,$(SRC)) - -OBJS = $(CSRC:%.c=$(CONFIG)/%.o) -OBJS+= $(ASRC:%.s=$(CONFIG)/%.o) - -DEPS = $(CSRC:%.c=$(CONFIG)/%.d) -DEPS+= $(ASRC:%.s=$(CONFIG)/%.d) - -CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI) -CFLAGS+= -ffunction-sections -fdata-sections -CFLAGS+= -MMD -MP -std=c99 -Wall -# Libraries O3 for production, examples O0 for debug. -CFLAGS+= -O3 -CFLAGS+= $(DEFINES) -CFLAGS+= $(INCLUDES) -CFLAGS+= - -# Additional user specified CFLAGS -CFLAGS+=$(EXTRA_CFLAGS) - -ODFLAGS = -S - -#### Rules #### -all: directories $(CONFIG)/$(TARGET).a - -directories: $(CONFIG) - -$(CONFIG): - @mkdir -p $@ - -$(CONFIG)/%.o: %.c $(CONFIG)/%.d $(INCS) - @echo " Compiling $(COMPILERNAME) $<" ;\ - $(CC) -c $(CFLAGS) $< -o $@ - -$(CONFIG)/%.o: %.s $(CONFIG)/%.d $(INCS) - @echo " Assembling $(COMPILERNAME) $<" ;\ - $(CC) -c $(CFLAGS) $< -o $@ - -$(CONFIG)/$(TARGET).a: $(OBJS) - @echo " Library $(COMPILERNAME) $@" ;\ - $(AR) rsvc $@ $(OBJS) - -clean: - @echo "Cleaning..." ;\ - $(RM) -f $(OBJS) $(DEPS) \ - $(CONFIG)/$(TARGET).a - -$(CONFIG)/%.d: ; - -# Automatically include any generated dependencies --include $(DEPS) -endif -.PHONY: all clean directories diff --git a/variants/SparkFun_Edge2/bsp/gcc/bin/libam_bsp.a b/variants/SparkFun_Edge2/bsp/gcc/bin/libam_bsp.a deleted file mode 100644 index 351c215..0000000 Binary files a/variants/SparkFun_Edge2/bsp/gcc/bin/libam_bsp.a and /dev/null differ diff --git a/variants/SparkFun_RedBoard_Artemis/bsp/bsp_pins.src b/variants/SparkFun_RedBoard_Artemis/bsp/bsp_pins.src deleted file mode 100644 index cc99755..0000000 --- a/variants/SparkFun_RedBoard_Artemis/bsp/bsp_pins.src +++ /dev/null @@ -1,663 +0,0 @@ -# ****************************************************************************** -# * -# Copyright (c) 2018 Ambiq Micro. * -# * -#******************************************************************************* -# * -# File: bsp_pins.src * -# * -# Title: SparkFun Edge Board Pin Definitions * -# * -# Date: 06/14/2019 * -# * -#******************************************************************************* -# * -# This file contains descriptors for the various BSP pin definitions. * -# After completing the pin descriptors, the file is processed by a * -# Python script to generate the appropriate C and header file. * -# * -# NOTEs: * -# - This file should contain NO TAB characters, only spaces. * -# - Indentation is required, but the amount of indentation is not critical, * -# only the consistency of indentation. * -# - Comment lines always begin with a '#' sign. * -# - Letter case of keywords (left side of equal) is not important. * -# Letter case of the value (right side of equal) is not important when * -# processing standard values (e.g. "lo2hi"). However, letter case is * -# maintained when used for creating defines. * -# * -# Keywords: * -# All of the following keywords should begin in column 4. * -# name The name to be used for the pin. This name will be used as a * -# base for generating defines. Each pin name must be unique. * -# desc Optional: A description, if provided, will appear in the * -# generated header file. * -# funcsel A value 0-7, or the equivalent AM_HAL_PIN_nn_xxxx macro. * -# The AM_HAL_PIN_nn_xxxx nomenclature is preferred. * -# pinnum The pin number for the pin being defined (0-49). * -# drvstrength One of: 2, 4, 8, or 12. If not provided, 2 is default. * -# GPOutcfg Typically used if the pin is being defined as GPIO (funcsel=3).* -# One of: disable, pushpull, opendrain, tristate. * -# Also acceptable is a value 0-3, or a macro. * -# GPinput Only used if the pin is being defined as GPIO (funcsel=3). * -# One of: true, false. * -# GPRdZero One of readpin, zero (or true or false). * -# intdir One of: none, lo2hi, hi2lo, either. * -# Note - does not enable any interrupt. Only configures the * -# direction for when it is enabled. * -# pullup One of: none, 1_5K, 6K, 12K, 24K, weak, pulldown. * -# 1_5K - 24K: valid on I2C pins. * -# weak: Valid for pullups on all other (non-I2C) pins. * -# pulldown: Valid for pin 20 only. * -# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_PULLUP_1_5K). * -# PowerSw One of: VDD or VSS. * -# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_POWERSW_VDD). * -# * -# The following 3 parameters are used when the pin is being defined as a * -# chip enable, i.e. for SPI or MSPI. * -# IOMnum The IOM number pertaining to the CE. 0-5 for SPI, 6 for MSPI. * -# Also acceptable is a macro (e.g. one defined in am_bsp.h). * -# CEnum A value from 0-3. * -# If a value 0-3, a macro is created of the form: * -# #define AM_BSP__CHNL * -# Also acceptable is a macro (e.g. one defined in am_bsp.h), * -# in this case no other macro is created. * -# CEpol Chip enable polarity, active low or active high. * -# One of: LOW (default) or HIGH. * -# * -# ****************************************************************************** - - -# ***************************************************************************** -# LEDs and buttons -# ***************************************************************************** -pin - name = LED_BLUE - desc = The BLUE LED labelled 13 - pinnum = 5 - func_sel = AM_HAL_PIN_5_GPIO - drvstrength = 12 - - -# ***************************************************************************** -# PDM Microphone Lines -# ***************************************************************************** -pin - name = MIC_DATA - desc = Data line for PDM microphones - pinnum = 36 - func_sel = AM_HAL_PIN_36_PDMDATA - -pin - name = MIC_CLK - desc = Clock line for PDM microphones - pinnum = 37 - func_sel = AM_HAL_PIN_37_PDMCLK - - -# ***************************************************************************** -# COM UART pins (UART0). -# ***************************************************************************** -pin - name = COM_UART_TX - desc = This pin is the COM_UART transmit pin. - pinnum = 48 - func_sel = AM_HAL_PIN_48_UART0TX - drvstrength = 2 - -pin - name = COM_UART_RX - desc = This pin is the COM_UART receive pin. - pinnum = 49 - func_sel = AM_HAL_PIN_49_UART0RX - - -# ***************************************************************************** -# IOM0 pins. -# ***************************************************************************** -pin - name = IOM0_CS - desc = I/O Master 0 chip select. - pinnum = 11 - func_sel = AM_HAL_PIN_11_NCE11 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 0 - CEnum = 0 - CEpol = low - -pin - name = IOM0_CS3 - desc = I/O Master 0 chip select. - pinnum = 15 - func_sel = AM_HAL_PIN_15_NCE15 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 0 - CEnum = 3 - CEpol = low - -pin - name = IOM0_MISO - desc = I/O Master 0 SPI MISO signal. - pinnum = 6 - func_sel = AM_HAL_PIN_6_M0MISO - IOMnum = 0 - -pin - name = IOM0_MOSI - desc = I/O Master 0 SPI MOSI signal. - pinnum = 7 - func_sel = AM_HAL_PIN_7_M0MOSI - drvstrength = 12 - IOMnum = 0 - -pin - name = IOM0_SCK - desc = I/O Master 0 SPI SCK signal. - pinnum = 5 - func_sel = AM_HAL_PIN_5_M0SCK - drvstrength = 12 - IOMnum = 0 - -pin - name = IOM0_SCL - desc = I/O Master 0 I2C clock signal. - pinnum = 5 - func_sel = AM_HAL_PIN_5_M0SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 0 - -pin - name = IOM0_SDA - desc = I/O Master 0 I2C data signal. - pinnum = 6 - func_sel = AM_HAL_PIN_6_M0SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 0 - -# ***************************************************************************** -# IOM1 pins. -# ***************************************************************************** -pin - name = IOM1_CS - desc = I/O Master 1 chip select. - pinnum = 14 - func_sel = AM_HAL_PIN_14_NCE14 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 1 - CEnum = 2 - CEpol = low - -pin - name = IOM1_MISO - desc = I/O Master 1 SPI MISO signal. - pinnum = 9 - func_sel = AM_HAL_PIN_9_M1MISO - IOMnum = 1 - -pin - name = IOM1_MOSI - desc = I/O Master 1 SPI MOSI signal. - pinnum = 10 - func_sel = AM_HAL_PIN_10_M1MOSI - drvstrength = 12 - IOMnum = 1 - -pin - name = IOM1_SCK - desc = I/O Master 1 SPI SCK signal. - pinnum = 8 - func_sel = AM_HAL_PIN_8_M1SCK - drvstrength = 12 - IOMnum = 1 - -pin - name = IOM1_SCL - desc = I/O Master 1 I2C clock signal. - pinnum = 8 - func_sel = AM_HAL_PIN_8_M1SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 1 - -pin - name = IOM1_SDA - desc = I/O Master 1 I2C data signal. - pinnum = 9 - func_sel = AM_HAL_PIN_9_M1SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 1 - -# ***************************************************************************** -# IOM2 pins. -# ***************************************************************************** -pin - name = IOM2_CS - desc = I/O Master 2 chip select. - pinnum = 15 - func_sel = AM_HAL_PIN_15_NCE15 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 2 - CEnum = 3 - CEpol = low - -pin - name = IOM2_MISO - desc = I/O Master 2 SPI MISO signal. - pinnum = 25 - func_sel = AM_HAL_PIN_25_M2MISO - IOMnum = 2 - -pin - name = IOM2_MOSI - desc = I/O Master 2 SPI MOSI signal. - pinnum = 28 - func_sel = AM_HAL_PIN_28_M2MOSI - drvstrength = 12 - IOMnum = 2 - -pin - name = IOM2_SCK - desc = I/O Master 2 SPI SCK signal. - pinnum = 27 - func_sel = AM_HAL_PIN_27_M2SCK - drvstrength = 12 - IOMnum = 2 - -pin - name = IOM2_SCL - desc = I/O Master 2 I2C clock signal. - pinnum = 27 - func_sel = AM_HAL_PIN_27_M2SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 2 - -pin - name = IOM2_SDA - desc = I/O Master 2 I2C data signal. - pinnum = 25 - func_sel = AM_HAL_PIN_25_M2SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 2 - -# ***************************************************************************** -# IOM3 pins. -# ***************************************************************************** -pin - name = IOM3_CS - desc = I/O Master 3 chip select. - pinnum = 12 - func_sel = AM_HAL_PIN_12_NCE12 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 3 - CEnum = 0 - CEpol = low - -pin - name = IOM3_MISO - desc = I/O Master 3 SPI MISO signal. - pinnum = 43 - func_sel = AM_HAL_PIN_43_M3MISO - IOMnum = 3 - -pin - name = IOM3_MOSI - desc = I/O Master 3 SPI MOSI signal. - pinnum = 38 - func_sel = AM_HAL_PIN_38_M3MOSI - drvstrength = 12 - IOMnum = 3 - -pin - name = IOM3_SCK - desc = I/O Master 3 SPI SCK signal. - pinnum = 42 - func_sel = AM_HAL_PIN_42_M3SCK - drvstrength = 12 - IOMnum = 3 - -pin - name = IOM3_SCL - desc = I/O Master 3 I2C clock signal. - pinnum = 42 - func_sel = AM_HAL_PIN_42_M3SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 3 - -pin - name = IOM3_SDA - desc = I/O Master 3 I2C data signal. - pinnum = 43 - func_sel = AM_HAL_PIN_43_M3SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 3 - -# ***************************************************************************** -# IOM4 pins. -# ***************************************************************************** -pin - name = IOM4_CS - desc = I/O Master 4 chip select. - pinnum = 13 - func_sel = AM_HAL_PIN_13_NCE13 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 4 - CEnum = 1 - CEpol = low - -pin - name = IOM4_MISO - desc = I/O Master 4 SPI MISO signal. - pinnum = 40 - func_sel = AM_HAL_PIN_40_M4MISO - IOMnum = 4 - -pin - name = IOM4_MOSI - desc = I/O Master 4 SPI MOSI signal. - pinnum = 44 - func_sel = AM_HAL_PIN_44_M4MOSI - drvstrength = 12 - IOMnum = 4 - -pin - name = IOM4_SCK - desc = I/O Master 4 SPI SCK signal. - pinnum = 39 - func_sel = AM_HAL_PIN_39_M4SCK - drvstrength = 12 - IOMnum = 4 - -pin - name = IOM4_SCL - desc = I/O Master 4 I2C clock signal. - pinnum = 39 - func_sel = AM_HAL_PIN_39_M4SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 4 - -pin - name = IOM4_SDA - desc = I/O Master 4 I2C data signal. - pinnum = 40 - func_sel = AM_HAL_PIN_40_M4SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 4 - -# ***************************************************************************** -# IOM5 pins. -# ***************************************************************************** -pin - name = IOM5_CS - desc = I/O Master 5 chip select. - pinnum = 16 - func_sel = AM_HAL_PIN_16_NCE16 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 5 - CEnum = 0 - CEpol = low - -pin - name = IOM5_MISO - desc = I/O Master 5 SPI MISO signal. - pinnum = 49 - func_sel = AM_HAL_PIN_49_M5MISO - IOMnum = 5 - -pin - name = IOM5_MOSI - desc = I/O Master 5 SPI MOSI signal. - pinnum = 47 - func_sel = AM_HAL_PIN_47_M5MOSI - drvstrength = 12 - IOMnum = 5 - -pin - name = IOM5_SCK - desc = I/O Master 5 SPI SCK signal. - pinnum = 48 - func_sel = AM_HAL_PIN_48_M5SCK - drvstrength = 12 - IOMnum = 5 - -pin - name = IOM5_SCL - desc = I/O Master 5 I2C clock signal. - pinnum = 48 - func_sel = AM_HAL_PIN_48_M5SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 5 - -pin - name = IOM5_SDA - desc = I/O Master 5 I2C data signal. - pinnum = 49 - func_sel = AM_HAL_PIN_49_M5SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 5 - -# ***************************************************************************** -# MSPI pins. -# ***************************************************************************** -pin - name = MSPI_CE0 - desc = MSPI chip select. - pinnum = 19 - func_sel = AM_HAL_PIN_19_NCE19 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 6 - CEnum = 0 - CEpol = low - -pin - name = MSPI_CE1 - desc = MSPI chip select. - pinnum = 41 - func_sel = AM_HAL_PIN_41_NCE41 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 6 - CEnum = 1 - CEpol = low - -pin - name = MSPI_D0 - desc = MSPI data 0. - pinnum = 22 - func_sel = AM_HAL_PIN_22_MSPI0 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D1 - desc = MSPI data 1. - pinnum = 26 - func_sel = AM_HAL_PIN_26_MSPI1 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D2 - desc = MSPI data 2. - pinnum = 4 - func_sel = AM_HAL_PIN_4_MSPI2 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D3 - desc = MSPI data 3. - pinnum = 23 - func_sel = AM_HAL_PIN_23_MSPI13 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D4 - desc = MSPI data 4. - pinnum = 0 - func_sel = AM_HAL_PIN_0_MSPI4 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D5 - desc = MSPI data 5. - pinnum = 1 - func_sel = AM_HAL_PIN_1_MSPI5 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D6 - desc = MSPI data 6. - pinnum = 2 - func_sel = AM_HAL_PIN_2_MSPI6 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D7 - desc = MSPI data 7. - pinnum = 3 - func_sel = AM_HAL_PIN_3_MSPI7 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_SCK - desc = MSPI clock. - pinnum = 24 - func_sel = AM_HAL_PIN_24_MSPI8 - drvstrength = 12 - intdir = lo2hi - IOMnum = 6 - -# ***************************************************************************** -# IOS pins. -# ***************************************************************************** -pin - name = IOS_CE - desc = I/O Slave chip select. - pinnum = 3 - func_sel = AM_HAL_PIN_3_SLnCE - GPinput = true - CEnum = 0 - CEpol = low - -pin - name = IOS_MISO - desc = I/O Slave SPI MISO signal. - pinnum = 2 - func_sel = AM_HAL_PIN_2_SLMISO - drvstrength = 12 - -pin - name = IOS_MOSI - desc = I/O Slave SPI MOSI signal. - pinnum = 1 - func_sel = AM_HAL_PIN_1_SLMOSI - GPinput = true - -pin - name = IOS_SCK - desc = I/O Slave SPI SCK signal. - pinnum = 0 - func_sel = AM_HAL_PIN_0_SLSCK - GPinput = true - -pin - name = IOS_SCL - desc = I/O Slave I2C clock signal. - pinnum = 0 - func_sel = AM_HAL_PIN_0_SLSCL - GPinput = true - -pin - name = IOS_SDA - desc = I/O Slave I2C data signal. - pinnum = 1 - func_sel = AM_HAL_PIN_1_SLSDAWIR3 - GPOutcfg = opendrain - pullup = 1_5K - -# # ***************************************************************************** -# # ITM pins. -# # ***************************************************************************** -# pin -# name = ITM_SWO -# desc = ITM Serial Wire Output. -# pinnum = 41 -# func_sel = AM_HAL_PIN_41_SWO -# drvstrength = 2 - -# ***************************************************************************** -# CORE pins. -# ***************************************************************************** -pin - name = SWDCK - desc = Cortex Serial Wire DCK. - pinnum = 20 - func_sel = AM_HAL_PIN_20_SWDCK - -pin - name = SWDIO - desc = Cortex Serial Wire DIO. - pinnum = 21 - func_sel = AM_HAL_PIN_21_SWDIO diff --git a/variants/SparkFun_RedBoard_Artemis/bsp/gcc/Makefile b/variants/SparkFun_RedBoard_Artemis/bsp/gcc/Makefile deleted file mode 100644 index fd0f93b..0000000 --- a/variants/SparkFun_RedBoard_Artemis/bsp/gcc/Makefile +++ /dev/null @@ -1,153 +0,0 @@ -#****************************************************************************** -# -# Makefile - Rules for building the libraries, examples and docs. -# -# Copyright (c) 2019, Ambiq Micro -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions are met: -# -# 1. Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# -# 3. Neither the name of the copyright holder nor the names of its -# contributors may be used to endorse or promote products derived from this -# software without specific prior written permission. -# -# Third party software included in this distribution is subject to the -# additional license terms as defined in the /docs/licenses directory. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. -# -# This is part of revision 2.1.0 of the AmbiqSuite Development Package. -# -#****************************************************************************** - -# Pull in exported paths -SDKPATH?=../../../.. -BOARDPATH?=../.. - -TARGET := libam_bsp -COMPILERNAME := gcc -PROJECT := libam_bsp_gcc -CONFIG := bin - -SHELL:=/bin/bash -#### Setup #### - -TOOLCHAIN ?= arm-none-eabi -PART = apollo3 -CPU = cortex-m4 -FPU = fpv4-sp-d16 -# Default to FPU hardware calling convention. However, some customers and/or -# applications may need the software calling convention. -#FABI = softfp -FABI = hard - -#### Required Executables #### -CC = $(TOOLCHAIN)-gcc -GCC = $(TOOLCHAIN)-gcc -CPP = $(TOOLCHAIN)-cpp -LD = $(TOOLCHAIN)-ld -CP = $(TOOLCHAIN)-objcopy -OD = $(TOOLCHAIN)-objdump -RD = $(TOOLCHAIN)-readelf -AR = $(TOOLCHAIN)-ar -SIZE = $(TOOLCHAIN)-size -RM = $(shell which rm 2>/dev/null) - -EXECUTABLES = CC LD CP OD AR RD SIZE GCC -K := $(foreach exec,$(EXECUTABLES),\ - $(if $(shell which $($(exec)) 2>/dev/null),,\ - $(info $(exec) not found on PATH ($($(exec))).)$(exec))) -$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found)) - -ifneq ($(strip $(value K)),) -all clean: - $(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.) - $(RM) -rf bin -else - -DEFINES = -DAM_PACKAGE_BGA -DEFINES+= -DAM_PART_APOLLO3 - -INCLUDES = -I$(SDKPATH)/utils -INCLUDES+= -I$(SDKPATH)/CMSIS/AmbiqMicro/Include -INCLUDES+= -I$(SDKPATH)/devices -INCLUDES+= -I$(SDKPATH)/mcu/apollo3 -INCLUDES+= -I$(SDKPATH)/CMSIS/ARM/Include - -VPATH = .. - -SRC = am_bsp.c -SRC += am_bsp_pins.c - -CSRC = $(filter %.c,$(SRC)) -ASRC = $(filter %.s,$(SRC)) - -OBJS = $(CSRC:%.c=$(CONFIG)/%.o) -OBJS+= $(ASRC:%.s=$(CONFIG)/%.o) - -DEPS = $(CSRC:%.c=$(CONFIG)/%.d) -DEPS+= $(ASRC:%.s=$(CONFIG)/%.d) - -CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI) -CFLAGS+= -ffunction-sections -fdata-sections -CFLAGS+= -MMD -MP -std=c99 -Wall -# Libraries O3 for production, examples O0 for debug. -CFLAGS+= -O3 -CFLAGS+= $(DEFINES) -CFLAGS+= $(INCLUDES) -CFLAGS+= - -# Additional user specified CFLAGS -CFLAGS+=$(EXTRA_CFLAGS) - -ODFLAGS = -S - -#### Rules #### -all: directories $(CONFIG)/$(TARGET).a - -directories: $(CONFIG) - -$(CONFIG): - @mkdir -p $@ - -$(CONFIG)/%.o: %.c $(CONFIG)/%.d $(INCS) - @echo " Compiling $(COMPILERNAME) $<" ;\ - $(CC) -c $(CFLAGS) $< -o $@ - -$(CONFIG)/%.o: %.s $(CONFIG)/%.d $(INCS) - @echo " Assembling $(COMPILERNAME) $<" ;\ - $(CC) -c $(CFLAGS) $< -o $@ - -$(CONFIG)/$(TARGET).a: $(OBJS) - @echo " Library $(COMPILERNAME) $@" ;\ - $(AR) rsvc $@ $(OBJS) - -clean: - @echo "Cleaning..." ;\ - $(RM) -f $(OBJS) $(DEPS) \ - $(CONFIG)/$(TARGET).a - -$(CONFIG)/%.d: ; - -# Automatically include any generated dependencies --include $(DEPS) -endif -.PHONY: all clean directories diff --git a/variants/SparkFun_RedBoard_Artemis/bsp/gcc/bin/libam_bsp.a b/variants/SparkFun_RedBoard_Artemis/bsp/gcc/bin/libam_bsp.a deleted file mode 100644 index 6971406..0000000 Binary files a/variants/SparkFun_RedBoard_Artemis/bsp/gcc/bin/libam_bsp.a and /dev/null differ diff --git a/variants/SparkFun_RedBoard_Artemis_ATP/bsp/bsp_pins.src b/variants/SparkFun_RedBoard_Artemis_ATP/bsp/bsp_pins.src deleted file mode 100644 index 7aa752e..0000000 --- a/variants/SparkFun_RedBoard_Artemis_ATP/bsp/bsp_pins.src +++ /dev/null @@ -1,664 +0,0 @@ -# ****************************************************************************** -# * -# Copyright (c) 2018 Ambiq Micro. * -# * -#******************************************************************************* -# * -# File: bsp_pins.src * -# * -# Title: SparkFun Edge Board Pin Definitions * -# * -# Date: 06/14/2019 * -# * -#******************************************************************************* -# * -# This file contains descriptors for the various BSP pin definitions. * -# After completing the pin descriptors, the file is processed by a * -# Python script to generate the appropriate C and header file. * -# * -# NOTEs: * -# - This file should contain NO TAB characters, only spaces. * -# - Indentation is required, but the amount of indentation is not critical, * -# only the consistency of indentation. * -# - Comment lines always begin with a '#' sign. * -# - Letter case of keywords (left side of equal) is not important. * -# Letter case of the value (right side of equal) is not important when * -# processing standard values (e.g. "lo2hi"). However, letter case is * -# maintained when used for creating defines. * -# * -# Keywords: * -# All of the following keywords should begin in column 4. * -# name The name to be used for the pin. This name will be used as a * -# base for generating defines. Each pin name must be unique. * -# desc Optional: A description, if provided, will appear in the * -# generated header file. * -# funcsel A value 0-7, or the equivalent AM_HAL_PIN_nn_xxxx macro. * -# The AM_HAL_PIN_nn_xxxx nomenclature is preferred. * -# pinnum The pin number for the pin being defined (0-49). * -# drvstrength One of: 2, 4, 8, or 12. If not provided, 2 is default. * -# GPOutcfg Typically used if the pin is being defined as GPIO (funcsel=3).* -# One of: disable, pushpull, opendrain, tristate. * -# Also acceptable is a value 0-3, or a macro. * -# GPinput Only used if the pin is being defined as GPIO (funcsel=3). * -# One of: true, false. * -# GPRdZero One of readpin, zero (or true or false). * -# intdir One of: none, lo2hi, hi2lo, either. * -# Note - does not enable any interrupt. Only configures the * -# direction for when it is enabled. * -# pullup One of: none, 1_5K, 6K, 12K, 24K, weak, pulldown. * -# 1_5K - 24K: valid on I2C pins. * -# weak: Valid for pullups on all other (non-I2C) pins. * -# pulldown: Valid for pin 20 only. * -# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_PULLUP_1_5K). * -# PowerSw One of: VDD or VSS. * -# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_POWERSW_VDD). * -# * -# The following 3 parameters are used when the pin is being defined as a * -# chip enable, i.e. for SPI or MSPI. * -# IOMnum The IOM number pertaining to the CE. 0-5 for SPI, 6 for MSPI. * -# Also acceptable is a macro (e.g. one defined in am_bsp.h). * -# CEnum A value from 0-3. * -# If a value 0-3, a macro is created of the form: * -# #define AM_BSP__CHNL * -# Also acceptable is a macro (e.g. one defined in am_bsp.h), * -# in this case no other macro is created. * -# CEpol Chip enable polarity, active low or active high. * -# One of: LOW (default) or HIGH. * -# * -# ****************************************************************************** - - - -# ***************************************************************************** -# LEDs and buttons -# ***************************************************************************** -pin - name = LED_BLUE - desc = The BLUE LED labelled 5 - pinnum = 5 - func_sel = AM_HAL_PIN_5_GPIO - drvstrength = 12 - - -# ***************************************************************************** -# PDM Microphone Lines -# ***************************************************************************** -pin - name = MIC_DATA - desc = Data line for PDM microphones - pinnum = 36 - func_sel = AM_HAL_PIN_36_PDMDATA - -pin - name = MIC_CLK - desc = Clock line for PDM microphones - pinnum = 37 - func_sel = AM_HAL_PIN_37_PDMCLK - - -# ***************************************************************************** -# COM UART pins (UART0). -# ***************************************************************************** -pin - name = COM_UART_TX - desc = This pin is the COM_UART transmit pin. - pinnum = 48 - func_sel = AM_HAL_PIN_48_UART0TX - drvstrength = 2 - -pin - name = COM_UART_RX - desc = This pin is the COM_UART receive pin. - pinnum = 49 - func_sel = AM_HAL_PIN_49_UART0RX - - -# ***************************************************************************** -# IOM0 pins. -# ***************************************************************************** -pin - name = IOM0_CS - desc = I/O Master 0 chip select. - pinnum = 11 - func_sel = AM_HAL_PIN_11_NCE11 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 0 - CEnum = 0 - CEpol = low - -pin - name = IOM0_CS3 - desc = I/O Master 0 chip select. - pinnum = 15 - func_sel = AM_HAL_PIN_15_NCE15 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 0 - CEnum = 3 - CEpol = low - -pin - name = IOM0_MISO - desc = I/O Master 0 SPI MISO signal. - pinnum = 6 - func_sel = AM_HAL_PIN_6_M0MISO - IOMnum = 0 - -pin - name = IOM0_MOSI - desc = I/O Master 0 SPI MOSI signal. - pinnum = 7 - func_sel = AM_HAL_PIN_7_M0MOSI - drvstrength = 12 - IOMnum = 0 - -pin - name = IOM0_SCK - desc = I/O Master 0 SPI SCK signal. - pinnum = 5 - func_sel = AM_HAL_PIN_5_M0SCK - drvstrength = 12 - IOMnum = 0 - -pin - name = IOM0_SCL - desc = I/O Master 0 I2C clock signal. - pinnum = 5 - func_sel = AM_HAL_PIN_5_M0SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 0 - -pin - name = IOM0_SDA - desc = I/O Master 0 I2C data signal. - pinnum = 6 - func_sel = AM_HAL_PIN_6_M0SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 0 - -# ***************************************************************************** -# IOM1 pins. -# ***************************************************************************** -pin - name = IOM1_CS - desc = I/O Master 1 chip select. - pinnum = 14 - func_sel = AM_HAL_PIN_14_NCE14 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 1 - CEnum = 2 - CEpol = low - -pin - name = IOM1_MISO - desc = I/O Master 1 SPI MISO signal. - pinnum = 9 - func_sel = AM_HAL_PIN_9_M1MISO - IOMnum = 1 - -pin - name = IOM1_MOSI - desc = I/O Master 1 SPI MOSI signal. - pinnum = 10 - func_sel = AM_HAL_PIN_10_M1MOSI - drvstrength = 12 - IOMnum = 1 - -pin - name = IOM1_SCK - desc = I/O Master 1 SPI SCK signal. - pinnum = 8 - func_sel = AM_HAL_PIN_8_M1SCK - drvstrength = 12 - IOMnum = 1 - -pin - name = IOM1_SCL - desc = I/O Master 1 I2C clock signal. - pinnum = 8 - func_sel = AM_HAL_PIN_8_M1SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 1 - -pin - name = IOM1_SDA - desc = I/O Master 1 I2C data signal. - pinnum = 9 - func_sel = AM_HAL_PIN_9_M1SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 1 - -# ***************************************************************************** -# IOM2 pins. -# ***************************************************************************** -pin - name = IOM2_CS - desc = I/O Master 2 chip select. - pinnum = 15 - func_sel = AM_HAL_PIN_15_NCE15 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 2 - CEnum = 3 - CEpol = low - -pin - name = IOM2_MISO - desc = I/O Master 2 SPI MISO signal. - pinnum = 25 - func_sel = AM_HAL_PIN_25_M2MISO - IOMnum = 2 - -pin - name = IOM2_MOSI - desc = I/O Master 2 SPI MOSI signal. - pinnum = 28 - func_sel = AM_HAL_PIN_28_M2MOSI - drvstrength = 12 - IOMnum = 2 - -pin - name = IOM2_SCK - desc = I/O Master 2 SPI SCK signal. - pinnum = 27 - func_sel = AM_HAL_PIN_27_M2SCK - drvstrength = 12 - IOMnum = 2 - -pin - name = IOM2_SCL - desc = I/O Master 2 I2C clock signal. - pinnum = 27 - func_sel = AM_HAL_PIN_27_M2SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 2 - -pin - name = IOM2_SDA - desc = I/O Master 2 I2C data signal. - pinnum = 25 - func_sel = AM_HAL_PIN_25_M2SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 2 - -# ***************************************************************************** -# IOM3 pins. -# ***************************************************************************** -pin - name = IOM3_CS - desc = I/O Master 3 chip select. - pinnum = 12 - func_sel = AM_HAL_PIN_12_NCE12 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 3 - CEnum = 0 - CEpol = low - -pin - name = IOM3_MISO - desc = I/O Master 3 SPI MISO signal. - pinnum = 43 - func_sel = AM_HAL_PIN_43_M3MISO - IOMnum = 3 - -pin - name = IOM3_MOSI - desc = I/O Master 3 SPI MOSI signal. - pinnum = 38 - func_sel = AM_HAL_PIN_38_M3MOSI - drvstrength = 12 - IOMnum = 3 - -pin - name = IOM3_SCK - desc = I/O Master 3 SPI SCK signal. - pinnum = 42 - func_sel = AM_HAL_PIN_42_M3SCK - drvstrength = 12 - IOMnum = 3 - -pin - name = IOM3_SCL - desc = I/O Master 3 I2C clock signal. - pinnum = 42 - func_sel = AM_HAL_PIN_42_M3SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 3 - -pin - name = IOM3_SDA - desc = I/O Master 3 I2C data signal. - pinnum = 43 - func_sel = AM_HAL_PIN_43_M3SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 3 - -# ***************************************************************************** -# IOM4 pins. -# ***************************************************************************** -pin - name = IOM4_CS - desc = I/O Master 4 chip select. - pinnum = 13 - func_sel = AM_HAL_PIN_13_NCE13 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 4 - CEnum = 1 - CEpol = low - -pin - name = IOM4_MISO - desc = I/O Master 4 SPI MISO signal. - pinnum = 40 - func_sel = AM_HAL_PIN_40_M4MISO - IOMnum = 4 - -pin - name = IOM4_MOSI - desc = I/O Master 4 SPI MOSI signal. - pinnum = 44 - func_sel = AM_HAL_PIN_44_M4MOSI - drvstrength = 12 - IOMnum = 4 - -pin - name = IOM4_SCK - desc = I/O Master 4 SPI SCK signal. - pinnum = 39 - func_sel = AM_HAL_PIN_39_M4SCK - drvstrength = 12 - IOMnum = 4 - -pin - name = IOM4_SCL - desc = I/O Master 4 I2C clock signal. - pinnum = 39 - func_sel = AM_HAL_PIN_39_M4SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 4 - -pin - name = IOM4_SDA - desc = I/O Master 4 I2C data signal. - pinnum = 40 - func_sel = AM_HAL_PIN_40_M4SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 4 - -# ***************************************************************************** -# IOM5 pins. -# ***************************************************************************** -pin - name = IOM5_CS - desc = I/O Master 5 chip select. - pinnum = 16 - func_sel = AM_HAL_PIN_16_NCE16 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 5 - CEnum = 0 - CEpol = low - -pin - name = IOM5_MISO - desc = I/O Master 5 SPI MISO signal. - pinnum = 49 - func_sel = AM_HAL_PIN_49_M5MISO - IOMnum = 5 - -pin - name = IOM5_MOSI - desc = I/O Master 5 SPI MOSI signal. - pinnum = 47 - func_sel = AM_HAL_PIN_47_M5MOSI - drvstrength = 12 - IOMnum = 5 - -pin - name = IOM5_SCK - desc = I/O Master 5 SPI SCK signal. - pinnum = 48 - func_sel = AM_HAL_PIN_48_M5SCK - drvstrength = 12 - IOMnum = 5 - -pin - name = IOM5_SCL - desc = I/O Master 5 I2C clock signal. - pinnum = 48 - func_sel = AM_HAL_PIN_48_M5SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 5 - -pin - name = IOM5_SDA - desc = I/O Master 5 I2C data signal. - pinnum = 49 - func_sel = AM_HAL_PIN_49_M5SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 5 - -# ***************************************************************************** -# MSPI pins. -# ***************************************************************************** -pin - name = MSPI_CE0 - desc = MSPI chip select. - pinnum = 19 - func_sel = AM_HAL_PIN_19_NCE19 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 6 - CEnum = 0 - CEpol = low - -pin - name = MSPI_CE1 - desc = MSPI chip select. - pinnum = 41 - func_sel = AM_HAL_PIN_41_NCE41 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 6 - CEnum = 1 - CEpol = low - -pin - name = MSPI_D0 - desc = MSPI data 0. - pinnum = 22 - func_sel = AM_HAL_PIN_22_MSPI0 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D1 - desc = MSPI data 1. - pinnum = 26 - func_sel = AM_HAL_PIN_26_MSPI1 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D2 - desc = MSPI data 2. - pinnum = 4 - func_sel = AM_HAL_PIN_4_MSPI2 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D3 - desc = MSPI data 3. - pinnum = 23 - func_sel = AM_HAL_PIN_23_MSPI13 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D4 - desc = MSPI data 4. - pinnum = 0 - func_sel = AM_HAL_PIN_0_MSPI4 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D5 - desc = MSPI data 5. - pinnum = 1 - func_sel = AM_HAL_PIN_1_MSPI5 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D6 - desc = MSPI data 6. - pinnum = 2 - func_sel = AM_HAL_PIN_2_MSPI6 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D7 - desc = MSPI data 7. - pinnum = 3 - func_sel = AM_HAL_PIN_3_MSPI7 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_SCK - desc = MSPI clock. - pinnum = 24 - func_sel = AM_HAL_PIN_24_MSPI8 - drvstrength = 12 - intdir = lo2hi - IOMnum = 6 - -# ***************************************************************************** -# IOS pins. -# ***************************************************************************** -pin - name = IOS_CE - desc = I/O Slave chip select. - pinnum = 3 - func_sel = AM_HAL_PIN_3_SLnCE - GPinput = true - CEnum = 0 - CEpol = low - -pin - name = IOS_MISO - desc = I/O Slave SPI MISO signal. - pinnum = 2 - func_sel = AM_HAL_PIN_2_SLMISO - drvstrength = 12 - -pin - name = IOS_MOSI - desc = I/O Slave SPI MOSI signal. - pinnum = 1 - func_sel = AM_HAL_PIN_1_SLMOSI - GPinput = true - -pin - name = IOS_SCK - desc = I/O Slave SPI SCK signal. - pinnum = 0 - func_sel = AM_HAL_PIN_0_SLSCK - GPinput = true - -pin - name = IOS_SCL - desc = I/O Slave I2C clock signal. - pinnum = 0 - func_sel = AM_HAL_PIN_0_SLSCL - GPinput = true - -pin - name = IOS_SDA - desc = I/O Slave I2C data signal. - pinnum = 1 - func_sel = AM_HAL_PIN_1_SLSDAWIR3 - GPOutcfg = opendrain - pullup = 1_5K - -# # ***************************************************************************** -# # ITM pins. -# # ***************************************************************************** -# pin -# name = ITM_SWO -# desc = ITM Serial Wire Output. -# pinnum = 41 -# func_sel = AM_HAL_PIN_41_SWO -# drvstrength = 2 - -# ***************************************************************************** -# CORE pins. -# ***************************************************************************** -pin - name = SWDCK - desc = Cortex Serial Wire DCK. - pinnum = 20 - func_sel = AM_HAL_PIN_20_SWDCK - -pin - name = SWDIO - desc = Cortex Serial Wire DIO. - pinnum = 21 - func_sel = AM_HAL_PIN_21_SWDIO diff --git a/variants/SparkFun_RedBoard_Artemis_ATP/bsp/gcc/Makefile b/variants/SparkFun_RedBoard_Artemis_ATP/bsp/gcc/Makefile deleted file mode 100644 index fd0f93b..0000000 --- a/variants/SparkFun_RedBoard_Artemis_ATP/bsp/gcc/Makefile +++ /dev/null @@ -1,153 +0,0 @@ -#****************************************************************************** -# -# Makefile - Rules for building the libraries, examples and docs. -# -# Copyright (c) 2019, Ambiq Micro -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions are met: -# -# 1. Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# -# 3. Neither the name of the copyright holder nor the names of its -# contributors may be used to endorse or promote products derived from this -# software without specific prior written permission. -# -# Third party software included in this distribution is subject to the -# additional license terms as defined in the /docs/licenses directory. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. -# -# This is part of revision 2.1.0 of the AmbiqSuite Development Package. -# -#****************************************************************************** - -# Pull in exported paths -SDKPATH?=../../../.. -BOARDPATH?=../.. - -TARGET := libam_bsp -COMPILERNAME := gcc -PROJECT := libam_bsp_gcc -CONFIG := bin - -SHELL:=/bin/bash -#### Setup #### - -TOOLCHAIN ?= arm-none-eabi -PART = apollo3 -CPU = cortex-m4 -FPU = fpv4-sp-d16 -# Default to FPU hardware calling convention. However, some customers and/or -# applications may need the software calling convention. -#FABI = softfp -FABI = hard - -#### Required Executables #### -CC = $(TOOLCHAIN)-gcc -GCC = $(TOOLCHAIN)-gcc -CPP = $(TOOLCHAIN)-cpp -LD = $(TOOLCHAIN)-ld -CP = $(TOOLCHAIN)-objcopy -OD = $(TOOLCHAIN)-objdump -RD = $(TOOLCHAIN)-readelf -AR = $(TOOLCHAIN)-ar -SIZE = $(TOOLCHAIN)-size -RM = $(shell which rm 2>/dev/null) - -EXECUTABLES = CC LD CP OD AR RD SIZE GCC -K := $(foreach exec,$(EXECUTABLES),\ - $(if $(shell which $($(exec)) 2>/dev/null),,\ - $(info $(exec) not found on PATH ($($(exec))).)$(exec))) -$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found)) - -ifneq ($(strip $(value K)),) -all clean: - $(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.) - $(RM) -rf bin -else - -DEFINES = -DAM_PACKAGE_BGA -DEFINES+= -DAM_PART_APOLLO3 - -INCLUDES = -I$(SDKPATH)/utils -INCLUDES+= -I$(SDKPATH)/CMSIS/AmbiqMicro/Include -INCLUDES+= -I$(SDKPATH)/devices -INCLUDES+= -I$(SDKPATH)/mcu/apollo3 -INCLUDES+= -I$(SDKPATH)/CMSIS/ARM/Include - -VPATH = .. - -SRC = am_bsp.c -SRC += am_bsp_pins.c - -CSRC = $(filter %.c,$(SRC)) -ASRC = $(filter %.s,$(SRC)) - -OBJS = $(CSRC:%.c=$(CONFIG)/%.o) -OBJS+= $(ASRC:%.s=$(CONFIG)/%.o) - -DEPS = $(CSRC:%.c=$(CONFIG)/%.d) -DEPS+= $(ASRC:%.s=$(CONFIG)/%.d) - -CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI) -CFLAGS+= -ffunction-sections -fdata-sections -CFLAGS+= -MMD -MP -std=c99 -Wall -# Libraries O3 for production, examples O0 for debug. -CFLAGS+= -O3 -CFLAGS+= $(DEFINES) -CFLAGS+= $(INCLUDES) -CFLAGS+= - -# Additional user specified CFLAGS -CFLAGS+=$(EXTRA_CFLAGS) - -ODFLAGS = -S - -#### Rules #### -all: directories $(CONFIG)/$(TARGET).a - -directories: $(CONFIG) - -$(CONFIG): - @mkdir -p $@ - -$(CONFIG)/%.o: %.c $(CONFIG)/%.d $(INCS) - @echo " Compiling $(COMPILERNAME) $<" ;\ - $(CC) -c $(CFLAGS) $< -o $@ - -$(CONFIG)/%.o: %.s $(CONFIG)/%.d $(INCS) - @echo " Assembling $(COMPILERNAME) $<" ;\ - $(CC) -c $(CFLAGS) $< -o $@ - -$(CONFIG)/$(TARGET).a: $(OBJS) - @echo " Library $(COMPILERNAME) $@" ;\ - $(AR) rsvc $@ $(OBJS) - -clean: - @echo "Cleaning..." ;\ - $(RM) -f $(OBJS) $(DEPS) \ - $(CONFIG)/$(TARGET).a - -$(CONFIG)/%.d: ; - -# Automatically include any generated dependencies --include $(DEPS) -endif -.PHONY: all clean directories diff --git a/variants/SparkFun_RedBoard_Artemis_ATP/bsp/gcc/bin/libam_bsp.a b/variants/SparkFun_RedBoard_Artemis_ATP/bsp/gcc/bin/libam_bsp.a deleted file mode 100644 index 04c3227..0000000 Binary files a/variants/SparkFun_RedBoard_Artemis_ATP/bsp/gcc/bin/libam_bsp.a and /dev/null differ diff --git a/variants/SparkFun_RedBoard_Artemis_Nano/bsp/bsp_pins.src b/variants/SparkFun_RedBoard_Artemis_Nano/bsp/bsp_pins.src deleted file mode 100644 index 6dc1eb8..0000000 --- a/variants/SparkFun_RedBoard_Artemis_Nano/bsp/bsp_pins.src +++ /dev/null @@ -1,663 +0,0 @@ -# ****************************************************************************** -# * -# Copyright (c) 2018 Ambiq Micro. * -# * -#******************************************************************************* -# * -# File: bsp_pins.src * -# * -# Title: SparkFun Edge Board Pin Definitions * -# * -# Date: 06/14/2019 * -# * -#******************************************************************************* -# * -# This file contains descriptors for the various BSP pin definitions. * -# After completing the pin descriptors, the file is processed by a * -# Python script to generate the appropriate C and header file. * -# * -# NOTEs: * -# - This file should contain NO TAB characters, only spaces. * -# - Indentation is required, but the amount of indentation is not critical, * -# only the consistency of indentation. * -# - Comment lines always begin with a '#' sign. * -# - Letter case of keywords (left side of equal) is not important. * -# Letter case of the value (right side of equal) is not important when * -# processing standard values (e.g. "lo2hi"). However, letter case is * -# maintained when used for creating defines. * -# * -# Keywords: * -# All of the following keywords should begin in column 4. * -# name The name to be used for the pin. This name will be used as a * -# base for generating defines. Each pin name must be unique. * -# desc Optional: A description, if provided, will appear in the * -# generated header file. * -# funcsel A value 0-7, or the equivalent AM_HAL_PIN_nn_xxxx macro. * -# The AM_HAL_PIN_nn_xxxx nomenclature is preferred. * -# pinnum The pin number for the pin being defined (0-49). * -# drvstrength One of: 2, 4, 8, or 12. If not provided, 2 is default. * -# GPOutcfg Typically used if the pin is being defined as GPIO (funcsel=3).* -# One of: disable, pushpull, opendrain, tristate. * -# Also acceptable is a value 0-3, or a macro. * -# GPinput Only used if the pin is being defined as GPIO (funcsel=3). * -# One of: true, false. * -# GPRdZero One of readpin, zero (or true or false). * -# intdir One of: none, lo2hi, hi2lo, either. * -# Note - does not enable any interrupt. Only configures the * -# direction for when it is enabled. * -# pullup One of: none, 1_5K, 6K, 12K, 24K, weak, pulldown. * -# 1_5K - 24K: valid on I2C pins. * -# weak: Valid for pullups on all other (non-I2C) pins. * -# pulldown: Valid for pin 20 only. * -# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_PULLUP_1_5K). * -# PowerSw One of: VDD or VSS. * -# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_POWERSW_VDD). * -# * -# The following 3 parameters are used when the pin is being defined as a * -# chip enable, i.e. for SPI or MSPI. * -# IOMnum The IOM number pertaining to the CE. 0-5 for SPI, 6 for MSPI. * -# Also acceptable is a macro (e.g. one defined in am_bsp.h). * -# CEnum A value from 0-3. * -# If a value 0-3, a macro is created of the form: * -# #define AM_BSP__CHNL * -# Also acceptable is a macro (e.g. one defined in am_bsp.h), * -# in this case no other macro is created. * -# CEpol Chip enable polarity, active low or active high. * -# One of: LOW (default) or HIGH. * -# * -# ****************************************************************************** - - -# ***************************************************************************** -# LEDs and buttons -# ***************************************************************************** -pin - name = LED_BLUE - desc = The BLUE LED labelled 37 - pinnum = 37 - func_sel = AM_HAL_PIN_37_GPIO - drvstrength = 12 - - -# ***************************************************************************** -# PDM Microphone Lines -# ***************************************************************************** -pin - name = MIC_DATA - desc = Data line for PDM microphones - pinnum = 36 - func_sel = AM_HAL_PIN_36_PDMDATA - -pin - name = MIC_CLK - desc = Clock line for PDM microphones - pinnum = 37 - func_sel = AM_HAL_PIN_37_PDMCLK - - -# ***************************************************************************** -# COM UART pins (UART0). -# ***************************************************************************** -pin - name = COM_UART_TX - desc = This pin is the COM_UART transmit pin. - pinnum = 48 - func_sel = AM_HAL_PIN_48_UART0TX - drvstrength = 2 - -pin - name = COM_UART_RX - desc = This pin is the COM_UART receive pin. - pinnum = 49 - func_sel = AM_HAL_PIN_49_UART0RX - - -# ***************************************************************************** -# IOM0 pins. -# ***************************************************************************** -pin - name = IOM0_CS - desc = I/O Master 0 chip select. - pinnum = 11 - func_sel = AM_HAL_PIN_11_NCE11 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 0 - CEnum = 0 - CEpol = low - -pin - name = IOM0_CS3 - desc = I/O Master 0 chip select. - pinnum = 15 - func_sel = AM_HAL_PIN_15_NCE15 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 0 - CEnum = 3 - CEpol = low - -pin - name = IOM0_MISO - desc = I/O Master 0 SPI MISO signal. - pinnum = 6 - func_sel = AM_HAL_PIN_6_M0MISO - IOMnum = 0 - -pin - name = IOM0_MOSI - desc = I/O Master 0 SPI MOSI signal. - pinnum = 7 - func_sel = AM_HAL_PIN_7_M0MOSI - drvstrength = 12 - IOMnum = 0 - -pin - name = IOM0_SCK - desc = I/O Master 0 SPI SCK signal. - pinnum = 5 - func_sel = AM_HAL_PIN_5_M0SCK - drvstrength = 12 - IOMnum = 0 - -pin - name = IOM0_SCL - desc = I/O Master 0 I2C clock signal. - pinnum = 5 - func_sel = AM_HAL_PIN_5_M0SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 0 - -pin - name = IOM0_SDA - desc = I/O Master 0 I2C data signal. - pinnum = 6 - func_sel = AM_HAL_PIN_6_M0SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 0 - -# ***************************************************************************** -# IOM1 pins. -# ***************************************************************************** -pin - name = IOM1_CS - desc = I/O Master 1 chip select. - pinnum = 14 - func_sel = AM_HAL_PIN_14_NCE14 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 1 - CEnum = 2 - CEpol = low - -pin - name = IOM1_MISO - desc = I/O Master 1 SPI MISO signal. - pinnum = 9 - func_sel = AM_HAL_PIN_9_M1MISO - IOMnum = 1 - -pin - name = IOM1_MOSI - desc = I/O Master 1 SPI MOSI signal. - pinnum = 10 - func_sel = AM_HAL_PIN_10_M1MOSI - drvstrength = 12 - IOMnum = 1 - -pin - name = IOM1_SCK - desc = I/O Master 1 SPI SCK signal. - pinnum = 8 - func_sel = AM_HAL_PIN_8_M1SCK - drvstrength = 12 - IOMnum = 1 - -pin - name = IOM1_SCL - desc = I/O Master 1 I2C clock signal. - pinnum = 8 - func_sel = AM_HAL_PIN_8_M1SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 1 - -pin - name = IOM1_SDA - desc = I/O Master 1 I2C data signal. - pinnum = 9 - func_sel = AM_HAL_PIN_9_M1SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 1 - -# ***************************************************************************** -# IOM2 pins. -# ***************************************************************************** -pin - name = IOM2_CS - desc = I/O Master 2 chip select. - pinnum = 15 - func_sel = AM_HAL_PIN_15_NCE15 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 2 - CEnum = 3 - CEpol = low - -pin - name = IOM2_MISO - desc = I/O Master 2 SPI MISO signal. - pinnum = 25 - func_sel = AM_HAL_PIN_25_M2MISO - IOMnum = 2 - -pin - name = IOM2_MOSI - desc = I/O Master 2 SPI MOSI signal. - pinnum = 28 - func_sel = AM_HAL_PIN_28_M2MOSI - drvstrength = 12 - IOMnum = 2 - -pin - name = IOM2_SCK - desc = I/O Master 2 SPI SCK signal. - pinnum = 27 - func_sel = AM_HAL_PIN_27_M2SCK - drvstrength = 12 - IOMnum = 2 - -pin - name = IOM2_SCL - desc = I/O Master 2 I2C clock signal. - pinnum = 27 - func_sel = AM_HAL_PIN_27_M2SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 2 - -pin - name = IOM2_SDA - desc = I/O Master 2 I2C data signal. - pinnum = 25 - func_sel = AM_HAL_PIN_25_M2SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 2 - -# ***************************************************************************** -# IOM3 pins. -# ***************************************************************************** -pin - name = IOM3_CS - desc = I/O Master 3 chip select. - pinnum = 12 - func_sel = AM_HAL_PIN_12_NCE12 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 3 - CEnum = 0 - CEpol = low - -pin - name = IOM3_MISO - desc = I/O Master 3 SPI MISO signal. - pinnum = 43 - func_sel = AM_HAL_PIN_43_M3MISO - IOMnum = 3 - -pin - name = IOM3_MOSI - desc = I/O Master 3 SPI MOSI signal. - pinnum = 38 - func_sel = AM_HAL_PIN_38_M3MOSI - drvstrength = 12 - IOMnum = 3 - -pin - name = IOM3_SCK - desc = I/O Master 3 SPI SCK signal. - pinnum = 42 - func_sel = AM_HAL_PIN_42_M3SCK - drvstrength = 12 - IOMnum = 3 - -pin - name = IOM3_SCL - desc = I/O Master 3 I2C clock signal. - pinnum = 42 - func_sel = AM_HAL_PIN_42_M3SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 3 - -pin - name = IOM3_SDA - desc = I/O Master 3 I2C data signal. - pinnum = 43 - func_sel = AM_HAL_PIN_43_M3SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 3 - -# ***************************************************************************** -# IOM4 pins. -# ***************************************************************************** -pin - name = IOM4_CS - desc = I/O Master 4 chip select. - pinnum = 13 - func_sel = AM_HAL_PIN_13_NCE13 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 4 - CEnum = 1 - CEpol = low - -pin - name = IOM4_MISO - desc = I/O Master 4 SPI MISO signal. - pinnum = 40 - func_sel = AM_HAL_PIN_40_M4MISO - IOMnum = 4 - -pin - name = IOM4_MOSI - desc = I/O Master 4 SPI MOSI signal. - pinnum = 44 - func_sel = AM_HAL_PIN_44_M4MOSI - drvstrength = 12 - IOMnum = 4 - -pin - name = IOM4_SCK - desc = I/O Master 4 SPI SCK signal. - pinnum = 39 - func_sel = AM_HAL_PIN_39_M4SCK - drvstrength = 12 - IOMnum = 4 - -pin - name = IOM4_SCL - desc = I/O Master 4 I2C clock signal. - pinnum = 39 - func_sel = AM_HAL_PIN_39_M4SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 4 - -pin - name = IOM4_SDA - desc = I/O Master 4 I2C data signal. - pinnum = 40 - func_sel = AM_HAL_PIN_40_M4SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 4 - -# ***************************************************************************** -# IOM5 pins. -# ***************************************************************************** -pin - name = IOM5_CS - desc = I/O Master 5 chip select. - pinnum = 16 - func_sel = AM_HAL_PIN_16_NCE16 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 5 - CEnum = 0 - CEpol = low - -pin - name = IOM5_MISO - desc = I/O Master 5 SPI MISO signal. - pinnum = 49 - func_sel = AM_HAL_PIN_49_M5MISO - IOMnum = 5 - -pin - name = IOM5_MOSI - desc = I/O Master 5 SPI MOSI signal. - pinnum = 47 - func_sel = AM_HAL_PIN_47_M5MOSI - drvstrength = 12 - IOMnum = 5 - -pin - name = IOM5_SCK - desc = I/O Master 5 SPI SCK signal. - pinnum = 48 - func_sel = AM_HAL_PIN_48_M5SCK - drvstrength = 12 - IOMnum = 5 - -pin - name = IOM5_SCL - desc = I/O Master 5 I2C clock signal. - pinnum = 48 - func_sel = AM_HAL_PIN_48_M5SCL - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 5 - -pin - name = IOM5_SDA - desc = I/O Master 5 I2C data signal. - pinnum = 49 - func_sel = AM_HAL_PIN_49_M5SDAWIR3 - GPOutcfg = opendrain - drvstrength = 12 - pullup = 1_5K - IOMnum = 5 - -# ***************************************************************************** -# MSPI pins. -# ***************************************************************************** -pin - name = MSPI_CE0 - desc = MSPI chip select. - pinnum = 19 - func_sel = AM_HAL_PIN_19_NCE19 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 6 - CEnum = 0 - CEpol = low - -pin - name = MSPI_CE1 - desc = MSPI chip select. - pinnum = 41 - func_sel = AM_HAL_PIN_41_NCE41 - drvstrength = 12 - intdir = lo2hi - GPOutcfg = pushpull - GPinput = false - IOMnum = 6 - CEnum = 1 - CEpol = low - -pin - name = MSPI_D0 - desc = MSPI data 0. - pinnum = 22 - func_sel = AM_HAL_PIN_22_MSPI0 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D1 - desc = MSPI data 1. - pinnum = 26 - func_sel = AM_HAL_PIN_26_MSPI1 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D2 - desc = MSPI data 2. - pinnum = 4 - func_sel = AM_HAL_PIN_4_MSPI2 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D3 - desc = MSPI data 3. - pinnum = 23 - func_sel = AM_HAL_PIN_23_MSPI13 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D4 - desc = MSPI data 4. - pinnum = 0 - func_sel = AM_HAL_PIN_0_MSPI4 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D5 - desc = MSPI data 5. - pinnum = 1 - func_sel = AM_HAL_PIN_1_MSPI5 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D6 - desc = MSPI data 6. - pinnum = 2 - func_sel = AM_HAL_PIN_2_MSPI6 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_D7 - desc = MSPI data 7. - pinnum = 3 - func_sel = AM_HAL_PIN_3_MSPI7 - drvstrength = 8 - intdir = lo2hi - IOMnum = 6 - -pin - name = MSPI_SCK - desc = MSPI clock. - pinnum = 24 - func_sel = AM_HAL_PIN_24_MSPI8 - drvstrength = 12 - intdir = lo2hi - IOMnum = 6 - -# ***************************************************************************** -# IOS pins. -# ***************************************************************************** -pin - name = IOS_CE - desc = I/O Slave chip select. - pinnum = 3 - func_sel = AM_HAL_PIN_3_SLnCE - GPinput = true - CEnum = 0 - CEpol = low - -pin - name = IOS_MISO - desc = I/O Slave SPI MISO signal. - pinnum = 2 - func_sel = AM_HAL_PIN_2_SLMISO - drvstrength = 12 - -pin - name = IOS_MOSI - desc = I/O Slave SPI MOSI signal. - pinnum = 1 - func_sel = AM_HAL_PIN_1_SLMOSI - GPinput = true - -pin - name = IOS_SCK - desc = I/O Slave SPI SCK signal. - pinnum = 0 - func_sel = AM_HAL_PIN_0_SLSCK - GPinput = true - -pin - name = IOS_SCL - desc = I/O Slave I2C clock signal. - pinnum = 0 - func_sel = AM_HAL_PIN_0_SLSCL - GPinput = true - -pin - name = IOS_SDA - desc = I/O Slave I2C data signal. - pinnum = 1 - func_sel = AM_HAL_PIN_1_SLSDAWIR3 - GPOutcfg = opendrain - pullup = 1_5K - -# # ***************************************************************************** -# # ITM pins. -# # ***************************************************************************** -# pin -# name = ITM_SWO -# desc = ITM Serial Wire Output. -# pinnum = 41 -# func_sel = AM_HAL_PIN_41_SWO -# drvstrength = 2 - -# ***************************************************************************** -# CORE pins. -# ***************************************************************************** -pin - name = SWDCK - desc = Cortex Serial Wire DCK. - pinnum = 20 - func_sel = AM_HAL_PIN_20_SWDCK - -pin - name = SWDIO - desc = Cortex Serial Wire DIO. - pinnum = 21 - func_sel = AM_HAL_PIN_21_SWDIO diff --git a/variants/SparkFun_RedBoard_Artemis_Nano/bsp/gcc/Makefile b/variants/SparkFun_RedBoard_Artemis_Nano/bsp/gcc/Makefile deleted file mode 100644 index fd0f93b..0000000 --- a/variants/SparkFun_RedBoard_Artemis_Nano/bsp/gcc/Makefile +++ /dev/null @@ -1,153 +0,0 @@ -#****************************************************************************** -# -# Makefile - Rules for building the libraries, examples and docs. -# -# Copyright (c) 2019, Ambiq Micro -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions are met: -# -# 1. Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# -# 3. Neither the name of the copyright holder nor the names of its -# contributors may be used to endorse or promote products derived from this -# software without specific prior written permission. -# -# Third party software included in this distribution is subject to the -# additional license terms as defined in the /docs/licenses directory. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. -# -# This is part of revision 2.1.0 of the AmbiqSuite Development Package. -# -#****************************************************************************** - -# Pull in exported paths -SDKPATH?=../../../.. -BOARDPATH?=../.. - -TARGET := libam_bsp -COMPILERNAME := gcc -PROJECT := libam_bsp_gcc -CONFIG := bin - -SHELL:=/bin/bash -#### Setup #### - -TOOLCHAIN ?= arm-none-eabi -PART = apollo3 -CPU = cortex-m4 -FPU = fpv4-sp-d16 -# Default to FPU hardware calling convention. However, some customers and/or -# applications may need the software calling convention. -#FABI = softfp -FABI = hard - -#### Required Executables #### -CC = $(TOOLCHAIN)-gcc -GCC = $(TOOLCHAIN)-gcc -CPP = $(TOOLCHAIN)-cpp -LD = $(TOOLCHAIN)-ld -CP = $(TOOLCHAIN)-objcopy -OD = $(TOOLCHAIN)-objdump -RD = $(TOOLCHAIN)-readelf -AR = $(TOOLCHAIN)-ar -SIZE = $(TOOLCHAIN)-size -RM = $(shell which rm 2>/dev/null) - -EXECUTABLES = CC LD CP OD AR RD SIZE GCC -K := $(foreach exec,$(EXECUTABLES),\ - $(if $(shell which $($(exec)) 2>/dev/null),,\ - $(info $(exec) not found on PATH ($($(exec))).)$(exec))) -$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found)) - -ifneq ($(strip $(value K)),) -all clean: - $(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.) - $(RM) -rf bin -else - -DEFINES = -DAM_PACKAGE_BGA -DEFINES+= -DAM_PART_APOLLO3 - -INCLUDES = -I$(SDKPATH)/utils -INCLUDES+= -I$(SDKPATH)/CMSIS/AmbiqMicro/Include -INCLUDES+= -I$(SDKPATH)/devices -INCLUDES+= -I$(SDKPATH)/mcu/apollo3 -INCLUDES+= -I$(SDKPATH)/CMSIS/ARM/Include - -VPATH = .. - -SRC = am_bsp.c -SRC += am_bsp_pins.c - -CSRC = $(filter %.c,$(SRC)) -ASRC = $(filter %.s,$(SRC)) - -OBJS = $(CSRC:%.c=$(CONFIG)/%.o) -OBJS+= $(ASRC:%.s=$(CONFIG)/%.o) - -DEPS = $(CSRC:%.c=$(CONFIG)/%.d) -DEPS+= $(ASRC:%.s=$(CONFIG)/%.d) - -CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI) -CFLAGS+= -ffunction-sections -fdata-sections -CFLAGS+= -MMD -MP -std=c99 -Wall -# Libraries O3 for production, examples O0 for debug. -CFLAGS+= -O3 -CFLAGS+= $(DEFINES) -CFLAGS+= $(INCLUDES) -CFLAGS+= - -# Additional user specified CFLAGS -CFLAGS+=$(EXTRA_CFLAGS) - -ODFLAGS = -S - -#### Rules #### -all: directories $(CONFIG)/$(TARGET).a - -directories: $(CONFIG) - -$(CONFIG): - @mkdir -p $@ - -$(CONFIG)/%.o: %.c $(CONFIG)/%.d $(INCS) - @echo " Compiling $(COMPILERNAME) $<" ;\ - $(CC) -c $(CFLAGS) $< -o $@ - -$(CONFIG)/%.o: %.s $(CONFIG)/%.d $(INCS) - @echo " Assembling $(COMPILERNAME) $<" ;\ - $(CC) -c $(CFLAGS) $< -o $@ - -$(CONFIG)/$(TARGET).a: $(OBJS) - @echo " Library $(COMPILERNAME) $@" ;\ - $(AR) rsvc $@ $(OBJS) - -clean: - @echo "Cleaning..." ;\ - $(RM) -f $(OBJS) $(DEPS) \ - $(CONFIG)/$(TARGET).a - -$(CONFIG)/%.d: ; - -# Automatically include any generated dependencies --include $(DEPS) -endif -.PHONY: all clean directories diff --git a/variants/SparkFun_RedBoard_Artemis_Nano/bsp/gcc/bin/libam_bsp.a b/variants/SparkFun_RedBoard_Artemis_Nano/bsp/gcc/bin/libam_bsp.a deleted file mode 100644 index e3001c7..0000000 Binary files a/variants/SparkFun_RedBoard_Artemis_Nano/bsp/gcc/bin/libam_bsp.a and /dev/null differ diff --git a/variants/SparkFun_Artemis/bsp/README.md b/variants/artemis/bsp/README.md similarity index 100% rename from variants/SparkFun_Artemis/bsp/README.md rename to variants/artemis/bsp/README.md diff --git a/variants/SparkFun_Artemis/bsp/am_bsp.c b/variants/artemis/bsp/am_bsp.c similarity index 100% rename from variants/SparkFun_Artemis/bsp/am_bsp.c rename to variants/artemis/bsp/am_bsp.c diff --git a/variants/SparkFun_Artemis/bsp/am_bsp.h b/variants/artemis/bsp/am_bsp.h similarity index 100% rename from variants/SparkFun_Artemis/bsp/am_bsp.h rename to variants/artemis/bsp/am_bsp.h diff --git a/variants/SparkFun_Artemis/bsp/am_bsp_pins.c b/variants/artemis/bsp/am_bsp_pins.c similarity index 100% rename from variants/SparkFun_Artemis/bsp/am_bsp_pins.c rename to variants/artemis/bsp/am_bsp_pins.c diff --git a/variants/SparkFun_Artemis/bsp/am_bsp_pins.h b/variants/artemis/bsp/am_bsp_pins.h similarity index 88% rename from variants/SparkFun_Artemis/bsp/am_bsp_pins.h rename to variants/artemis/bsp/am_bsp_pins.h index cd42b42..943ee27 100644 --- a/variants/SparkFun_Artemis/bsp/am_bsp_pins.h +++ b/variants/artemis/bsp/am_bsp_pins.h @@ -67,7 +67,7 @@ extern "C" // COM_UART_TX pin: This pin is the COM_UART transmit pin. // //***************************************************************************** -#define AM_BSP_GPIO_COM_UART_TX 48 +#define AM_BSP_GPIO_COM_UART_TX 48 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX; //***************************************************************************** @@ -75,7 +75,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX; // COM_UART_RX pin: This pin is the COM_UART receive pin. // //***************************************************************************** -#define AM_BSP_GPIO_COM_UART_RX 49 +#define AM_BSP_GPIO_COM_UART_RX 49 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX; //***************************************************************************** @@ -83,7 +83,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX; // IOM0_CS pin: I/O Master 0 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_CS 11 +#define AM_BSP_GPIO_IOM0_CS 11 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS; #define AM_BSP_IOM0_CS_CHNL 0 @@ -92,7 +92,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS; // IOM0_CS3 pin: I/O Master 0 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_CS3 15 +#define AM_BSP_GPIO_IOM0_CS3 15 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3; #define AM_BSP_IOM0_CS3_CHNL 3 @@ -101,7 +101,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3; // IOM0_MISO pin: I/O Master 0 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_MISO 6 +#define AM_BSP_GPIO_IOM0_MISO 6 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO; //***************************************************************************** @@ -109,7 +109,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO; // IOM0_MOSI pin: I/O Master 0 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_MOSI 7 +#define AM_BSP_GPIO_IOM0_MOSI 7 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI; //***************************************************************************** @@ -117,7 +117,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI; // IOM0_SCK pin: I/O Master 0 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_SCK 5 +#define AM_BSP_GPIO_IOM0_SCK 5 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK; //***************************************************************************** @@ -125,7 +125,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK; // IOM0_SCL pin: I/O Master 0 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_SCL 5 +#define AM_BSP_GPIO_IOM0_SCL 5 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL; //***************************************************************************** @@ -133,7 +133,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL; // IOM0_SDA pin: I/O Master 0 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_SDA 6 +#define AM_BSP_GPIO_IOM0_SDA 6 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA; //***************************************************************************** @@ -141,7 +141,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA; // IOM1_CS pin: I/O Master 1 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_CS 14 +#define AM_BSP_GPIO_IOM1_CS 14 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS; #define AM_BSP_IOM1_CS_CHNL 2 @@ -150,7 +150,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS; // IOM1_MISO pin: I/O Master 1 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_MISO 9 +#define AM_BSP_GPIO_IOM1_MISO 9 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO; //***************************************************************************** @@ -158,7 +158,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO; // IOM1_MOSI pin: I/O Master 1 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_MOSI 10 +#define AM_BSP_GPIO_IOM1_MOSI 10 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI; //***************************************************************************** @@ -166,7 +166,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI; // IOM1_SCK pin: I/O Master 1 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_SCK 8 +#define AM_BSP_GPIO_IOM1_SCK 8 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK; //***************************************************************************** @@ -174,7 +174,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK; // IOM1_SCL pin: I/O Master 1 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_SCL 8 +#define AM_BSP_GPIO_IOM1_SCL 8 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL; //***************************************************************************** @@ -182,7 +182,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL; // IOM1_SDA pin: I/O Master 1 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_SDA 9 +#define AM_BSP_GPIO_IOM1_SDA 9 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA; //***************************************************************************** @@ -190,7 +190,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA; // IOM2_CS pin: I/O Master 2 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_CS 15 +#define AM_BSP_GPIO_IOM2_CS 15 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS; #define AM_BSP_IOM2_CS_CHNL 3 @@ -199,7 +199,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS; // IOM2_MISO pin: I/O Master 2 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_MISO 25 +#define AM_BSP_GPIO_IOM2_MISO 25 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO; //***************************************************************************** @@ -207,7 +207,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO; // IOM2_MOSI pin: I/O Master 2 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_MOSI 28 +#define AM_BSP_GPIO_IOM2_MOSI 28 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI; //***************************************************************************** @@ -215,7 +215,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI; // IOM2_SCK pin: I/O Master 2 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_SCK 27 +#define AM_BSP_GPIO_IOM2_SCK 27 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK; //***************************************************************************** @@ -223,7 +223,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK; // IOM2_SCL pin: I/O Master 2 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_SCL 27 +#define AM_BSP_GPIO_IOM2_SCL 27 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL; //***************************************************************************** @@ -231,7 +231,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL; // IOM2_SDA pin: I/O Master 2 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_SDA 25 +#define AM_BSP_GPIO_IOM2_SDA 25 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA; //***************************************************************************** @@ -239,7 +239,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA; // IOM3_CS pin: I/O Master 3 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_CS 12 +#define AM_BSP_GPIO_IOM3_CS 12 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS; #define AM_BSP_IOM3_CS_CHNL 0 @@ -248,7 +248,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS; // IOM3_MISO pin: I/O Master 3 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_MISO 43 +#define AM_BSP_GPIO_IOM3_MISO 43 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO; //***************************************************************************** @@ -256,7 +256,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO; // IOM3_MOSI pin: I/O Master 3 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_MOSI 38 +#define AM_BSP_GPIO_IOM3_MOSI 38 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI; //***************************************************************************** @@ -264,7 +264,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI; // IOM3_SCK pin: I/O Master 3 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_SCK 42 +#define AM_BSP_GPIO_IOM3_SCK 42 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK; //***************************************************************************** @@ -272,7 +272,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK; // IOM3_SCL pin: I/O Master 3 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_SCL 42 +#define AM_BSP_GPIO_IOM3_SCL 42 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL; //***************************************************************************** @@ -280,7 +280,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL; // IOM3_SDA pin: I/O Master 3 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_SDA 43 +#define AM_BSP_GPIO_IOM3_SDA 43 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA; //***************************************************************************** @@ -288,7 +288,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA; // IOM4_CS pin: I/O Master 4 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_CS 13 +#define AM_BSP_GPIO_IOM4_CS 13 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS; #define AM_BSP_IOM4_CS_CHNL 1 @@ -297,7 +297,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS; // IOM4_MISO pin: I/O Master 4 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_MISO 40 +#define AM_BSP_GPIO_IOM4_MISO 40 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO; //***************************************************************************** @@ -305,7 +305,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO; // IOM4_MOSI pin: I/O Master 4 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_MOSI 44 +#define AM_BSP_GPIO_IOM4_MOSI 44 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI; //***************************************************************************** @@ -313,7 +313,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI; // IOM4_SCK pin: I/O Master 4 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_SCK 39 +#define AM_BSP_GPIO_IOM4_SCK 39 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK; //***************************************************************************** @@ -321,7 +321,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK; // IOM4_SCL pin: I/O Master 4 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_SCL 39 +#define AM_BSP_GPIO_IOM4_SCL 39 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL; //***************************************************************************** @@ -329,7 +329,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL; // IOM4_SDA pin: I/O Master 4 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_SDA 40 +#define AM_BSP_GPIO_IOM4_SDA 40 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA; //***************************************************************************** @@ -337,7 +337,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA; // IOM5_CS pin: I/O Master 5 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_CS 16 +#define AM_BSP_GPIO_IOM5_CS 16 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS; #define AM_BSP_IOM5_CS_CHNL 0 @@ -346,7 +346,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS; // IOM5_MISO pin: I/O Master 5 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_MISO 49 +#define AM_BSP_GPIO_IOM5_MISO 49 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO; //***************************************************************************** @@ -354,7 +354,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO; // IOM5_MOSI pin: I/O Master 5 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_MOSI 47 +#define AM_BSP_GPIO_IOM5_MOSI 47 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI; //***************************************************************************** @@ -362,7 +362,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI; // IOM5_SCK pin: I/O Master 5 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_SCK 48 +#define AM_BSP_GPIO_IOM5_SCK 48 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK; //***************************************************************************** @@ -370,7 +370,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK; // IOM5_SCL pin: I/O Master 5 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_SCL 48 +#define AM_BSP_GPIO_IOM5_SCL 48 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL; //***************************************************************************** @@ -378,7 +378,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL; // IOM5_SDA pin: I/O Master 5 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_SDA 49 +#define AM_BSP_GPIO_IOM5_SDA 49 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA; //***************************************************************************** @@ -386,7 +386,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA; // MSPI_CE0 pin: MSPI chip select. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_CE0 19 +#define AM_BSP_GPIO_MSPI_CE0 19 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0; #define AM_BSP_MSPI_CE0_CHNL 0 @@ -395,7 +395,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0; // MSPI_CE1 pin: MSPI chip select. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_CE1 41 +#define AM_BSP_GPIO_MSPI_CE1 41 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1; #define AM_BSP_MSPI_CE1_CHNL 1 @@ -404,7 +404,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1; // MSPI_D0 pin: MSPI data 0. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D0 22 +#define AM_BSP_GPIO_MSPI_D0 22 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0; //***************************************************************************** @@ -412,7 +412,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0; // MSPI_D1 pin: MSPI data 1. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D1 26 +#define AM_BSP_GPIO_MSPI_D1 26 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1; //***************************************************************************** @@ -420,7 +420,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1; // MSPI_D2 pin: MSPI data 2. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D2 4 +#define AM_BSP_GPIO_MSPI_D2 4 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2; //***************************************************************************** @@ -428,7 +428,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2; // MSPI_D3 pin: MSPI data 3. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D3 23 +#define AM_BSP_GPIO_MSPI_D3 23 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3; //***************************************************************************** @@ -436,7 +436,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3; // MSPI_D4 pin: MSPI data 4. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D4 0 +#define AM_BSP_GPIO_MSPI_D4 0 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4; //***************************************************************************** @@ -444,7 +444,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4; // MSPI_D5 pin: MSPI data 5. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D5 1 +#define AM_BSP_GPIO_MSPI_D5 1 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5; //***************************************************************************** @@ -452,7 +452,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5; // MSPI_D6 pin: MSPI data 6. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D6 2 +#define AM_BSP_GPIO_MSPI_D6 2 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6; //***************************************************************************** @@ -460,7 +460,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6; // MSPI_D7 pin: MSPI data 7. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D7 3 +#define AM_BSP_GPIO_MSPI_D7 3 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7; //***************************************************************************** @@ -468,7 +468,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7; // MSPI_SCK pin: MSPI clock. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_SCK 24 +#define AM_BSP_GPIO_MSPI_SCK 24 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK; //***************************************************************************** @@ -476,7 +476,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK; // IOS_CE pin: I/O Slave chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_CE 3 +#define AM_BSP_GPIO_IOS_CE 3 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE; #define AM_BSP_IOS_CE_CHNL 0 @@ -485,7 +485,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE; // IOS_MISO pin: I/O Slave SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_MISO 2 +#define AM_BSP_GPIO_IOS_MISO 2 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO; //***************************************************************************** @@ -493,7 +493,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO; // IOS_MOSI pin: I/O Slave SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_MOSI 1 +#define AM_BSP_GPIO_IOS_MOSI 1 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI; //***************************************************************************** @@ -501,7 +501,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI; // IOS_SCK pin: I/O Slave SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_SCK 0 +#define AM_BSP_GPIO_IOS_SCK 0 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK; //***************************************************************************** @@ -509,7 +509,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK; // IOS_SCL pin: I/O Slave I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_SCL 0 +#define AM_BSP_GPIO_IOS_SCL 0 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL; //***************************************************************************** @@ -517,7 +517,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL; // IOS_SDA pin: I/O Slave I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_SDA 1 +#define AM_BSP_GPIO_IOS_SDA 1 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA; //***************************************************************************** @@ -525,7 +525,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA; // SWDCK pin: Cortex Serial Wire DCK. // //***************************************************************************** -#define AM_BSP_GPIO_SWDCK 20 +#define AM_BSP_GPIO_SWDCK 20 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK; //***************************************************************************** @@ -533,7 +533,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK; // SWDIO pin: Cortex Serial Wire DIO. // //***************************************************************************** -#define AM_BSP_GPIO_SWDIO 21 +#define AM_BSP_GPIO_SWDIO 21 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDIO; diff --git a/variants/SparkFun_Artemis/config/variant.cpp b/variants/artemis/config/variant.cpp similarity index 100% rename from variants/SparkFun_Artemis/config/variant.cpp rename to variants/artemis/config/variant.cpp diff --git a/variants/SparkFun_Artemis/config/variant.h b/variants/artemis/config/variant.h similarity index 100% rename from variants/SparkFun_Artemis/config/variant.h rename to variants/artemis/config/variant.h diff --git a/variants/SparkFun_Artemis/linker_scripts/gcc/ambiq_sbl_app.ld b/variants/artemis/linker_scripts/gcc/ambiq_sbl_app.ld similarity index 100% rename from variants/SparkFun_Artemis/linker_scripts/gcc/ambiq_sbl_app.ld rename to variants/artemis/linker_scripts/gcc/ambiq_sbl_app.ld diff --git a/variants/SparkFun_Artemis/linker_scripts/gcc/artemis_sbl_svl_app.ld b/variants/artemis/linker_scripts/gcc/artemis_sbl_svl_app.ld similarity index 100% rename from variants/SparkFun_Artemis/linker_scripts/gcc/artemis_sbl_svl_app.ld rename to variants/artemis/linker_scripts/gcc/artemis_sbl_svl_app.ld diff --git a/variants/SparkFun_Artemis/startup/startup_gcc.c b/variants/artemis/startup/startup_gcc.c similarity index 100% rename from variants/SparkFun_Artemis/startup/startup_gcc.c rename to variants/artemis/startup/startup_gcc.c diff --git a/variants/SparkFun_Artemis_Thing_Plus/bsp/README.md b/variants/artemis_thing_plus/bsp/README.md similarity index 100% rename from variants/SparkFun_Artemis_Thing_Plus/bsp/README.md rename to variants/artemis_thing_plus/bsp/README.md diff --git a/variants/SparkFun_Artemis_Thing_Plus/bsp/am_bsp.c b/variants/artemis_thing_plus/bsp/am_bsp.c similarity index 100% rename from variants/SparkFun_Artemis_Thing_Plus/bsp/am_bsp.c rename to variants/artemis_thing_plus/bsp/am_bsp.c diff --git a/variants/SparkFun_Artemis_Thing_Plus/bsp/am_bsp.h b/variants/artemis_thing_plus/bsp/am_bsp.h similarity index 100% rename from variants/SparkFun_Artemis_Thing_Plus/bsp/am_bsp.h rename to variants/artemis_thing_plus/bsp/am_bsp.h diff --git a/variants/SparkFun_Artemis_Thing_Plus/bsp/am_bsp_pins.c b/variants/artemis_thing_plus/bsp/am_bsp_pins.c similarity index 100% rename from variants/SparkFun_Artemis_Thing_Plus/bsp/am_bsp_pins.c rename to variants/artemis_thing_plus/bsp/am_bsp_pins.c diff --git a/variants/SparkFun_Artemis_Thing_Plus/bsp/am_bsp_pins.h b/variants/artemis_thing_plus/bsp/am_bsp_pins.h similarity index 88% rename from variants/SparkFun_Artemis_Thing_Plus/bsp/am_bsp_pins.h rename to variants/artemis_thing_plus/bsp/am_bsp_pins.h index 5604770..633d6ab 100644 --- a/variants/SparkFun_Artemis_Thing_Plus/bsp/am_bsp_pins.h +++ b/variants/artemis_thing_plus/bsp/am_bsp_pins.h @@ -67,7 +67,7 @@ extern "C" // MIC_DATA pin: Data line for PDM microphones. // //***************************************************************************** -#define AM_BSP_GPIO_MIC_DATA 36 +#define AM_BSP_GPIO_MIC_DATA 36 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_DATA; //***************************************************************************** @@ -75,7 +75,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_DATA; // MIC_CLK pin: Clock line for PDM microphones. // //***************************************************************************** -#define AM_BSP_GPIO_MIC_CLK 37 +#define AM_BSP_GPIO_MIC_CLK 37 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_CLK; //***************************************************************************** @@ -83,7 +83,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_CLK; // LED_BLUE pin: The BLUE LED. // //***************************************************************************** -#define AM_BSP_GPIO_LED_BLUE 26 +#define AM_BSP_GPIO_LED_BLUE 26 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_BLUE; //***************************************************************************** @@ -91,7 +91,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_BLUE; // COM_UART_TX pin: This pin is the COM_UART transmit pin. // //***************************************************************************** -#define AM_BSP_GPIO_COM_UART_TX 48 +#define AM_BSP_GPIO_COM_UART_TX 48 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX; //***************************************************************************** @@ -99,7 +99,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX; // COM_UART_RX pin: This pin is the COM_UART receive pin. // //***************************************************************************** -#define AM_BSP_GPIO_COM_UART_RX 49 +#define AM_BSP_GPIO_COM_UART_RX 49 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX; //***************************************************************************** @@ -107,7 +107,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX; // IOM0_CS pin: I/O Master 0 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_CS 11 +#define AM_BSP_GPIO_IOM0_CS 11 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS; #define AM_BSP_IOM0_CS_CHNL 0 @@ -116,7 +116,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS; // IOM0_CS3 pin: I/O Master 0 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_CS3 15 +#define AM_BSP_GPIO_IOM0_CS3 15 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3; #define AM_BSP_IOM0_CS3_CHNL 3 @@ -125,7 +125,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3; // IOM0_MISO pin: I/O Master 0 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_MISO 6 +#define AM_BSP_GPIO_IOM0_MISO 6 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO; //***************************************************************************** @@ -133,7 +133,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO; // IOM0_MOSI pin: I/O Master 0 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_MOSI 7 +#define AM_BSP_GPIO_IOM0_MOSI 7 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI; //***************************************************************************** @@ -141,7 +141,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI; // IOM0_SCK pin: I/O Master 0 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_SCK 5 +#define AM_BSP_GPIO_IOM0_SCK 5 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK; //***************************************************************************** @@ -149,7 +149,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK; // IOM0_SCL pin: I/O Master 0 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_SCL 5 +#define AM_BSP_GPIO_IOM0_SCL 5 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL; //***************************************************************************** @@ -157,7 +157,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL; // IOM0_SDA pin: I/O Master 0 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_SDA 6 +#define AM_BSP_GPIO_IOM0_SDA 6 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA; //***************************************************************************** @@ -165,7 +165,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA; // IOM1_CS pin: I/O Master 1 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_CS 14 +#define AM_BSP_GPIO_IOM1_CS 14 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS; #define AM_BSP_IOM1_CS_CHNL 2 @@ -174,7 +174,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS; // IOM1_MISO pin: I/O Master 1 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_MISO 9 +#define AM_BSP_GPIO_IOM1_MISO 9 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO; //***************************************************************************** @@ -182,7 +182,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO; // IOM1_MOSI pin: I/O Master 1 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_MOSI 10 +#define AM_BSP_GPIO_IOM1_MOSI 10 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI; //***************************************************************************** @@ -190,7 +190,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI; // IOM1_SCK pin: I/O Master 1 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_SCK 8 +#define AM_BSP_GPIO_IOM1_SCK 8 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK; //***************************************************************************** @@ -198,7 +198,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK; // IOM1_SCL pin: I/O Master 1 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_SCL 8 +#define AM_BSP_GPIO_IOM1_SCL 8 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL; //***************************************************************************** @@ -206,7 +206,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL; // IOM1_SDA pin: I/O Master 1 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_SDA 9 +#define AM_BSP_GPIO_IOM1_SDA 9 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA; //***************************************************************************** @@ -214,7 +214,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA; // IOM2_CS pin: I/O Master 2 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_CS 15 +#define AM_BSP_GPIO_IOM2_CS 15 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS; #define AM_BSP_IOM2_CS_CHNL 3 @@ -223,7 +223,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS; // IOM2_MISO pin: I/O Master 2 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_MISO 25 +#define AM_BSP_GPIO_IOM2_MISO 25 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO; //***************************************************************************** @@ -231,7 +231,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO; // IOM2_MOSI pin: I/O Master 2 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_MOSI 28 +#define AM_BSP_GPIO_IOM2_MOSI 28 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI; //***************************************************************************** @@ -239,7 +239,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI; // IOM2_SCK pin: I/O Master 2 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_SCK 27 +#define AM_BSP_GPIO_IOM2_SCK 27 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK; //***************************************************************************** @@ -247,7 +247,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK; // IOM2_SCL pin: I/O Master 2 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_SCL 27 +#define AM_BSP_GPIO_IOM2_SCL 27 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL; //***************************************************************************** @@ -255,7 +255,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL; // IOM2_SDA pin: I/O Master 2 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_SDA 25 +#define AM_BSP_GPIO_IOM2_SDA 25 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA; //***************************************************************************** @@ -263,7 +263,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA; // IOM3_CS pin: I/O Master 3 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_CS 12 +#define AM_BSP_GPIO_IOM3_CS 12 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS; #define AM_BSP_IOM3_CS_CHNL 0 @@ -272,7 +272,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS; // IOM3_MISO pin: I/O Master 3 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_MISO 43 +#define AM_BSP_GPIO_IOM3_MISO 43 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO; //***************************************************************************** @@ -280,7 +280,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO; // IOM3_MOSI pin: I/O Master 3 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_MOSI 38 +#define AM_BSP_GPIO_IOM3_MOSI 38 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI; //***************************************************************************** @@ -288,7 +288,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI; // IOM3_SCK pin: I/O Master 3 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_SCK 42 +#define AM_BSP_GPIO_IOM3_SCK 42 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK; //***************************************************************************** @@ -296,7 +296,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK; // IOM3_SCL pin: I/O Master 3 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_SCL 42 +#define AM_BSP_GPIO_IOM3_SCL 42 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL; //***************************************************************************** @@ -304,7 +304,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL; // IOM3_SDA pin: I/O Master 3 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_SDA 43 +#define AM_BSP_GPIO_IOM3_SDA 43 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA; //***************************************************************************** @@ -312,7 +312,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA; // IOM4_CS pin: I/O Master 4 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_CS 13 +#define AM_BSP_GPIO_IOM4_CS 13 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS; #define AM_BSP_IOM4_CS_CHNL 1 @@ -321,7 +321,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS; // IOM4_MISO pin: I/O Master 4 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_MISO 40 +#define AM_BSP_GPIO_IOM4_MISO 40 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO; //***************************************************************************** @@ -329,7 +329,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO; // IOM4_MOSI pin: I/O Master 4 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_MOSI 44 +#define AM_BSP_GPIO_IOM4_MOSI 44 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI; //***************************************************************************** @@ -337,7 +337,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI; // IOM4_SCK pin: I/O Master 4 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_SCK 39 +#define AM_BSP_GPIO_IOM4_SCK 39 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK; //***************************************************************************** @@ -345,7 +345,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK; // IOM4_SCL pin: I/O Master 4 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_SCL 39 +#define AM_BSP_GPIO_IOM4_SCL 39 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL; //***************************************************************************** @@ -353,7 +353,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL; // IOM4_SDA pin: I/O Master 4 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_SDA 40 +#define AM_BSP_GPIO_IOM4_SDA 40 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA; //***************************************************************************** @@ -361,7 +361,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA; // IOM5_CS pin: I/O Master 5 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_CS 16 +#define AM_BSP_GPIO_IOM5_CS 16 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS; #define AM_BSP_IOM5_CS_CHNL 0 @@ -370,7 +370,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS; // IOM5_MISO pin: I/O Master 5 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_MISO 49 +#define AM_BSP_GPIO_IOM5_MISO 49 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO; //***************************************************************************** @@ -378,7 +378,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO; // IOM5_MOSI pin: I/O Master 5 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_MOSI 47 +#define AM_BSP_GPIO_IOM5_MOSI 47 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI; //***************************************************************************** @@ -386,7 +386,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI; // IOM5_SCK pin: I/O Master 5 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_SCK 48 +#define AM_BSP_GPIO_IOM5_SCK 48 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK; //***************************************************************************** @@ -394,7 +394,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK; // IOM5_SCL pin: I/O Master 5 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_SCL 48 +#define AM_BSP_GPIO_IOM5_SCL 48 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL; //***************************************************************************** @@ -402,7 +402,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL; // IOM5_SDA pin: I/O Master 5 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_SDA 49 +#define AM_BSP_GPIO_IOM5_SDA 49 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA; //***************************************************************************** @@ -410,7 +410,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA; // MSPI_CE0 pin: MSPI chip select. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_CE0 19 +#define AM_BSP_GPIO_MSPI_CE0 19 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0; #define AM_BSP_MSPI_CE0_CHNL 0 @@ -419,7 +419,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0; // MSPI_CE1 pin: MSPI chip select. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_CE1 41 +#define AM_BSP_GPIO_MSPI_CE1 41 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1; #define AM_BSP_MSPI_CE1_CHNL 1 @@ -428,7 +428,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1; // MSPI_D0 pin: MSPI data 0. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D0 22 +#define AM_BSP_GPIO_MSPI_D0 22 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0; //***************************************************************************** @@ -436,7 +436,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0; // MSPI_D1 pin: MSPI data 1. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D1 26 +#define AM_BSP_GPIO_MSPI_D1 26 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1; //***************************************************************************** @@ -444,7 +444,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1; // MSPI_D2 pin: MSPI data 2. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D2 4 +#define AM_BSP_GPIO_MSPI_D2 4 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2; //***************************************************************************** @@ -452,7 +452,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2; // MSPI_D3 pin: MSPI data 3. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D3 23 +#define AM_BSP_GPIO_MSPI_D3 23 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3; //***************************************************************************** @@ -460,7 +460,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3; // MSPI_D4 pin: MSPI data 4. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D4 0 +#define AM_BSP_GPIO_MSPI_D4 0 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4; //***************************************************************************** @@ -468,7 +468,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4; // MSPI_D5 pin: MSPI data 5. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D5 1 +#define AM_BSP_GPIO_MSPI_D5 1 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5; //***************************************************************************** @@ -476,7 +476,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5; // MSPI_D6 pin: MSPI data 6. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D6 2 +#define AM_BSP_GPIO_MSPI_D6 2 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6; //***************************************************************************** @@ -484,7 +484,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6; // MSPI_D7 pin: MSPI data 7. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D7 3 +#define AM_BSP_GPIO_MSPI_D7 3 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7; //***************************************************************************** @@ -492,7 +492,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7; // MSPI_SCK pin: MSPI clock. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_SCK 24 +#define AM_BSP_GPIO_MSPI_SCK 24 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK; //***************************************************************************** @@ -500,7 +500,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK; // IOS_CE pin: I/O Slave chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_CE 3 +#define AM_BSP_GPIO_IOS_CE 3 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE; #define AM_BSP_IOS_CE_CHNL 0 @@ -509,7 +509,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE; // IOS_MISO pin: I/O Slave SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_MISO 2 +#define AM_BSP_GPIO_IOS_MISO 2 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO; //***************************************************************************** @@ -517,7 +517,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO; // IOS_MOSI pin: I/O Slave SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_MOSI 1 +#define AM_BSP_GPIO_IOS_MOSI 1 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI; //***************************************************************************** @@ -525,7 +525,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI; // IOS_SCK pin: I/O Slave SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_SCK 0 +#define AM_BSP_GPIO_IOS_SCK 0 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK; //***************************************************************************** @@ -533,7 +533,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK; // IOS_SCL pin: I/O Slave I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_SCL 0 +#define AM_BSP_GPIO_IOS_SCL 0 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL; //***************************************************************************** @@ -541,7 +541,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL; // IOS_SDA pin: I/O Slave I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_SDA 1 +#define AM_BSP_GPIO_IOS_SDA 1 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA; //***************************************************************************** @@ -549,7 +549,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA; // SWDCK pin: Cortex Serial Wire DCK. // //***************************************************************************** -#define AM_BSP_GPIO_SWDCK 20 +#define AM_BSP_GPIO_SWDCK 20 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK; //***************************************************************************** @@ -557,7 +557,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK; // SWDIO pin: Cortex Serial Wire DIO. // //***************************************************************************** -#define AM_BSP_GPIO_SWDIO 21 +#define AM_BSP_GPIO_SWDIO 21 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDIO; diff --git a/variants/SparkFun_Artemis_Thing_Plus/config/variant.cpp b/variants/artemis_thing_plus/config/variant.cpp similarity index 100% rename from variants/SparkFun_Artemis_Thing_Plus/config/variant.cpp rename to variants/artemis_thing_plus/config/variant.cpp diff --git a/variants/SparkFun_Artemis_Thing_Plus/config/variant.h b/variants/artemis_thing_plus/config/variant.h similarity index 100% rename from variants/SparkFun_Artemis_Thing_Plus/config/variant.h rename to variants/artemis_thing_plus/config/variant.h diff --git a/variants/SparkFun_Artemis_Thing_Plus/linker_scripts/gcc/ambiq_sbl_app.ld b/variants/artemis_thing_plus/linker_scripts/gcc/ambiq_sbl_app.ld similarity index 100% rename from variants/SparkFun_Artemis_Thing_Plus/linker_scripts/gcc/ambiq_sbl_app.ld rename to variants/artemis_thing_plus/linker_scripts/gcc/ambiq_sbl_app.ld diff --git a/variants/SparkFun_Artemis_Thing_Plus/linker_scripts/gcc/artemis_sbl_svl_app.ld b/variants/artemis_thing_plus/linker_scripts/gcc/artemis_sbl_svl_app.ld similarity index 100% rename from variants/SparkFun_Artemis_Thing_Plus/linker_scripts/gcc/artemis_sbl_svl_app.ld rename to variants/artemis_thing_plus/linker_scripts/gcc/artemis_sbl_svl_app.ld diff --git a/variants/SparkFun_Artemis_Thing_Plus/startup/startup_gcc.c b/variants/artemis_thing_plus/startup/startup_gcc.c similarity index 100% rename from variants/SparkFun_Artemis_Thing_Plus/startup/startup_gcc.c rename to variants/artemis_thing_plus/startup/startup_gcc.c diff --git a/variants/SparkFun_Edge/bsp/README.md b/variants/edge/bsp/README.md similarity index 100% rename from variants/SparkFun_Edge/bsp/README.md rename to variants/edge/bsp/README.md diff --git a/variants/SparkFun_Edge/bsp/am_bsp.c b/variants/edge/bsp/am_bsp.c similarity index 100% rename from variants/SparkFun_Edge/bsp/am_bsp.c rename to variants/edge/bsp/am_bsp.c diff --git a/variants/SparkFun_Edge/bsp/am_bsp.h b/variants/edge/bsp/am_bsp.h similarity index 100% rename from variants/SparkFun_Edge/bsp/am_bsp.h rename to variants/edge/bsp/am_bsp.h diff --git a/variants/SparkFun_Edge/bsp/am_bsp_pins.c b/variants/edge/bsp/am_bsp_pins.c similarity index 100% rename from variants/SparkFun_Edge/bsp/am_bsp_pins.c rename to variants/edge/bsp/am_bsp_pins.c diff --git a/variants/SparkFun_Edge/bsp/am_bsp_pins.h b/variants/edge/bsp/am_bsp_pins.h similarity index 87% rename from variants/SparkFun_Edge/bsp/am_bsp_pins.h rename to variants/edge/bsp/am_bsp_pins.h index 1b52a5c..23dc7e0 100644 --- a/variants/SparkFun_Edge/bsp/am_bsp_pins.h +++ b/variants/edge/bsp/am_bsp_pins.h @@ -67,7 +67,7 @@ extern "C" // CAMERA_HM01B0_D0 pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_D0 24 +#define AM_BSP_GPIO_CAMERA_HM01B0_D0 24 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D0; //***************************************************************************** @@ -75,7 +75,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D0; // CAMERA_HM01B0_D1 pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_D1 25 +#define AM_BSP_GPIO_CAMERA_HM01B0_D1 25 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D1; //***************************************************************************** @@ -83,7 +83,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D1; // CAMERA_HM01B0_D2 pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_D2 26 +#define AM_BSP_GPIO_CAMERA_HM01B0_D2 26 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D2; //***************************************************************************** @@ -91,7 +91,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D2; // CAMERA_HM01B0_D3 pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_D3 27 +#define AM_BSP_GPIO_CAMERA_HM01B0_D3 27 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D3; //***************************************************************************** @@ -99,7 +99,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D3; // CAMERA_HM01B0_D4 pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_D4 28 +#define AM_BSP_GPIO_CAMERA_HM01B0_D4 28 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D4; //***************************************************************************** @@ -107,7 +107,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D4; // CAMERA_HM01B0_D5 pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_D5 5 +#define AM_BSP_GPIO_CAMERA_HM01B0_D5 5 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D5; //***************************************************************************** @@ -115,7 +115,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D5; // CAMERA_HM01B0_D6 pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_D6 6 +#define AM_BSP_GPIO_CAMERA_HM01B0_D6 6 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D6; //***************************************************************************** @@ -123,7 +123,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D6; // CAMERA_HM01B0_D7 pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_D7 7 +#define AM_BSP_GPIO_CAMERA_HM01B0_D7 7 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D7; //***************************************************************************** @@ -131,7 +131,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D7; // CAMERA_HM01B0_VSYNC pin: Also called FVLD on the HM01B0 module. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_VSYNC 15 +#define AM_BSP_GPIO_CAMERA_HM01B0_VSYNC 15 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_VSYNC; //***************************************************************************** @@ -139,7 +139,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_VSYNC; // CAMERA_HM01B0_HSYNC pin: Also called LVLD on the HM01B0 module. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_HSYNC 22 +#define AM_BSP_GPIO_CAMERA_HM01B0_HSYNC 22 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_HSYNC; //***************************************************************************** @@ -147,7 +147,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_HSYNC; // CAMERA_HM01B0_PCLK pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_PCLK 23 +#define AM_BSP_GPIO_CAMERA_HM01B0_PCLK 23 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_PCLK; //***************************************************************************** @@ -155,7 +155,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_PCLK; // CAMERA_HM01B0_TRIG pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_TRIG 12 +#define AM_BSP_GPIO_CAMERA_HM01B0_TRIG 12 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_TRIG; //***************************************************************************** @@ -163,7 +163,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_TRIG; // CAMERA_HM01B0_INT pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_INT 4 +#define AM_BSP_GPIO_CAMERA_HM01B0_INT 4 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_INT; //***************************************************************************** @@ -171,7 +171,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_INT; // CAMERA_HM01B0_DVDDEN pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_DVDDEN 10 +#define AM_BSP_GPIO_CAMERA_HM01B0_DVDDEN 10 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_DVDDEN; //***************************************************************************** @@ -179,7 +179,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_DVDDEN; // MIC0 pin: Analog microphone near camera connector. // //***************************************************************************** -#define AM_BSP_GPIO_MIC0 11 +#define AM_BSP_GPIO_MIC0 11 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC0; //***************************************************************************** @@ -187,7 +187,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC0; // MIC1 pin: Analog microphone near LEDs. // //***************************************************************************** -#define AM_BSP_GPIO_MIC1 29 +#define AM_BSP_GPIO_MIC1 29 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC1; //***************************************************************************** @@ -195,7 +195,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC1; // BUTTON14 pin: Labeled 14 on the SparkFun Edge. // //***************************************************************************** -#define AM_BSP_GPIO_BUTTON14 14 +#define AM_BSP_GPIO_BUTTON14 14 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_BUTTON14; //***************************************************************************** @@ -203,7 +203,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_BUTTON14; // LED_RED pin: The RED LED labelled 46. // //***************************************************************************** -#define AM_BSP_GPIO_LED_RED 46 +#define AM_BSP_GPIO_LED_RED 46 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_RED; //***************************************************************************** @@ -211,7 +211,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_RED; // LED_BLUE pin: The BLUE LED labelled 37. // //***************************************************************************** -#define AM_BSP_GPIO_LED_BLUE 37 +#define AM_BSP_GPIO_LED_BLUE 37 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_BLUE; //***************************************************************************** @@ -219,7 +219,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_BLUE; // LED_GREEN pin: The GREEN LED labelled 44. // //***************************************************************************** -#define AM_BSP_GPIO_LED_GREEN 44 +#define AM_BSP_GPIO_LED_GREEN 44 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_GREEN; //***************************************************************************** @@ -227,7 +227,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_GREEN; // LED_YELLOW pin: The YELLOW LED labelled 47. // //***************************************************************************** -#define AM_BSP_GPIO_LED_YELLOW 47 +#define AM_BSP_GPIO_LED_YELLOW 47 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_YELLOW; //***************************************************************************** @@ -235,7 +235,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_YELLOW; // COM_UART_TX pin: This pin is the COM_UART transmit pin. // //***************************************************************************** -#define AM_BSP_GPIO_COM_UART_TX 48 +#define AM_BSP_GPIO_COM_UART_TX 48 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX; //***************************************************************************** @@ -243,7 +243,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX; // COM_UART_RX pin: This pin is the COM_UART receive pin. // //***************************************************************************** -#define AM_BSP_GPIO_COM_UART_RX 49 +#define AM_BSP_GPIO_COM_UART_RX 49 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX; //***************************************************************************** @@ -251,7 +251,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX; // IOM0_CS pin: I/O Master 0 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_CS 11 +#define AM_BSP_GPIO_IOM0_CS 11 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS; #define AM_BSP_IOM0_CS_CHNL 0 @@ -260,7 +260,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS; // IOM0_CS3 pin: I/O Master 0 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_CS3 15 +#define AM_BSP_GPIO_IOM0_CS3 15 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3; #define AM_BSP_IOM0_CS3_CHNL 3 @@ -269,7 +269,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3; // IOM0_MISO pin: I/O Master 0 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_MISO 6 +#define AM_BSP_GPIO_IOM0_MISO 6 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO; //***************************************************************************** @@ -277,7 +277,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO; // IOM0_MOSI pin: I/O Master 0 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_MOSI 7 +#define AM_BSP_GPIO_IOM0_MOSI 7 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI; //***************************************************************************** @@ -285,7 +285,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI; // IOM0_SCK pin: I/O Master 0 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_SCK 5 +#define AM_BSP_GPIO_IOM0_SCK 5 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK; //***************************************************************************** @@ -293,7 +293,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK; // IOM0_SCL pin: I/O Master 0 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_SCL 5 +#define AM_BSP_GPIO_IOM0_SCL 5 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL; //***************************************************************************** @@ -301,7 +301,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL; // IOM0_SDA pin: I/O Master 0 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_SDA 6 +#define AM_BSP_GPIO_IOM0_SDA 6 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA; //***************************************************************************** @@ -309,7 +309,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA; // IOM1_CS pin: I/O Master 1 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_CS 14 +#define AM_BSP_GPIO_IOM1_CS 14 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS; #define AM_BSP_IOM1_CS_CHNL 2 @@ -318,7 +318,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS; // IOM1_MISO pin: I/O Master 1 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_MISO 9 +#define AM_BSP_GPIO_IOM1_MISO 9 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO; //***************************************************************************** @@ -326,7 +326,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO; // IOM1_MOSI pin: I/O Master 1 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_MOSI 10 +#define AM_BSP_GPIO_IOM1_MOSI 10 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI; //***************************************************************************** @@ -334,7 +334,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI; // IOM1_SCK pin: I/O Master 1 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_SCK 8 +#define AM_BSP_GPIO_IOM1_SCK 8 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK; //***************************************************************************** @@ -342,7 +342,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK; // IOM1_SCL pin: I/O Master 1 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_SCL 8 +#define AM_BSP_GPIO_IOM1_SCL 8 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL; //***************************************************************************** @@ -350,7 +350,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL; // IOM1_SDA pin: I/O Master 1 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_SDA 9 +#define AM_BSP_GPIO_IOM1_SDA 9 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA; //***************************************************************************** @@ -358,7 +358,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA; // IOM2_CS pin: I/O Master 2 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_CS 15 +#define AM_BSP_GPIO_IOM2_CS 15 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS; #define AM_BSP_IOM2_CS_CHNL 3 @@ -367,7 +367,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS; // IOM2_MISO pin: I/O Master 2 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_MISO 25 +#define AM_BSP_GPIO_IOM2_MISO 25 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO; //***************************************************************************** @@ -375,7 +375,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO; // IOM2_MOSI pin: I/O Master 2 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_MOSI 28 +#define AM_BSP_GPIO_IOM2_MOSI 28 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI; //***************************************************************************** @@ -383,7 +383,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI; // IOM2_SCK pin: I/O Master 2 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_SCK 27 +#define AM_BSP_GPIO_IOM2_SCK 27 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK; //***************************************************************************** @@ -391,7 +391,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK; // IOM2_SCL pin: I/O Master 2 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_SCL 27 +#define AM_BSP_GPIO_IOM2_SCL 27 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL; //***************************************************************************** @@ -399,7 +399,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL; // IOM2_SDA pin: I/O Master 2 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_SDA 25 +#define AM_BSP_GPIO_IOM2_SDA 25 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA; //***************************************************************************** @@ -407,7 +407,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA; // IOM3_CS pin: I/O Master 3 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_CS 12 +#define AM_BSP_GPIO_IOM3_CS 12 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS; #define AM_BSP_IOM3_CS_CHNL 0 @@ -416,7 +416,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS; // IOM3_MISO pin: I/O Master 3 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_MISO 43 +#define AM_BSP_GPIO_IOM3_MISO 43 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO; //***************************************************************************** @@ -424,7 +424,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO; // IOM3_MOSI pin: I/O Master 3 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_MOSI 38 +#define AM_BSP_GPIO_IOM3_MOSI 38 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI; //***************************************************************************** @@ -432,7 +432,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI; // IOM3_SCK pin: I/O Master 3 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_SCK 42 +#define AM_BSP_GPIO_IOM3_SCK 42 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK; //***************************************************************************** @@ -440,7 +440,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK; // IOM3_SCL pin: I/O Master 3 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_SCL 42 +#define AM_BSP_GPIO_IOM3_SCL 42 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL; //***************************************************************************** @@ -448,7 +448,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL; // IOM3_SDA pin: I/O Master 3 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_SDA 43 +#define AM_BSP_GPIO_IOM3_SDA 43 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA; //***************************************************************************** @@ -456,7 +456,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA; // IOM4_CS pin: I/O Master 4 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_CS 13 +#define AM_BSP_GPIO_IOM4_CS 13 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS; #define AM_BSP_IOM4_CS_CHNL 1 @@ -465,7 +465,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS; // IOM4_MISO pin: I/O Master 4 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_MISO 40 +#define AM_BSP_GPIO_IOM4_MISO 40 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO; //***************************************************************************** @@ -473,7 +473,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO; // IOM4_MOSI pin: I/O Master 4 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_MOSI 44 +#define AM_BSP_GPIO_IOM4_MOSI 44 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI; //***************************************************************************** @@ -481,7 +481,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI; // IOM4_SCK pin: I/O Master 4 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_SCK 39 +#define AM_BSP_GPIO_IOM4_SCK 39 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK; //***************************************************************************** @@ -489,7 +489,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK; // IOM4_SCL pin: I/O Master 4 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_SCL 39 +#define AM_BSP_GPIO_IOM4_SCL 39 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL; //***************************************************************************** @@ -497,7 +497,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL; // IOM4_SDA pin: I/O Master 4 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_SDA 40 +#define AM_BSP_GPIO_IOM4_SDA 40 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA; //***************************************************************************** @@ -505,7 +505,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA; // IOM5_CS pin: I/O Master 5 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_CS 16 +#define AM_BSP_GPIO_IOM5_CS 16 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS; #define AM_BSP_IOM5_CS_CHNL 0 @@ -514,7 +514,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS; // IOM5_MISO pin: I/O Master 5 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_MISO 49 +#define AM_BSP_GPIO_IOM5_MISO 49 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO; //***************************************************************************** @@ -522,7 +522,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO; // IOM5_MOSI pin: I/O Master 5 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_MOSI 47 +#define AM_BSP_GPIO_IOM5_MOSI 47 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI; //***************************************************************************** @@ -530,7 +530,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI; // IOM5_SCK pin: I/O Master 5 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_SCK 48 +#define AM_BSP_GPIO_IOM5_SCK 48 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK; //***************************************************************************** @@ -538,7 +538,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK; // IOM5_SCL pin: I/O Master 5 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_SCL 48 +#define AM_BSP_GPIO_IOM5_SCL 48 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL; //***************************************************************************** @@ -546,7 +546,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL; // IOM5_SDA pin: I/O Master 5 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_SDA 49 +#define AM_BSP_GPIO_IOM5_SDA 49 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA; //***************************************************************************** @@ -554,7 +554,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA; // MSPI_CE0 pin: MSPI chip select. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_CE0 19 +#define AM_BSP_GPIO_MSPI_CE0 19 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0; #define AM_BSP_MSPI_CE0_CHNL 0 @@ -563,7 +563,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0; // MSPI_CE1 pin: MSPI chip select. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_CE1 41 +#define AM_BSP_GPIO_MSPI_CE1 41 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1; #define AM_BSP_MSPI_CE1_CHNL 1 @@ -572,7 +572,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1; // MSPI_D0 pin: MSPI data 0. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D0 22 +#define AM_BSP_GPIO_MSPI_D0 22 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0; //***************************************************************************** @@ -580,7 +580,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0; // MSPI_D1 pin: MSPI data 1. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D1 26 +#define AM_BSP_GPIO_MSPI_D1 26 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1; //***************************************************************************** @@ -588,7 +588,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1; // MSPI_D2 pin: MSPI data 2. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D2 4 +#define AM_BSP_GPIO_MSPI_D2 4 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2; //***************************************************************************** @@ -596,7 +596,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2; // MSPI_D3 pin: MSPI data 3. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D3 23 +#define AM_BSP_GPIO_MSPI_D3 23 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3; //***************************************************************************** @@ -604,7 +604,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3; // MSPI_D4 pin: MSPI data 4. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D4 0 +#define AM_BSP_GPIO_MSPI_D4 0 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4; //***************************************************************************** @@ -612,7 +612,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4; // MSPI_D5 pin: MSPI data 5. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D5 1 +#define AM_BSP_GPIO_MSPI_D5 1 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5; //***************************************************************************** @@ -620,7 +620,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5; // MSPI_D6 pin: MSPI data 6. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D6 2 +#define AM_BSP_GPIO_MSPI_D6 2 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6; //***************************************************************************** @@ -628,7 +628,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6; // MSPI_D7 pin: MSPI data 7. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D7 3 +#define AM_BSP_GPIO_MSPI_D7 3 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7; //***************************************************************************** @@ -636,7 +636,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7; // MSPI_SCK pin: MSPI clock. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_SCK 24 +#define AM_BSP_GPIO_MSPI_SCK 24 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK; //***************************************************************************** @@ -644,7 +644,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK; // IOS_CE pin: I/O Slave chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_CE 3 +#define AM_BSP_GPIO_IOS_CE 3 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE; #define AM_BSP_IOS_CE_CHNL 0 @@ -653,7 +653,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE; // IOS_MISO pin: I/O Slave SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_MISO 2 +#define AM_BSP_GPIO_IOS_MISO 2 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO; //***************************************************************************** @@ -661,7 +661,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO; // IOS_MOSI pin: I/O Slave SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_MOSI 1 +#define AM_BSP_GPIO_IOS_MOSI 1 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI; //***************************************************************************** @@ -669,7 +669,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI; // IOS_SCK pin: I/O Slave SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_SCK 0 +#define AM_BSP_GPIO_IOS_SCK 0 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK; //***************************************************************************** @@ -677,7 +677,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK; // IOS_SCL pin: I/O Slave I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_SCL 0 +#define AM_BSP_GPIO_IOS_SCL 0 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL; //***************************************************************************** @@ -685,7 +685,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL; // IOS_SDA pin: I/O Slave I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_SDA 1 +#define AM_BSP_GPIO_IOS_SDA 1 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA; //***************************************************************************** @@ -693,7 +693,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA; // SWDCK pin: Cortex Serial Wire DCK. // //***************************************************************************** -#define AM_BSP_GPIO_SWDCK 20 +#define AM_BSP_GPIO_SWDCK 20 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK; //***************************************************************************** @@ -701,7 +701,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK; // SWDIO pin: Cortex Serial Wire DIO. // //***************************************************************************** -#define AM_BSP_GPIO_SWDIO 21 +#define AM_BSP_GPIO_SWDIO 21 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDIO; diff --git a/variants/SparkFun_Edge/config/variant.cpp b/variants/edge/config/variant.cpp similarity index 100% rename from variants/SparkFun_Edge/config/variant.cpp rename to variants/edge/config/variant.cpp diff --git a/variants/SparkFun_Edge/config/variant.h b/variants/edge/config/variant.h similarity index 100% rename from variants/SparkFun_Edge/config/variant.h rename to variants/edge/config/variant.h diff --git a/variants/SparkFun_Edge/linker_scripts/gcc/ambiq_sbl_app.ld b/variants/edge/linker_scripts/gcc/ambiq_sbl_app.ld similarity index 100% rename from variants/SparkFun_Edge/linker_scripts/gcc/ambiq_sbl_app.ld rename to variants/edge/linker_scripts/gcc/ambiq_sbl_app.ld diff --git a/variants/SparkFun_Edge/linker_scripts/gcc/artemis_sbl_svl_app.ld b/variants/edge/linker_scripts/gcc/artemis_sbl_svl_app.ld similarity index 100% rename from variants/SparkFun_Edge/linker_scripts/gcc/artemis_sbl_svl_app.ld rename to variants/edge/linker_scripts/gcc/artemis_sbl_svl_app.ld diff --git a/variants/SparkFun_Edge/startup/startup_gcc.c b/variants/edge/startup/startup_gcc.c similarity index 100% rename from variants/SparkFun_Edge/startup/startup_gcc.c rename to variants/edge/startup/startup_gcc.c diff --git a/variants/SparkFun_Edge2/bsp/README.md b/variants/edge2/bsp/README.md similarity index 100% rename from variants/SparkFun_Edge2/bsp/README.md rename to variants/edge2/bsp/README.md diff --git a/variants/SparkFun_Edge2/bsp/am_bsp.c b/variants/edge2/bsp/am_bsp.c similarity index 100% rename from variants/SparkFun_Edge2/bsp/am_bsp.c rename to variants/edge2/bsp/am_bsp.c diff --git a/variants/SparkFun_Edge2/bsp/am_bsp.h b/variants/edge2/bsp/am_bsp.h similarity index 100% rename from variants/SparkFun_Edge2/bsp/am_bsp.h rename to variants/edge2/bsp/am_bsp.h diff --git a/variants/SparkFun_Edge2/bsp/am_bsp_pins.c b/variants/edge2/bsp/am_bsp_pins.c similarity index 100% rename from variants/SparkFun_Edge2/bsp/am_bsp_pins.c rename to variants/edge2/bsp/am_bsp_pins.c diff --git a/variants/SparkFun_Edge2/bsp/am_bsp_pins.h b/variants/edge2/bsp/am_bsp_pins.h similarity index 87% rename from variants/SparkFun_Edge2/bsp/am_bsp_pins.h rename to variants/edge2/bsp/am_bsp_pins.h index 4152956..b9ec3e6 100644 --- a/variants/SparkFun_Edge2/bsp/am_bsp_pins.h +++ b/variants/edge2/bsp/am_bsp_pins.h @@ -67,7 +67,7 @@ extern "C" // CAMERA_HM01B0_D0 pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_D0 14 +#define AM_BSP_GPIO_CAMERA_HM01B0_D0 14 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D0; //***************************************************************************** @@ -75,7 +75,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D0; // CAMERA_HM01B0_D1 pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_D1 11 +#define AM_BSP_GPIO_CAMERA_HM01B0_D1 11 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D1; //***************************************************************************** @@ -83,7 +83,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D1; // CAMERA_HM01B0_D2 pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_D2 25 +#define AM_BSP_GPIO_CAMERA_HM01B0_D2 25 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D2; //***************************************************************************** @@ -91,7 +91,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D2; // CAMERA_HM01B0_D3 pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_D3 34 +#define AM_BSP_GPIO_CAMERA_HM01B0_D3 34 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D3; //***************************************************************************** @@ -99,7 +99,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D3; // CAMERA_HM01B0_D4 pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_D4 6 +#define AM_BSP_GPIO_CAMERA_HM01B0_D4 6 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D4; //***************************************************************************** @@ -107,7 +107,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D4; // CAMERA_HM01B0_D5 pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_D5 5 +#define AM_BSP_GPIO_CAMERA_HM01B0_D5 5 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D5; //***************************************************************************** @@ -115,7 +115,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D5; // CAMERA_HM01B0_D6 pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_D6 35 +#define AM_BSP_GPIO_CAMERA_HM01B0_D6 35 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D6; //***************************************************************************** @@ -123,7 +123,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D6; // CAMERA_HM01B0_D7 pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_D7 28 +#define AM_BSP_GPIO_CAMERA_HM01B0_D7 28 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D7; //***************************************************************************** @@ -131,7 +131,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D7; // CAMERA_HM01B0_VSYNC pin: Also called FVLD on the HM01B0 module. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_VSYNC 15 +#define AM_BSP_GPIO_CAMERA_HM01B0_VSYNC 15 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_VSYNC; //***************************************************************************** @@ -139,7 +139,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_VSYNC; // CAMERA_HM01B0_HSYNC pin: Also called LVLD on the HM01B0 module. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_HSYNC 27 +#define AM_BSP_GPIO_CAMERA_HM01B0_HSYNC 27 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_HSYNC; //***************************************************************************** @@ -147,7 +147,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_HSYNC; // CAMERA_HM01B0_PCLK pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_PCLK 7 +#define AM_BSP_GPIO_CAMERA_HM01B0_PCLK 7 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_PCLK; //***************************************************************************** @@ -155,7 +155,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_PCLK; // CAMERA_HM01B0_TRIG pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_TRIG 13 +#define AM_BSP_GPIO_CAMERA_HM01B0_TRIG 13 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_TRIG; //***************************************************************************** @@ -163,7 +163,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_TRIG; // CAMERA_HM01B0_INT pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_INT 23 +#define AM_BSP_GPIO_CAMERA_HM01B0_INT 23 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_INT; //***************************************************************************** @@ -171,7 +171,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_INT; // CAMERA_HM01B0_DVDDEN pin. // //***************************************************************************** -#define AM_BSP_GPIO_CAMERA_HM01B0_DVDDEN 32 +#define AM_BSP_GPIO_CAMERA_HM01B0_DVDDEN 32 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_DVDDEN; //***************************************************************************** @@ -179,7 +179,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_DVDDEN; // MIC_DATA pin: Data line for PDM microphones. // //***************************************************************************** -#define AM_BSP_GPIO_MIC_DATA 29 +#define AM_BSP_GPIO_MIC_DATA 29 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_DATA; //***************************************************************************** @@ -187,7 +187,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_DATA; // MIC_CLK pin: Clock line for PDM microphones. // //***************************************************************************** -#define AM_BSP_GPIO_MIC_CLK 12 +#define AM_BSP_GPIO_MIC_CLK 12 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_CLK; //***************************************************************************** @@ -195,7 +195,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_CLK; // LED_RED pin: The RED LED labelled 19. // //***************************************************************************** -#define AM_BSP_GPIO_LED_RED 19 +#define AM_BSP_GPIO_LED_RED 19 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_RED; //***************************************************************************** @@ -203,7 +203,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_RED; // LED_BLUE pin: The BLUE LED labelled 18. // //***************************************************************************** -#define AM_BSP_GPIO_LED_BLUE 18 +#define AM_BSP_GPIO_LED_BLUE 18 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_BLUE; //***************************************************************************** @@ -211,7 +211,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_BLUE; // LED_GREEN pin: The GREEN LED labelled 17. // //***************************************************************************** -#define AM_BSP_GPIO_LED_GREEN 17 +#define AM_BSP_GPIO_LED_GREEN 17 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_GREEN; //***************************************************************************** @@ -219,7 +219,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_GREEN; // LED_YELLOW pin: The YELLOW LED labelled 37. // //***************************************************************************** -#define AM_BSP_GPIO_LED_YELLOW 37 +#define AM_BSP_GPIO_LED_YELLOW 37 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_YELLOW; //***************************************************************************** @@ -227,7 +227,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_YELLOW; // COM_UART_TX pin: This pin is the COM_UART transmit pin. // //***************************************************************************** -#define AM_BSP_GPIO_COM_UART_TX 48 +#define AM_BSP_GPIO_COM_UART_TX 48 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX; //***************************************************************************** @@ -235,7 +235,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX; // COM_UART_RX pin: This pin is the COM_UART receive pin. // //***************************************************************************** -#define AM_BSP_GPIO_COM_UART_RX 49 +#define AM_BSP_GPIO_COM_UART_RX 49 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX; //***************************************************************************** @@ -243,7 +243,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX; // IOM0_CS pin: I/O Master 0 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_CS 11 +#define AM_BSP_GPIO_IOM0_CS 11 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS; #define AM_BSP_IOM0_CS_CHNL 0 @@ -252,7 +252,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS; // IOM0_CS3 pin: I/O Master 0 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_CS3 15 +#define AM_BSP_GPIO_IOM0_CS3 15 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3; #define AM_BSP_IOM0_CS3_CHNL 3 @@ -261,7 +261,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3; // IOM0_MISO pin: I/O Master 0 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_MISO 6 +#define AM_BSP_GPIO_IOM0_MISO 6 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO; //***************************************************************************** @@ -269,7 +269,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO; // IOM0_MOSI pin: I/O Master 0 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_MOSI 7 +#define AM_BSP_GPIO_IOM0_MOSI 7 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI; //***************************************************************************** @@ -277,7 +277,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI; // IOM0_SCK pin: I/O Master 0 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_SCK 5 +#define AM_BSP_GPIO_IOM0_SCK 5 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK; //***************************************************************************** @@ -285,7 +285,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK; // IOM0_SCL pin: I/O Master 0 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_SCL 5 +#define AM_BSP_GPIO_IOM0_SCL 5 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL; //***************************************************************************** @@ -293,7 +293,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL; // IOM0_SDA pin: I/O Master 0 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_SDA 6 +#define AM_BSP_GPIO_IOM0_SDA 6 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA; //***************************************************************************** @@ -301,7 +301,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA; // IOM1_CS pin: I/O Master 1 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_CS 14 +#define AM_BSP_GPIO_IOM1_CS 14 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS; #define AM_BSP_IOM1_CS_CHNL 2 @@ -310,7 +310,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS; // IOM1_MISO pin: I/O Master 1 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_MISO 9 +#define AM_BSP_GPIO_IOM1_MISO 9 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO; //***************************************************************************** @@ -318,7 +318,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO; // IOM1_MOSI pin: I/O Master 1 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_MOSI 10 +#define AM_BSP_GPIO_IOM1_MOSI 10 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI; //***************************************************************************** @@ -326,7 +326,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI; // IOM1_SCK pin: I/O Master 1 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_SCK 8 +#define AM_BSP_GPIO_IOM1_SCK 8 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK; //***************************************************************************** @@ -334,7 +334,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK; // IOM1_SCL pin: I/O Master 1 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_SCL 8 +#define AM_BSP_GPIO_IOM1_SCL 8 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL; //***************************************************************************** @@ -342,7 +342,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL; // IOM1_SDA pin: I/O Master 1 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_SDA 9 +#define AM_BSP_GPIO_IOM1_SDA 9 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA; //***************************************************************************** @@ -350,7 +350,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA; // IOM2_CS pin: I/O Master 2 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_CS 15 +#define AM_BSP_GPIO_IOM2_CS 15 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS; #define AM_BSP_IOM2_CS_CHNL 3 @@ -359,7 +359,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS; // IOM2_MISO pin: I/O Master 2 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_MISO 25 +#define AM_BSP_GPIO_IOM2_MISO 25 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO; //***************************************************************************** @@ -367,7 +367,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO; // IOM2_MOSI pin: I/O Master 2 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_MOSI 28 +#define AM_BSP_GPIO_IOM2_MOSI 28 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI; //***************************************************************************** @@ -375,7 +375,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI; // IOM2_SCK pin: I/O Master 2 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_SCK 27 +#define AM_BSP_GPIO_IOM2_SCK 27 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK; //***************************************************************************** @@ -383,7 +383,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK; // IOM2_SCL pin: I/O Master 2 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_SCL 27 +#define AM_BSP_GPIO_IOM2_SCL 27 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL; //***************************************************************************** @@ -391,7 +391,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL; // IOM2_SDA pin: I/O Master 2 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_SDA 25 +#define AM_BSP_GPIO_IOM2_SDA 25 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA; //***************************************************************************** @@ -399,7 +399,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA; // IOM3_CS pin: I/O Master 3 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_CS 12 +#define AM_BSP_GPIO_IOM3_CS 12 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS; #define AM_BSP_IOM3_CS_CHNL 0 @@ -408,7 +408,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS; // IOM3_MISO pin: I/O Master 3 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_MISO 43 +#define AM_BSP_GPIO_IOM3_MISO 43 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO; //***************************************************************************** @@ -416,7 +416,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO; // IOM3_MOSI pin: I/O Master 3 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_MOSI 38 +#define AM_BSP_GPIO_IOM3_MOSI 38 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI; //***************************************************************************** @@ -424,7 +424,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI; // IOM3_SCK pin: I/O Master 3 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_SCK 42 +#define AM_BSP_GPIO_IOM3_SCK 42 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK; //***************************************************************************** @@ -432,7 +432,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK; // IOM3_SCL pin: I/O Master 3 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_SCL 42 +#define AM_BSP_GPIO_IOM3_SCL 42 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL; //***************************************************************************** @@ -440,7 +440,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL; // IOM3_SDA pin: I/O Master 3 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_SDA 43 +#define AM_BSP_GPIO_IOM3_SDA 43 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA; //***************************************************************************** @@ -448,7 +448,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA; // IOM4_CS pin: I/O Master 4 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_CS 13 +#define AM_BSP_GPIO_IOM4_CS 13 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS; #define AM_BSP_IOM4_CS_CHNL 1 @@ -457,7 +457,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS; // IOM4_MISO pin: I/O Master 4 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_MISO 40 +#define AM_BSP_GPIO_IOM4_MISO 40 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO; //***************************************************************************** @@ -465,7 +465,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO; // IOM4_MOSI pin: I/O Master 4 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_MOSI 44 +#define AM_BSP_GPIO_IOM4_MOSI 44 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI; //***************************************************************************** @@ -473,7 +473,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI; // IOM4_SCK pin: I/O Master 4 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_SCK 39 +#define AM_BSP_GPIO_IOM4_SCK 39 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK; //***************************************************************************** @@ -481,7 +481,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK; // IOM4_SCL pin: I/O Master 4 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_SCL 39 +#define AM_BSP_GPIO_IOM4_SCL 39 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL; //***************************************************************************** @@ -489,7 +489,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL; // IOM4_SDA pin: I/O Master 4 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_SDA 40 +#define AM_BSP_GPIO_IOM4_SDA 40 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA; //***************************************************************************** @@ -497,7 +497,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA; // IOM5_CS pin: I/O Master 5 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_CS 16 +#define AM_BSP_GPIO_IOM5_CS 16 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS; #define AM_BSP_IOM5_CS_CHNL 0 @@ -506,7 +506,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS; // IOM5_MISO pin: I/O Master 5 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_MISO 49 +#define AM_BSP_GPIO_IOM5_MISO 49 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO; //***************************************************************************** @@ -514,7 +514,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO; // IOM5_MOSI pin: I/O Master 5 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_MOSI 47 +#define AM_BSP_GPIO_IOM5_MOSI 47 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI; //***************************************************************************** @@ -522,7 +522,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI; // IOM5_SCK pin: I/O Master 5 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_SCK 48 +#define AM_BSP_GPIO_IOM5_SCK 48 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK; //***************************************************************************** @@ -530,7 +530,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK; // IOM5_SCL pin: I/O Master 5 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_SCL 48 +#define AM_BSP_GPIO_IOM5_SCL 48 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL; //***************************************************************************** @@ -538,7 +538,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL; // IOM5_SDA pin: I/O Master 5 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_SDA 49 +#define AM_BSP_GPIO_IOM5_SDA 49 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA; //***************************************************************************** @@ -546,7 +546,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA; // MSPI_CE0 pin: MSPI chip select. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_CE0 19 +#define AM_BSP_GPIO_MSPI_CE0 19 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0; #define AM_BSP_MSPI_CE0_CHNL 0 @@ -555,7 +555,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0; // MSPI_CE1 pin: MSPI chip select. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_CE1 41 +#define AM_BSP_GPIO_MSPI_CE1 41 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1; #define AM_BSP_MSPI_CE1_CHNL 1 @@ -564,7 +564,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1; // MSPI_D0 pin: MSPI data 0. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D0 22 +#define AM_BSP_GPIO_MSPI_D0 22 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0; //***************************************************************************** @@ -572,7 +572,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0; // MSPI_D1 pin: MSPI data 1. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D1 26 +#define AM_BSP_GPIO_MSPI_D1 26 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1; //***************************************************************************** @@ -580,7 +580,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1; // MSPI_D2 pin: MSPI data 2. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D2 4 +#define AM_BSP_GPIO_MSPI_D2 4 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2; //***************************************************************************** @@ -588,7 +588,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2; // MSPI_D3 pin: MSPI data 3. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D3 23 +#define AM_BSP_GPIO_MSPI_D3 23 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3; //***************************************************************************** @@ -596,7 +596,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3; // MSPI_D4 pin: MSPI data 4. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D4 0 +#define AM_BSP_GPIO_MSPI_D4 0 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4; //***************************************************************************** @@ -604,7 +604,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4; // MSPI_D5 pin: MSPI data 5. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D5 1 +#define AM_BSP_GPIO_MSPI_D5 1 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5; //***************************************************************************** @@ -612,7 +612,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5; // MSPI_D6 pin: MSPI data 6. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D6 2 +#define AM_BSP_GPIO_MSPI_D6 2 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6; //***************************************************************************** @@ -620,7 +620,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6; // MSPI_D7 pin: MSPI data 7. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D7 3 +#define AM_BSP_GPIO_MSPI_D7 3 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7; //***************************************************************************** @@ -628,7 +628,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7; // MSPI_SCK pin: MSPI clock. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_SCK 24 +#define AM_BSP_GPIO_MSPI_SCK 24 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK; //***************************************************************************** @@ -636,7 +636,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK; // IOS_CE pin: I/O Slave chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_CE 3 +#define AM_BSP_GPIO_IOS_CE 3 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE; #define AM_BSP_IOS_CE_CHNL 0 @@ -645,7 +645,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE; // IOS_MISO pin: I/O Slave SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_MISO 2 +#define AM_BSP_GPIO_IOS_MISO 2 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO; //***************************************************************************** @@ -653,7 +653,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO; // IOS_MOSI pin: I/O Slave SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_MOSI 1 +#define AM_BSP_GPIO_IOS_MOSI 1 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI; //***************************************************************************** @@ -661,7 +661,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI; // IOS_SCK pin: I/O Slave SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_SCK 0 +#define AM_BSP_GPIO_IOS_SCK 0 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK; //***************************************************************************** @@ -669,7 +669,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK; // IOS_SCL pin: I/O Slave I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_SCL 0 +#define AM_BSP_GPIO_IOS_SCL 0 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL; //***************************************************************************** @@ -677,7 +677,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL; // IOS_SDA pin: I/O Slave I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_SDA 1 +#define AM_BSP_GPIO_IOS_SDA 1 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA; //***************************************************************************** @@ -685,7 +685,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA; // SWDCK pin: Cortex Serial Wire DCK. // //***************************************************************************** -#define AM_BSP_GPIO_SWDCK 20 +#define AM_BSP_GPIO_SWDCK 20 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK; //***************************************************************************** @@ -693,7 +693,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK; // SWDIO pin: Cortex Serial Wire DIO. // //***************************************************************************** -#define AM_BSP_GPIO_SWDIO 21 +#define AM_BSP_GPIO_SWDIO 21 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDIO; diff --git a/variants/SparkFun_Edge2/config/variant.cpp b/variants/edge2/config/variant.cpp similarity index 100% rename from variants/SparkFun_Edge2/config/variant.cpp rename to variants/edge2/config/variant.cpp diff --git a/variants/SparkFun_Edge2/config/variant.h b/variants/edge2/config/variant.h similarity index 100% rename from variants/SparkFun_Edge2/config/variant.h rename to variants/edge2/config/variant.h diff --git a/variants/SparkFun_Edge2/linker_scripts/gcc/ambiq_sbl_app.ld b/variants/edge2/linker_scripts/gcc/ambiq_sbl_app.ld similarity index 100% rename from variants/SparkFun_Edge2/linker_scripts/gcc/ambiq_sbl_app.ld rename to variants/edge2/linker_scripts/gcc/ambiq_sbl_app.ld diff --git a/variants/SparkFun_Edge2/linker_scripts/gcc/artemis_sbl_svl_app.ld b/variants/edge2/linker_scripts/gcc/artemis_sbl_svl_app.ld similarity index 100% rename from variants/SparkFun_Edge2/linker_scripts/gcc/artemis_sbl_svl_app.ld rename to variants/edge2/linker_scripts/gcc/artemis_sbl_svl_app.ld diff --git a/variants/SparkFun_Edge2/startup/startup_gcc.c b/variants/edge2/startup/startup_gcc.c similarity index 100% rename from variants/SparkFun_Edge2/startup/startup_gcc.c rename to variants/edge2/startup/startup_gcc.c diff --git a/variants/SparkFun_RedBoard_Artemis/bsp/README.md b/variants/redboard_artemis/bsp/README.md similarity index 100% rename from variants/SparkFun_RedBoard_Artemis/bsp/README.md rename to variants/redboard_artemis/bsp/README.md diff --git a/variants/SparkFun_RedBoard_Artemis/bsp/am_bsp.c b/variants/redboard_artemis/bsp/am_bsp.c similarity index 100% rename from variants/SparkFun_RedBoard_Artemis/bsp/am_bsp.c rename to variants/redboard_artemis/bsp/am_bsp.c diff --git a/variants/SparkFun_RedBoard_Artemis/bsp/am_bsp.h b/variants/redboard_artemis/bsp/am_bsp.h similarity index 100% rename from variants/SparkFun_RedBoard_Artemis/bsp/am_bsp.h rename to variants/redboard_artemis/bsp/am_bsp.h diff --git a/variants/SparkFun_RedBoard_Artemis/bsp/am_bsp_pins.c b/variants/redboard_artemis/bsp/am_bsp_pins.c similarity index 100% rename from variants/SparkFun_RedBoard_Artemis/bsp/am_bsp_pins.c rename to variants/redboard_artemis/bsp/am_bsp_pins.c diff --git a/variants/SparkFun_RedBoard_Artemis/bsp/am_bsp_pins.h b/variants/redboard_artemis/bsp/am_bsp_pins.h similarity index 88% rename from variants/SparkFun_RedBoard_Artemis/bsp/am_bsp_pins.h rename to variants/redboard_artemis/bsp/am_bsp_pins.h index b4f2fbf..6514617 100644 --- a/variants/SparkFun_RedBoard_Artemis/bsp/am_bsp_pins.h +++ b/variants/redboard_artemis/bsp/am_bsp_pins.h @@ -67,7 +67,7 @@ extern "C" // LED_BLUE pin: The BLUE LED labelled 13. // //***************************************************************************** -#define AM_BSP_GPIO_LED_BLUE 5 +#define AM_BSP_GPIO_LED_BLUE 5 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_BLUE; //***************************************************************************** @@ -75,7 +75,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_BLUE; // MIC_DATA pin: Data line for PDM microphones. // //***************************************************************************** -#define AM_BSP_GPIO_MIC_DATA 36 +#define AM_BSP_GPIO_MIC_DATA 36 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_DATA; //***************************************************************************** @@ -83,7 +83,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_DATA; // MIC_CLK pin: Clock line for PDM microphones. // //***************************************************************************** -#define AM_BSP_GPIO_MIC_CLK 37 +#define AM_BSP_GPIO_MIC_CLK 37 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_CLK; //***************************************************************************** @@ -91,7 +91,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_CLK; // COM_UART_TX pin: This pin is the COM_UART transmit pin. // //***************************************************************************** -#define AM_BSP_GPIO_COM_UART_TX 48 +#define AM_BSP_GPIO_COM_UART_TX 48 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX; //***************************************************************************** @@ -99,7 +99,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX; // COM_UART_RX pin: This pin is the COM_UART receive pin. // //***************************************************************************** -#define AM_BSP_GPIO_COM_UART_RX 49 +#define AM_BSP_GPIO_COM_UART_RX 49 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX; //***************************************************************************** @@ -107,7 +107,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX; // IOM0_CS pin: I/O Master 0 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_CS 11 +#define AM_BSP_GPIO_IOM0_CS 11 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS; #define AM_BSP_IOM0_CS_CHNL 0 @@ -116,7 +116,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS; // IOM0_CS3 pin: I/O Master 0 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_CS3 15 +#define AM_BSP_GPIO_IOM0_CS3 15 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3; #define AM_BSP_IOM0_CS3_CHNL 3 @@ -125,7 +125,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3; // IOM0_MISO pin: I/O Master 0 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_MISO 6 +#define AM_BSP_GPIO_IOM0_MISO 6 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO; //***************************************************************************** @@ -133,7 +133,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO; // IOM0_MOSI pin: I/O Master 0 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_MOSI 7 +#define AM_BSP_GPIO_IOM0_MOSI 7 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI; //***************************************************************************** @@ -141,7 +141,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI; // IOM0_SCK pin: I/O Master 0 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_SCK 5 +#define AM_BSP_GPIO_IOM0_SCK 5 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK; //***************************************************************************** @@ -149,7 +149,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK; // IOM0_SCL pin: I/O Master 0 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_SCL 5 +#define AM_BSP_GPIO_IOM0_SCL 5 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL; //***************************************************************************** @@ -157,7 +157,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL; // IOM0_SDA pin: I/O Master 0 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_SDA 6 +#define AM_BSP_GPIO_IOM0_SDA 6 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA; //***************************************************************************** @@ -165,7 +165,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA; // IOM1_CS pin: I/O Master 1 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_CS 14 +#define AM_BSP_GPIO_IOM1_CS 14 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS; #define AM_BSP_IOM1_CS_CHNL 2 @@ -174,7 +174,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS; // IOM1_MISO pin: I/O Master 1 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_MISO 9 +#define AM_BSP_GPIO_IOM1_MISO 9 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO; //***************************************************************************** @@ -182,7 +182,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO; // IOM1_MOSI pin: I/O Master 1 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_MOSI 10 +#define AM_BSP_GPIO_IOM1_MOSI 10 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI; //***************************************************************************** @@ -190,7 +190,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI; // IOM1_SCK pin: I/O Master 1 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_SCK 8 +#define AM_BSP_GPIO_IOM1_SCK 8 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK; //***************************************************************************** @@ -198,7 +198,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK; // IOM1_SCL pin: I/O Master 1 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_SCL 8 +#define AM_BSP_GPIO_IOM1_SCL 8 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL; //***************************************************************************** @@ -206,7 +206,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL; // IOM1_SDA pin: I/O Master 1 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_SDA 9 +#define AM_BSP_GPIO_IOM1_SDA 9 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA; //***************************************************************************** @@ -214,7 +214,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA; // IOM2_CS pin: I/O Master 2 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_CS 15 +#define AM_BSP_GPIO_IOM2_CS 15 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS; #define AM_BSP_IOM2_CS_CHNL 3 @@ -223,7 +223,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS; // IOM2_MISO pin: I/O Master 2 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_MISO 25 +#define AM_BSP_GPIO_IOM2_MISO 25 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO; //***************************************************************************** @@ -231,7 +231,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO; // IOM2_MOSI pin: I/O Master 2 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_MOSI 28 +#define AM_BSP_GPIO_IOM2_MOSI 28 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI; //***************************************************************************** @@ -239,7 +239,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI; // IOM2_SCK pin: I/O Master 2 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_SCK 27 +#define AM_BSP_GPIO_IOM2_SCK 27 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK; //***************************************************************************** @@ -247,7 +247,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK; // IOM2_SCL pin: I/O Master 2 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_SCL 27 +#define AM_BSP_GPIO_IOM2_SCL 27 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL; //***************************************************************************** @@ -255,7 +255,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL; // IOM2_SDA pin: I/O Master 2 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_SDA 25 +#define AM_BSP_GPIO_IOM2_SDA 25 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA; //***************************************************************************** @@ -263,7 +263,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA; // IOM3_CS pin: I/O Master 3 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_CS 12 +#define AM_BSP_GPIO_IOM3_CS 12 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS; #define AM_BSP_IOM3_CS_CHNL 0 @@ -272,7 +272,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS; // IOM3_MISO pin: I/O Master 3 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_MISO 43 +#define AM_BSP_GPIO_IOM3_MISO 43 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO; //***************************************************************************** @@ -280,7 +280,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO; // IOM3_MOSI pin: I/O Master 3 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_MOSI 38 +#define AM_BSP_GPIO_IOM3_MOSI 38 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI; //***************************************************************************** @@ -288,7 +288,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI; // IOM3_SCK pin: I/O Master 3 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_SCK 42 +#define AM_BSP_GPIO_IOM3_SCK 42 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK; //***************************************************************************** @@ -296,7 +296,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK; // IOM3_SCL pin: I/O Master 3 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_SCL 42 +#define AM_BSP_GPIO_IOM3_SCL 42 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL; //***************************************************************************** @@ -304,7 +304,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL; // IOM3_SDA pin: I/O Master 3 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_SDA 43 +#define AM_BSP_GPIO_IOM3_SDA 43 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA; //***************************************************************************** @@ -312,7 +312,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA; // IOM4_CS pin: I/O Master 4 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_CS 13 +#define AM_BSP_GPIO_IOM4_CS 13 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS; #define AM_BSP_IOM4_CS_CHNL 1 @@ -321,7 +321,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS; // IOM4_MISO pin: I/O Master 4 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_MISO 40 +#define AM_BSP_GPIO_IOM4_MISO 40 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO; //***************************************************************************** @@ -329,7 +329,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO; // IOM4_MOSI pin: I/O Master 4 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_MOSI 44 +#define AM_BSP_GPIO_IOM4_MOSI 44 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI; //***************************************************************************** @@ -337,7 +337,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI; // IOM4_SCK pin: I/O Master 4 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_SCK 39 +#define AM_BSP_GPIO_IOM4_SCK 39 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK; //***************************************************************************** @@ -345,7 +345,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK; // IOM4_SCL pin: I/O Master 4 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_SCL 39 +#define AM_BSP_GPIO_IOM4_SCL 39 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL; //***************************************************************************** @@ -353,7 +353,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL; // IOM4_SDA pin: I/O Master 4 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_SDA 40 +#define AM_BSP_GPIO_IOM4_SDA 40 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA; //***************************************************************************** @@ -361,7 +361,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA; // IOM5_CS pin: I/O Master 5 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_CS 16 +#define AM_BSP_GPIO_IOM5_CS 16 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS; #define AM_BSP_IOM5_CS_CHNL 0 @@ -370,7 +370,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS; // IOM5_MISO pin: I/O Master 5 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_MISO 49 +#define AM_BSP_GPIO_IOM5_MISO 49 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO; //***************************************************************************** @@ -378,7 +378,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO; // IOM5_MOSI pin: I/O Master 5 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_MOSI 47 +#define AM_BSP_GPIO_IOM5_MOSI 47 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI; //***************************************************************************** @@ -386,7 +386,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI; // IOM5_SCK pin: I/O Master 5 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_SCK 48 +#define AM_BSP_GPIO_IOM5_SCK 48 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK; //***************************************************************************** @@ -394,7 +394,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK; // IOM5_SCL pin: I/O Master 5 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_SCL 48 +#define AM_BSP_GPIO_IOM5_SCL 48 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL; //***************************************************************************** @@ -402,7 +402,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL; // IOM5_SDA pin: I/O Master 5 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_SDA 49 +#define AM_BSP_GPIO_IOM5_SDA 49 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA; //***************************************************************************** @@ -410,7 +410,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA; // MSPI_CE0 pin: MSPI chip select. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_CE0 19 +#define AM_BSP_GPIO_MSPI_CE0 19 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0; #define AM_BSP_MSPI_CE0_CHNL 0 @@ -419,7 +419,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0; // MSPI_CE1 pin: MSPI chip select. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_CE1 41 +#define AM_BSP_GPIO_MSPI_CE1 41 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1; #define AM_BSP_MSPI_CE1_CHNL 1 @@ -428,7 +428,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1; // MSPI_D0 pin: MSPI data 0. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D0 22 +#define AM_BSP_GPIO_MSPI_D0 22 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0; //***************************************************************************** @@ -436,7 +436,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0; // MSPI_D1 pin: MSPI data 1. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D1 26 +#define AM_BSP_GPIO_MSPI_D1 26 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1; //***************************************************************************** @@ -444,7 +444,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1; // MSPI_D2 pin: MSPI data 2. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D2 4 +#define AM_BSP_GPIO_MSPI_D2 4 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2; //***************************************************************************** @@ -452,7 +452,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2; // MSPI_D3 pin: MSPI data 3. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D3 23 +#define AM_BSP_GPIO_MSPI_D3 23 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3; //***************************************************************************** @@ -460,7 +460,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3; // MSPI_D4 pin: MSPI data 4. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D4 0 +#define AM_BSP_GPIO_MSPI_D4 0 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4; //***************************************************************************** @@ -468,7 +468,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4; // MSPI_D5 pin: MSPI data 5. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D5 1 +#define AM_BSP_GPIO_MSPI_D5 1 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5; //***************************************************************************** @@ -476,7 +476,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5; // MSPI_D6 pin: MSPI data 6. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D6 2 +#define AM_BSP_GPIO_MSPI_D6 2 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6; //***************************************************************************** @@ -484,7 +484,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6; // MSPI_D7 pin: MSPI data 7. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D7 3 +#define AM_BSP_GPIO_MSPI_D7 3 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7; //***************************************************************************** @@ -492,7 +492,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7; // MSPI_SCK pin: MSPI clock. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_SCK 24 +#define AM_BSP_GPIO_MSPI_SCK 24 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK; //***************************************************************************** @@ -500,7 +500,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK; // IOS_CE pin: I/O Slave chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_CE 3 +#define AM_BSP_GPIO_IOS_CE 3 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE; #define AM_BSP_IOS_CE_CHNL 0 @@ -509,7 +509,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE; // IOS_MISO pin: I/O Slave SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_MISO 2 +#define AM_BSP_GPIO_IOS_MISO 2 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO; //***************************************************************************** @@ -517,7 +517,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO; // IOS_MOSI pin: I/O Slave SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_MOSI 1 +#define AM_BSP_GPIO_IOS_MOSI 1 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI; //***************************************************************************** @@ -525,7 +525,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI; // IOS_SCK pin: I/O Slave SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_SCK 0 +#define AM_BSP_GPIO_IOS_SCK 0 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK; //***************************************************************************** @@ -533,7 +533,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK; // IOS_SCL pin: I/O Slave I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_SCL 0 +#define AM_BSP_GPIO_IOS_SCL 0 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL; //***************************************************************************** @@ -541,7 +541,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL; // IOS_SDA pin: I/O Slave I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_SDA 1 +#define AM_BSP_GPIO_IOS_SDA 1 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA; //***************************************************************************** @@ -549,7 +549,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA; // SWDCK pin: Cortex Serial Wire DCK. // //***************************************************************************** -#define AM_BSP_GPIO_SWDCK 20 +#define AM_BSP_GPIO_SWDCK 20 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK; //***************************************************************************** @@ -557,7 +557,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK; // SWDIO pin: Cortex Serial Wire DIO. // //***************************************************************************** -#define AM_BSP_GPIO_SWDIO 21 +#define AM_BSP_GPIO_SWDIO 21 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDIO; diff --git a/variants/SparkFun_RedBoard_Artemis/config/variant.cpp b/variants/redboard_artemis/config/variant.cpp similarity index 100% rename from variants/SparkFun_RedBoard_Artemis/config/variant.cpp rename to variants/redboard_artemis/config/variant.cpp diff --git a/variants/SparkFun_RedBoard_Artemis/config/variant.h b/variants/redboard_artemis/config/variant.h similarity index 100% rename from variants/SparkFun_RedBoard_Artemis/config/variant.h rename to variants/redboard_artemis/config/variant.h diff --git a/variants/SparkFun_RedBoard_Artemis/linker_scripts/gcc/ambiq_sbl_app.ld b/variants/redboard_artemis/linker_scripts/gcc/ambiq_sbl_app.ld similarity index 100% rename from variants/SparkFun_RedBoard_Artemis/linker_scripts/gcc/ambiq_sbl_app.ld rename to variants/redboard_artemis/linker_scripts/gcc/ambiq_sbl_app.ld diff --git a/variants/SparkFun_RedBoard_Artemis/linker_scripts/gcc/artemis_sbl_svl_app.ld b/variants/redboard_artemis/linker_scripts/gcc/artemis_sbl_svl_app.ld similarity index 100% rename from variants/SparkFun_RedBoard_Artemis/linker_scripts/gcc/artemis_sbl_svl_app.ld rename to variants/redboard_artemis/linker_scripts/gcc/artemis_sbl_svl_app.ld diff --git a/variants/SparkFun_RedBoard_Artemis/startup/startup_gcc.c b/variants/redboard_artemis/startup/startup_gcc.c similarity index 100% rename from variants/SparkFun_RedBoard_Artemis/startup/startup_gcc.c rename to variants/redboard_artemis/startup/startup_gcc.c diff --git a/variants/SparkFun_RedBoard_Artemis_ATP/bsp/README.md b/variants/redboard_artemis_atp/bsp/README.md similarity index 100% rename from variants/SparkFun_RedBoard_Artemis_ATP/bsp/README.md rename to variants/redboard_artemis_atp/bsp/README.md diff --git a/variants/SparkFun_RedBoard_Artemis_ATP/bsp/am_bsp.c b/variants/redboard_artemis_atp/bsp/am_bsp.c similarity index 100% rename from variants/SparkFun_RedBoard_Artemis_ATP/bsp/am_bsp.c rename to variants/redboard_artemis_atp/bsp/am_bsp.c diff --git a/variants/SparkFun_RedBoard_Artemis_ATP/bsp/am_bsp.h b/variants/redboard_artemis_atp/bsp/am_bsp.h similarity index 100% rename from variants/SparkFun_RedBoard_Artemis_ATP/bsp/am_bsp.h rename to variants/redboard_artemis_atp/bsp/am_bsp.h diff --git a/variants/SparkFun_RedBoard_Artemis_ATP/bsp/am_bsp_pins.c b/variants/redboard_artemis_atp/bsp/am_bsp_pins.c similarity index 100% rename from variants/SparkFun_RedBoard_Artemis_ATP/bsp/am_bsp_pins.c rename to variants/redboard_artemis_atp/bsp/am_bsp_pins.c diff --git a/variants/SparkFun_RedBoard_Artemis_ATP/bsp/am_bsp_pins.h b/variants/redboard_artemis_atp/bsp/am_bsp_pins.h similarity index 88% rename from variants/SparkFun_RedBoard_Artemis_ATP/bsp/am_bsp_pins.h rename to variants/redboard_artemis_atp/bsp/am_bsp_pins.h index 4bc7f2d..f54cfa0 100644 --- a/variants/SparkFun_RedBoard_Artemis_ATP/bsp/am_bsp_pins.h +++ b/variants/redboard_artemis_atp/bsp/am_bsp_pins.h @@ -67,7 +67,7 @@ extern "C" // LED_BLUE pin: The BLUE LED labelled 5. // //***************************************************************************** -#define AM_BSP_GPIO_LED_BLUE 5 +#define AM_BSP_GPIO_LED_BLUE 5 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_BLUE; //***************************************************************************** @@ -75,7 +75,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_BLUE; // MIC_DATA pin: Data line for PDM microphones. // //***************************************************************************** -#define AM_BSP_GPIO_MIC_DATA 36 +#define AM_BSP_GPIO_MIC_DATA 36 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_DATA; //***************************************************************************** @@ -83,7 +83,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_DATA; // MIC_CLK pin: Clock line for PDM microphones. // //***************************************************************************** -#define AM_BSP_GPIO_MIC_CLK 37 +#define AM_BSP_GPIO_MIC_CLK 37 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_CLK; //***************************************************************************** @@ -91,7 +91,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_CLK; // COM_UART_TX pin: This pin is the COM_UART transmit pin. // //***************************************************************************** -#define AM_BSP_GPIO_COM_UART_TX 48 +#define AM_BSP_GPIO_COM_UART_TX 48 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX; //***************************************************************************** @@ -99,7 +99,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX; // COM_UART_RX pin: This pin is the COM_UART receive pin. // //***************************************************************************** -#define AM_BSP_GPIO_COM_UART_RX 49 +#define AM_BSP_GPIO_COM_UART_RX 49 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX; //***************************************************************************** @@ -107,7 +107,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX; // IOM0_CS pin: I/O Master 0 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_CS 11 +#define AM_BSP_GPIO_IOM0_CS 11 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS; #define AM_BSP_IOM0_CS_CHNL 0 @@ -116,7 +116,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS; // IOM0_CS3 pin: I/O Master 0 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_CS3 15 +#define AM_BSP_GPIO_IOM0_CS3 15 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3; #define AM_BSP_IOM0_CS3_CHNL 3 @@ -125,7 +125,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3; // IOM0_MISO pin: I/O Master 0 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_MISO 6 +#define AM_BSP_GPIO_IOM0_MISO 6 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO; //***************************************************************************** @@ -133,7 +133,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO; // IOM0_MOSI pin: I/O Master 0 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_MOSI 7 +#define AM_BSP_GPIO_IOM0_MOSI 7 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI; //***************************************************************************** @@ -141,7 +141,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI; // IOM0_SCK pin: I/O Master 0 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_SCK 5 +#define AM_BSP_GPIO_IOM0_SCK 5 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK; //***************************************************************************** @@ -149,7 +149,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK; // IOM0_SCL pin: I/O Master 0 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_SCL 5 +#define AM_BSP_GPIO_IOM0_SCL 5 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL; //***************************************************************************** @@ -157,7 +157,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL; // IOM0_SDA pin: I/O Master 0 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_SDA 6 +#define AM_BSP_GPIO_IOM0_SDA 6 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA; //***************************************************************************** @@ -165,7 +165,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA; // IOM1_CS pin: I/O Master 1 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_CS 14 +#define AM_BSP_GPIO_IOM1_CS 14 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS; #define AM_BSP_IOM1_CS_CHNL 2 @@ -174,7 +174,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS; // IOM1_MISO pin: I/O Master 1 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_MISO 9 +#define AM_BSP_GPIO_IOM1_MISO 9 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO; //***************************************************************************** @@ -182,7 +182,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO; // IOM1_MOSI pin: I/O Master 1 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_MOSI 10 +#define AM_BSP_GPIO_IOM1_MOSI 10 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI; //***************************************************************************** @@ -190,7 +190,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI; // IOM1_SCK pin: I/O Master 1 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_SCK 8 +#define AM_BSP_GPIO_IOM1_SCK 8 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK; //***************************************************************************** @@ -198,7 +198,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK; // IOM1_SCL pin: I/O Master 1 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_SCL 8 +#define AM_BSP_GPIO_IOM1_SCL 8 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL; //***************************************************************************** @@ -206,7 +206,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL; // IOM1_SDA pin: I/O Master 1 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_SDA 9 +#define AM_BSP_GPIO_IOM1_SDA 9 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA; //***************************************************************************** @@ -214,7 +214,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA; // IOM2_CS pin: I/O Master 2 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_CS 15 +#define AM_BSP_GPIO_IOM2_CS 15 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS; #define AM_BSP_IOM2_CS_CHNL 3 @@ -223,7 +223,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS; // IOM2_MISO pin: I/O Master 2 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_MISO 25 +#define AM_BSP_GPIO_IOM2_MISO 25 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO; //***************************************************************************** @@ -231,7 +231,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO; // IOM2_MOSI pin: I/O Master 2 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_MOSI 28 +#define AM_BSP_GPIO_IOM2_MOSI 28 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI; //***************************************************************************** @@ -239,7 +239,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI; // IOM2_SCK pin: I/O Master 2 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_SCK 27 +#define AM_BSP_GPIO_IOM2_SCK 27 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK; //***************************************************************************** @@ -247,7 +247,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK; // IOM2_SCL pin: I/O Master 2 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_SCL 27 +#define AM_BSP_GPIO_IOM2_SCL 27 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL; //***************************************************************************** @@ -255,7 +255,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL; // IOM2_SDA pin: I/O Master 2 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_SDA 25 +#define AM_BSP_GPIO_IOM2_SDA 25 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA; //***************************************************************************** @@ -263,7 +263,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA; // IOM3_CS pin: I/O Master 3 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_CS 12 +#define AM_BSP_GPIO_IOM3_CS 12 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS; #define AM_BSP_IOM3_CS_CHNL 0 @@ -272,7 +272,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS; // IOM3_MISO pin: I/O Master 3 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_MISO 43 +#define AM_BSP_GPIO_IOM3_MISO 43 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO; //***************************************************************************** @@ -280,7 +280,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO; // IOM3_MOSI pin: I/O Master 3 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_MOSI 38 +#define AM_BSP_GPIO_IOM3_MOSI 38 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI; //***************************************************************************** @@ -288,7 +288,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI; // IOM3_SCK pin: I/O Master 3 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_SCK 42 +#define AM_BSP_GPIO_IOM3_SCK 42 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK; //***************************************************************************** @@ -296,7 +296,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK; // IOM3_SCL pin: I/O Master 3 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_SCL 42 +#define AM_BSP_GPIO_IOM3_SCL 42 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL; //***************************************************************************** @@ -304,7 +304,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL; // IOM3_SDA pin: I/O Master 3 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_SDA 43 +#define AM_BSP_GPIO_IOM3_SDA 43 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA; //***************************************************************************** @@ -312,7 +312,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA; // IOM4_CS pin: I/O Master 4 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_CS 13 +#define AM_BSP_GPIO_IOM4_CS 13 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS; #define AM_BSP_IOM4_CS_CHNL 1 @@ -321,7 +321,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS; // IOM4_MISO pin: I/O Master 4 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_MISO 40 +#define AM_BSP_GPIO_IOM4_MISO 40 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO; //***************************************************************************** @@ -329,7 +329,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO; // IOM4_MOSI pin: I/O Master 4 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_MOSI 44 +#define AM_BSP_GPIO_IOM4_MOSI 44 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI; //***************************************************************************** @@ -337,7 +337,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI; // IOM4_SCK pin: I/O Master 4 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_SCK 39 +#define AM_BSP_GPIO_IOM4_SCK 39 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK; //***************************************************************************** @@ -345,7 +345,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK; // IOM4_SCL pin: I/O Master 4 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_SCL 39 +#define AM_BSP_GPIO_IOM4_SCL 39 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL; //***************************************************************************** @@ -353,7 +353,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL; // IOM4_SDA pin: I/O Master 4 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_SDA 40 +#define AM_BSP_GPIO_IOM4_SDA 40 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA; //***************************************************************************** @@ -361,7 +361,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA; // IOM5_CS pin: I/O Master 5 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_CS 16 +#define AM_BSP_GPIO_IOM5_CS 16 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS; #define AM_BSP_IOM5_CS_CHNL 0 @@ -370,7 +370,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS; // IOM5_MISO pin: I/O Master 5 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_MISO 49 +#define AM_BSP_GPIO_IOM5_MISO 49 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO; //***************************************************************************** @@ -378,7 +378,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO; // IOM5_MOSI pin: I/O Master 5 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_MOSI 47 +#define AM_BSP_GPIO_IOM5_MOSI 47 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI; //***************************************************************************** @@ -386,7 +386,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI; // IOM5_SCK pin: I/O Master 5 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_SCK 48 +#define AM_BSP_GPIO_IOM5_SCK 48 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK; //***************************************************************************** @@ -394,7 +394,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK; // IOM5_SCL pin: I/O Master 5 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_SCL 48 +#define AM_BSP_GPIO_IOM5_SCL 48 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL; //***************************************************************************** @@ -402,7 +402,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL; // IOM5_SDA pin: I/O Master 5 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_SDA 49 +#define AM_BSP_GPIO_IOM5_SDA 49 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA; //***************************************************************************** @@ -410,7 +410,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA; // MSPI_CE0 pin: MSPI chip select. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_CE0 19 +#define AM_BSP_GPIO_MSPI_CE0 19 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0; #define AM_BSP_MSPI_CE0_CHNL 0 @@ -419,7 +419,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0; // MSPI_CE1 pin: MSPI chip select. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_CE1 41 +#define AM_BSP_GPIO_MSPI_CE1 41 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1; #define AM_BSP_MSPI_CE1_CHNL 1 @@ -428,7 +428,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1; // MSPI_D0 pin: MSPI data 0. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D0 22 +#define AM_BSP_GPIO_MSPI_D0 22 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0; //***************************************************************************** @@ -436,7 +436,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0; // MSPI_D1 pin: MSPI data 1. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D1 26 +#define AM_BSP_GPIO_MSPI_D1 26 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1; //***************************************************************************** @@ -444,7 +444,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1; // MSPI_D2 pin: MSPI data 2. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D2 4 +#define AM_BSP_GPIO_MSPI_D2 4 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2; //***************************************************************************** @@ -452,7 +452,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2; // MSPI_D3 pin: MSPI data 3. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D3 23 +#define AM_BSP_GPIO_MSPI_D3 23 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3; //***************************************************************************** @@ -460,7 +460,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3; // MSPI_D4 pin: MSPI data 4. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D4 0 +#define AM_BSP_GPIO_MSPI_D4 0 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4; //***************************************************************************** @@ -468,7 +468,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4; // MSPI_D5 pin: MSPI data 5. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D5 1 +#define AM_BSP_GPIO_MSPI_D5 1 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5; //***************************************************************************** @@ -476,7 +476,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5; // MSPI_D6 pin: MSPI data 6. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D6 2 +#define AM_BSP_GPIO_MSPI_D6 2 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6; //***************************************************************************** @@ -484,7 +484,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6; // MSPI_D7 pin: MSPI data 7. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D7 3 +#define AM_BSP_GPIO_MSPI_D7 3 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7; //***************************************************************************** @@ -492,7 +492,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7; // MSPI_SCK pin: MSPI clock. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_SCK 24 +#define AM_BSP_GPIO_MSPI_SCK 24 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK; //***************************************************************************** @@ -500,7 +500,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK; // IOS_CE pin: I/O Slave chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_CE 3 +#define AM_BSP_GPIO_IOS_CE 3 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE; #define AM_BSP_IOS_CE_CHNL 0 @@ -509,7 +509,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE; // IOS_MISO pin: I/O Slave SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_MISO 2 +#define AM_BSP_GPIO_IOS_MISO 2 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO; //***************************************************************************** @@ -517,7 +517,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO; // IOS_MOSI pin: I/O Slave SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_MOSI 1 +#define AM_BSP_GPIO_IOS_MOSI 1 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI; //***************************************************************************** @@ -525,7 +525,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI; // IOS_SCK pin: I/O Slave SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_SCK 0 +#define AM_BSP_GPIO_IOS_SCK 0 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK; //***************************************************************************** @@ -533,7 +533,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK; // IOS_SCL pin: I/O Slave I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_SCL 0 +#define AM_BSP_GPIO_IOS_SCL 0 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL; //***************************************************************************** @@ -541,7 +541,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL; // IOS_SDA pin: I/O Slave I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_SDA 1 +#define AM_BSP_GPIO_IOS_SDA 1 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA; //***************************************************************************** @@ -549,7 +549,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA; // SWDCK pin: Cortex Serial Wire DCK. // //***************************************************************************** -#define AM_BSP_GPIO_SWDCK 20 +#define AM_BSP_GPIO_SWDCK 20 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK; //***************************************************************************** @@ -557,7 +557,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK; // SWDIO pin: Cortex Serial Wire DIO. // //***************************************************************************** -#define AM_BSP_GPIO_SWDIO 21 +#define AM_BSP_GPIO_SWDIO 21 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDIO; diff --git a/variants/SparkFun_RedBoard_Artemis_ATP/config/variant.cpp b/variants/redboard_artemis_atp/config/variant.cpp similarity index 100% rename from variants/SparkFun_RedBoard_Artemis_ATP/config/variant.cpp rename to variants/redboard_artemis_atp/config/variant.cpp diff --git a/variants/SparkFun_RedBoard_Artemis_ATP/config/variant.h b/variants/redboard_artemis_atp/config/variant.h similarity index 100% rename from variants/SparkFun_RedBoard_Artemis_ATP/config/variant.h rename to variants/redboard_artemis_atp/config/variant.h diff --git a/variants/SparkFun_RedBoard_Artemis_ATP/linker_scripts/gcc/ambiq_sbl_app.ld b/variants/redboard_artemis_atp/linker_scripts/gcc/ambiq_sbl_app.ld similarity index 100% rename from variants/SparkFun_RedBoard_Artemis_ATP/linker_scripts/gcc/ambiq_sbl_app.ld rename to variants/redboard_artemis_atp/linker_scripts/gcc/ambiq_sbl_app.ld diff --git a/variants/SparkFun_RedBoard_Artemis_ATP/linker_scripts/gcc/artemis_sbl_svl_app.ld b/variants/redboard_artemis_atp/linker_scripts/gcc/artemis_sbl_svl_app.ld similarity index 100% rename from variants/SparkFun_RedBoard_Artemis_ATP/linker_scripts/gcc/artemis_sbl_svl_app.ld rename to variants/redboard_artemis_atp/linker_scripts/gcc/artemis_sbl_svl_app.ld diff --git a/variants/SparkFun_RedBoard_Artemis_ATP/startup/startup_gcc.c b/variants/redboard_artemis_atp/startup/startup_gcc.c similarity index 100% rename from variants/SparkFun_RedBoard_Artemis_ATP/startup/startup_gcc.c rename to variants/redboard_artemis_atp/startup/startup_gcc.c diff --git a/variants/SparkFun_RedBoard_Artemis_Nano/bsp/README.md b/variants/redboard_artemis_nano/bsp/README.md similarity index 100% rename from variants/SparkFun_RedBoard_Artemis_Nano/bsp/README.md rename to variants/redboard_artemis_nano/bsp/README.md diff --git a/variants/SparkFun_RedBoard_Artemis_Nano/bsp/am_bsp.c b/variants/redboard_artemis_nano/bsp/am_bsp.c similarity index 100% rename from variants/SparkFun_RedBoard_Artemis_Nano/bsp/am_bsp.c rename to variants/redboard_artemis_nano/bsp/am_bsp.c diff --git a/variants/SparkFun_RedBoard_Artemis_Nano/bsp/am_bsp.h b/variants/redboard_artemis_nano/bsp/am_bsp.h similarity index 100% rename from variants/SparkFun_RedBoard_Artemis_Nano/bsp/am_bsp.h rename to variants/redboard_artemis_nano/bsp/am_bsp.h diff --git a/variants/SparkFun_RedBoard_Artemis_Nano/bsp/am_bsp_pins.c b/variants/redboard_artemis_nano/bsp/am_bsp_pins.c similarity index 100% rename from variants/SparkFun_RedBoard_Artemis_Nano/bsp/am_bsp_pins.c rename to variants/redboard_artemis_nano/bsp/am_bsp_pins.c diff --git a/variants/SparkFun_RedBoard_Artemis_Nano/bsp/am_bsp_pins.h b/variants/redboard_artemis_nano/bsp/am_bsp_pins.h similarity index 88% rename from variants/SparkFun_RedBoard_Artemis_Nano/bsp/am_bsp_pins.h rename to variants/redboard_artemis_nano/bsp/am_bsp_pins.h index 68aeace..0ee70ce 100644 --- a/variants/SparkFun_RedBoard_Artemis_Nano/bsp/am_bsp_pins.h +++ b/variants/redboard_artemis_nano/bsp/am_bsp_pins.h @@ -67,7 +67,7 @@ extern "C" // LED_BLUE pin: The BLUE LED labelled 37. // //***************************************************************************** -#define AM_BSP_GPIO_LED_BLUE 37 +#define AM_BSP_GPIO_LED_BLUE 37 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_BLUE; //***************************************************************************** @@ -75,7 +75,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_BLUE; // MIC_DATA pin: Data line for PDM microphones. // //***************************************************************************** -#define AM_BSP_GPIO_MIC_DATA 36 +#define AM_BSP_GPIO_MIC_DATA 36 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_DATA; //***************************************************************************** @@ -83,7 +83,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_DATA; // MIC_CLK pin: Clock line for PDM microphones. // //***************************************************************************** -#define AM_BSP_GPIO_MIC_CLK 37 +#define AM_BSP_GPIO_MIC_CLK 37 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_CLK; //***************************************************************************** @@ -91,7 +91,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_CLK; // COM_UART_TX pin: This pin is the COM_UART transmit pin. // //***************************************************************************** -#define AM_BSP_GPIO_COM_UART_TX 48 +#define AM_BSP_GPIO_COM_UART_TX 48 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX; //***************************************************************************** @@ -99,7 +99,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX; // COM_UART_RX pin: This pin is the COM_UART receive pin. // //***************************************************************************** -#define AM_BSP_GPIO_COM_UART_RX 49 +#define AM_BSP_GPIO_COM_UART_RX 49 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX; //***************************************************************************** @@ -107,7 +107,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX; // IOM0_CS pin: I/O Master 0 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_CS 11 +#define AM_BSP_GPIO_IOM0_CS 11 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS; #define AM_BSP_IOM0_CS_CHNL 0 @@ -116,7 +116,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS; // IOM0_CS3 pin: I/O Master 0 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_CS3 15 +#define AM_BSP_GPIO_IOM0_CS3 15 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3; #define AM_BSP_IOM0_CS3_CHNL 3 @@ -125,7 +125,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3; // IOM0_MISO pin: I/O Master 0 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_MISO 6 +#define AM_BSP_GPIO_IOM0_MISO 6 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO; //***************************************************************************** @@ -133,7 +133,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO; // IOM0_MOSI pin: I/O Master 0 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_MOSI 7 +#define AM_BSP_GPIO_IOM0_MOSI 7 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI; //***************************************************************************** @@ -141,7 +141,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI; // IOM0_SCK pin: I/O Master 0 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_SCK 5 +#define AM_BSP_GPIO_IOM0_SCK 5 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK; //***************************************************************************** @@ -149,7 +149,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK; // IOM0_SCL pin: I/O Master 0 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_SCL 5 +#define AM_BSP_GPIO_IOM0_SCL 5 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL; //***************************************************************************** @@ -157,7 +157,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL; // IOM0_SDA pin: I/O Master 0 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM0_SDA 6 +#define AM_BSP_GPIO_IOM0_SDA 6 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA; //***************************************************************************** @@ -165,7 +165,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA; // IOM1_CS pin: I/O Master 1 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_CS 14 +#define AM_BSP_GPIO_IOM1_CS 14 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS; #define AM_BSP_IOM1_CS_CHNL 2 @@ -174,7 +174,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS; // IOM1_MISO pin: I/O Master 1 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_MISO 9 +#define AM_BSP_GPIO_IOM1_MISO 9 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO; //***************************************************************************** @@ -182,7 +182,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO; // IOM1_MOSI pin: I/O Master 1 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_MOSI 10 +#define AM_BSP_GPIO_IOM1_MOSI 10 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI; //***************************************************************************** @@ -190,7 +190,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI; // IOM1_SCK pin: I/O Master 1 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_SCK 8 +#define AM_BSP_GPIO_IOM1_SCK 8 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK; //***************************************************************************** @@ -198,7 +198,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK; // IOM1_SCL pin: I/O Master 1 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_SCL 8 +#define AM_BSP_GPIO_IOM1_SCL 8 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL; //***************************************************************************** @@ -206,7 +206,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL; // IOM1_SDA pin: I/O Master 1 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM1_SDA 9 +#define AM_BSP_GPIO_IOM1_SDA 9 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA; //***************************************************************************** @@ -214,7 +214,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA; // IOM2_CS pin: I/O Master 2 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_CS 15 +#define AM_BSP_GPIO_IOM2_CS 15 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS; #define AM_BSP_IOM2_CS_CHNL 3 @@ -223,7 +223,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS; // IOM2_MISO pin: I/O Master 2 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_MISO 25 +#define AM_BSP_GPIO_IOM2_MISO 25 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO; //***************************************************************************** @@ -231,7 +231,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO; // IOM2_MOSI pin: I/O Master 2 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_MOSI 28 +#define AM_BSP_GPIO_IOM2_MOSI 28 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI; //***************************************************************************** @@ -239,7 +239,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI; // IOM2_SCK pin: I/O Master 2 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_SCK 27 +#define AM_BSP_GPIO_IOM2_SCK 27 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK; //***************************************************************************** @@ -247,7 +247,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK; // IOM2_SCL pin: I/O Master 2 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_SCL 27 +#define AM_BSP_GPIO_IOM2_SCL 27 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL; //***************************************************************************** @@ -255,7 +255,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL; // IOM2_SDA pin: I/O Master 2 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM2_SDA 25 +#define AM_BSP_GPIO_IOM2_SDA 25 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA; //***************************************************************************** @@ -263,7 +263,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA; // IOM3_CS pin: I/O Master 3 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_CS 12 +#define AM_BSP_GPIO_IOM3_CS 12 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS; #define AM_BSP_IOM3_CS_CHNL 0 @@ -272,7 +272,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS; // IOM3_MISO pin: I/O Master 3 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_MISO 43 +#define AM_BSP_GPIO_IOM3_MISO 43 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO; //***************************************************************************** @@ -280,7 +280,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO; // IOM3_MOSI pin: I/O Master 3 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_MOSI 38 +#define AM_BSP_GPIO_IOM3_MOSI 38 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI; //***************************************************************************** @@ -288,7 +288,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI; // IOM3_SCK pin: I/O Master 3 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_SCK 42 +#define AM_BSP_GPIO_IOM3_SCK 42 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK; //***************************************************************************** @@ -296,7 +296,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK; // IOM3_SCL pin: I/O Master 3 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_SCL 42 +#define AM_BSP_GPIO_IOM3_SCL 42 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL; //***************************************************************************** @@ -304,7 +304,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL; // IOM3_SDA pin: I/O Master 3 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM3_SDA 43 +#define AM_BSP_GPIO_IOM3_SDA 43 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA; //***************************************************************************** @@ -312,7 +312,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA; // IOM4_CS pin: I/O Master 4 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_CS 13 +#define AM_BSP_GPIO_IOM4_CS 13 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS; #define AM_BSP_IOM4_CS_CHNL 1 @@ -321,7 +321,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS; // IOM4_MISO pin: I/O Master 4 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_MISO 40 +#define AM_BSP_GPIO_IOM4_MISO 40 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO; //***************************************************************************** @@ -329,7 +329,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO; // IOM4_MOSI pin: I/O Master 4 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_MOSI 44 +#define AM_BSP_GPIO_IOM4_MOSI 44 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI; //***************************************************************************** @@ -337,7 +337,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI; // IOM4_SCK pin: I/O Master 4 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_SCK 39 +#define AM_BSP_GPIO_IOM4_SCK 39 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK; //***************************************************************************** @@ -345,7 +345,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK; // IOM4_SCL pin: I/O Master 4 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_SCL 39 +#define AM_BSP_GPIO_IOM4_SCL 39 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL; //***************************************************************************** @@ -353,7 +353,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL; // IOM4_SDA pin: I/O Master 4 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM4_SDA 40 +#define AM_BSP_GPIO_IOM4_SDA 40 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA; //***************************************************************************** @@ -361,7 +361,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA; // IOM5_CS pin: I/O Master 5 chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_CS 16 +#define AM_BSP_GPIO_IOM5_CS 16 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS; #define AM_BSP_IOM5_CS_CHNL 0 @@ -370,7 +370,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS; // IOM5_MISO pin: I/O Master 5 SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_MISO 49 +#define AM_BSP_GPIO_IOM5_MISO 49 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO; //***************************************************************************** @@ -378,7 +378,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO; // IOM5_MOSI pin: I/O Master 5 SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_MOSI 47 +#define AM_BSP_GPIO_IOM5_MOSI 47 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI; //***************************************************************************** @@ -386,7 +386,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI; // IOM5_SCK pin: I/O Master 5 SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_SCK 48 +#define AM_BSP_GPIO_IOM5_SCK 48 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK; //***************************************************************************** @@ -394,7 +394,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK; // IOM5_SCL pin: I/O Master 5 I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_SCL 48 +#define AM_BSP_GPIO_IOM5_SCL 48 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL; //***************************************************************************** @@ -402,7 +402,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL; // IOM5_SDA pin: I/O Master 5 I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOM5_SDA 49 +#define AM_BSP_GPIO_IOM5_SDA 49 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA; //***************************************************************************** @@ -410,7 +410,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA; // MSPI_CE0 pin: MSPI chip select. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_CE0 19 +#define AM_BSP_GPIO_MSPI_CE0 19 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0; #define AM_BSP_MSPI_CE0_CHNL 0 @@ -419,7 +419,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0; // MSPI_CE1 pin: MSPI chip select. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_CE1 41 +#define AM_BSP_GPIO_MSPI_CE1 41 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1; #define AM_BSP_MSPI_CE1_CHNL 1 @@ -428,7 +428,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1; // MSPI_D0 pin: MSPI data 0. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D0 22 +#define AM_BSP_GPIO_MSPI_D0 22 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0; //***************************************************************************** @@ -436,7 +436,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0; // MSPI_D1 pin: MSPI data 1. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D1 26 +#define AM_BSP_GPIO_MSPI_D1 26 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1; //***************************************************************************** @@ -444,7 +444,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1; // MSPI_D2 pin: MSPI data 2. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D2 4 +#define AM_BSP_GPIO_MSPI_D2 4 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2; //***************************************************************************** @@ -452,7 +452,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2; // MSPI_D3 pin: MSPI data 3. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D3 23 +#define AM_BSP_GPIO_MSPI_D3 23 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3; //***************************************************************************** @@ -460,7 +460,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3; // MSPI_D4 pin: MSPI data 4. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D4 0 +#define AM_BSP_GPIO_MSPI_D4 0 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4; //***************************************************************************** @@ -468,7 +468,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4; // MSPI_D5 pin: MSPI data 5. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D5 1 +#define AM_BSP_GPIO_MSPI_D5 1 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5; //***************************************************************************** @@ -476,7 +476,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5; // MSPI_D6 pin: MSPI data 6. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D6 2 +#define AM_BSP_GPIO_MSPI_D6 2 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6; //***************************************************************************** @@ -484,7 +484,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6; // MSPI_D7 pin: MSPI data 7. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_D7 3 +#define AM_BSP_GPIO_MSPI_D7 3 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7; //***************************************************************************** @@ -492,7 +492,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7; // MSPI_SCK pin: MSPI clock. // //***************************************************************************** -#define AM_BSP_GPIO_MSPI_SCK 24 +#define AM_BSP_GPIO_MSPI_SCK 24 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK; //***************************************************************************** @@ -500,7 +500,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK; // IOS_CE pin: I/O Slave chip select. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_CE 3 +#define AM_BSP_GPIO_IOS_CE 3 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE; #define AM_BSP_IOS_CE_CHNL 0 @@ -509,7 +509,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE; // IOS_MISO pin: I/O Slave SPI MISO signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_MISO 2 +#define AM_BSP_GPIO_IOS_MISO 2 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO; //***************************************************************************** @@ -517,7 +517,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO; // IOS_MOSI pin: I/O Slave SPI MOSI signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_MOSI 1 +#define AM_BSP_GPIO_IOS_MOSI 1 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI; //***************************************************************************** @@ -525,7 +525,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI; // IOS_SCK pin: I/O Slave SPI SCK signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_SCK 0 +#define AM_BSP_GPIO_IOS_SCK 0 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK; //***************************************************************************** @@ -533,7 +533,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK; // IOS_SCL pin: I/O Slave I2C clock signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_SCL 0 +#define AM_BSP_GPIO_IOS_SCL 0 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL; //***************************************************************************** @@ -541,7 +541,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL; // IOS_SDA pin: I/O Slave I2C data signal. // //***************************************************************************** -#define AM_BSP_GPIO_IOS_SDA 1 +#define AM_BSP_GPIO_IOS_SDA 1 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA; //***************************************************************************** @@ -549,7 +549,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA; // SWDCK pin: Cortex Serial Wire DCK. // //***************************************************************************** -#define AM_BSP_GPIO_SWDCK 20 +#define AM_BSP_GPIO_SWDCK 20 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK; //***************************************************************************** @@ -557,7 +557,7 @@ extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK; // SWDIO pin: Cortex Serial Wire DIO. // //***************************************************************************** -#define AM_BSP_GPIO_SWDIO 21 +#define AM_BSP_GPIO_SWDIO 21 extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDIO; diff --git a/variants/SparkFun_RedBoard_Artemis_Nano/config/variant.cpp b/variants/redboard_artemis_nano/config/variant.cpp similarity index 100% rename from variants/SparkFun_RedBoard_Artemis_Nano/config/variant.cpp rename to variants/redboard_artemis_nano/config/variant.cpp diff --git a/variants/SparkFun_RedBoard_Artemis_Nano/config/variant.h b/variants/redboard_artemis_nano/config/variant.h similarity index 100% rename from variants/SparkFun_RedBoard_Artemis_Nano/config/variant.h rename to variants/redboard_artemis_nano/config/variant.h diff --git a/variants/SparkFun_RedBoard_Artemis_Nano/linker_scripts/gcc/ambiq_sbl_app.ld b/variants/redboard_artemis_nano/linker_scripts/gcc/ambiq_sbl_app.ld similarity index 100% rename from variants/SparkFun_RedBoard_Artemis_Nano/linker_scripts/gcc/ambiq_sbl_app.ld rename to variants/redboard_artemis_nano/linker_scripts/gcc/ambiq_sbl_app.ld diff --git a/variants/SparkFun_RedBoard_Artemis_Nano/linker_scripts/gcc/artemis_sbl_svl_app.ld b/variants/redboard_artemis_nano/linker_scripts/gcc/artemis_sbl_svl_app.ld similarity index 100% rename from variants/SparkFun_RedBoard_Artemis_Nano/linker_scripts/gcc/artemis_sbl_svl_app.ld rename to variants/redboard_artemis_nano/linker_scripts/gcc/artemis_sbl_svl_app.ld diff --git a/variants/SparkFun_RedBoard_Artemis_Nano/startup/startup_gcc.c b/variants/redboard_artemis_nano/startup/startup_gcc.c similarity index 100% rename from variants/SparkFun_RedBoard_Artemis_Nano/startup/startup_gcc.c rename to variants/redboard_artemis_nano/startup/startup_gcc.c