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add const unsigned int to simd-verify, shrink test_xabort
1 parent f6c66d1 commit e41b5a7

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2 files changed

+6
-4
lines changed

2 files changed

+6
-4
lines changed

crates/core_arch/src/x86/rtm.rs

+5-4
Original file line numberDiff line numberDiff line change
@@ -126,18 +126,19 @@ mod tests {
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127127
#[simd_test(enable = "rtm")]
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unsafe fn test_xabort() {
129+
const ABORT_CODE: u32 = 42;
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// aborting outside a transactional region does nothing
130-
_xabort(0);
131+
_xabort(ABORT_CODE);
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132-
for abort_code in 0..10 {
133+
for _ in 0..10 {
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let mut x = 0;
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let code = rtm::_xbegin();
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if code == _XBEGIN_STARTED {
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x += 1;
137-
rtm::_xabort(abort_code);
138+
rtm::_xabort(ABORT_CODE);
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} else if code & _XABORT_EXPLICIT != 0 {
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let test_abort_code = rtm::_xabort_code(code);
140-
assert_eq!(test_abort_code, abort_code);
141+
assert_eq!(test_abort_code, ABORT_CODE);
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}
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assert_eq!(x, 0);
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}

crates/stdsimd-verify/tests/x86-intel.rs

+1
Original file line numberDiff line numberDiff line change
@@ -426,6 +426,7 @@ fn equate(t: &Type, intel: &str, intrinsic: &str, is_const: bool) -> Result<(),
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(&Type::PrimSigned(8), "char") => {}
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(&Type::PrimUnsigned(16), "unsigned short") => {}
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(&Type::PrimUnsigned(32), "unsigned int") => {}
429+
(&Type::PrimUnsigned(32), "const unsigned int") => {}
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(&Type::PrimUnsigned(64), "unsigned __int64") => {}
430431
(&Type::PrimUnsigned(8), "unsigned char") => {}
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