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Fix: Change to 'rustc_legacy_const_generics'
1 parent a3e83d2 commit db78d79

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3 files changed

+120
-184
lines changed

3 files changed

+120
-184
lines changed

crates/core_arch/src/riscv32/zk.rs

+43-82
Original file line numberDiff line numberDiff line change
@@ -1,19 +1,28 @@
1-
#[allow(unused)]
21
use core::arch::asm;
32

4-
#[allow(unused)]
5-
macro_rules! constify_imm2 {
6-
($imm2:expr, $expand:ident) => {
7-
#[allow(overflowing_literals)]
8-
match $imm2 & 0b11 {
9-
0b00 => $expand!(0),
10-
0b01 => $expand!(1),
11-
0b10 => $expand!(2),
12-
_ => $expand!(3),
13-
}
3+
macro_rules! static_assert_imm2 {
4+
($imm:ident) => {
5+
static_assert!(
6+
$imm < 4,
7+
"Immediate value allowed to be a constant from 0 up to including 3"
8+
)
149
};
1510
}
1611

12+
extern "unadjusted" {
13+
#[link_name = "llvm.riscv.aes32esi"]
14+
fn _aes32esi(rs1: i32, rs2: i32, bs: i32) -> i32;
15+
16+
#[link_name = "llvm.riscv.aes32esmi"]
17+
fn _aes32esmi(rs1: i32, rs2: i32, bs: i32) -> i32;
18+
19+
#[link_name = "llvm.riscv.aes32dsi"]
20+
fn _aes32dsi(rs1: i32, rs2: i32, bs: i32) -> i32;
21+
22+
#[link_name = "llvm.riscv.aes32dsmi"]
23+
fn _aes32dsmi(rs1: i32, rs2: i32, bs: i32) -> i32;
24+
}
25+
1726
/// AES final round encryption instruction for RV32.
1827
///
1928
/// This instruction sources a single byte from rs2 according to bs. To this it applies the
@@ -29,32 +38,20 @@ macro_rules! constify_imm2 {
2938
///
3039
/// # Note
3140
///
32-
/// The `bs` parameter is expected to be a constant value and only the bottom 2 bits of `bs` are
41+
/// The `BS` parameter is expected to be a constant value and only the bottom 2 bits of `bs` are
3342
/// used.
3443
///
3544
/// # Safety
3645
///
3746
/// This function is safe to use if the `zkne` target feature is present.
3847
#[target_feature(enable = "zkne")]
48+
#[rustc_legacy_const_generics(2)]
3949
#[cfg_attr(test, assert_instr(aes32esi))]
4050
#[inline]
41-
pub unsafe fn aes32esi(rs1: u32, rs2: u32, bs: u8) -> u32 {
42-
macro_rules! aes32esi {
43-
($imm2:expr) => {{
44-
let value: u32;
45-
unsafe {
46-
asm!(
47-
concat!("aes32esi {rd},{rs1},{rs2},", $imm2),
48-
rd = lateout(reg) value,
49-
rs1 = in(reg) rs1,
50-
rs2 = in(reg) rs2,
51-
options(pure, nomem, nostack),
52-
);
53-
}
54-
value
55-
}}
56-
}
57-
constify_imm2!(bs, aes32esi)
51+
pub unsafe fn aes32esi<const BS: u8>(rs1: u32, rs2: u32) -> u32 {
52+
static_assert_imm2!(BS);
53+
54+
_aes32esi(rs1 as i32, rs2 as i32, BS as i32) as u32
5855
}
5956

6057
/// AES middle round encryption instruction for RV32 with.
@@ -79,25 +76,13 @@ pub unsafe fn aes32esi(rs1: u32, rs2: u32, bs: u8) -> u32 {
7976
///
8077
/// This function is safe to use if the `zkne` target feature is present.
8178
#[target_feature(enable = "zkne")]
79+
#[rustc_legacy_const_generics(2)]
8280
#[cfg_attr(test, assert_instr(aes32esmi))]
8381
#[inline]
84-
pub unsafe fn aes32esmi(rs1: u32, rs2: u32, bs: u8) -> u32 {
85-
macro_rules! aes32esmi {
86-
($imm2:expr) => {{
87-
let value: u32;
88-
unsafe {
89-
asm!(
90-
concat!("aes32esmi {rd},{rs1},{rs2},", $imm2),
91-
rd = lateout(reg) value,
92-
rs1 = in(reg) rs1,
93-
rs2 = in(reg) rs2,
94-
options(pure, nomem, nostack),
95-
);
96-
}
97-
value
98-
}}
99-
}
100-
constify_imm2!(bs, aes32esmi)
82+
pub unsafe fn aes32esmi<const BS: u8>(rs1: u32, rs2: u32) -> u32 {
83+
static_assert_imm2!(BS);
84+
85+
_aes32esmi(rs1 as i32, rs2 as i32, BS as i32) as u32
10186
}
10287

10388
/// AES final round decryption instruction for RV32.
@@ -114,32 +99,20 @@ pub unsafe fn aes32esmi(rs1: u32, rs2: u32, bs: u8) -> u32 {
11499
///
115100
/// # Note
116101
///
117-
/// The `bs` parameter is expected to be a constant value and only the bottom 2 bits of `bs` are
102+
/// The `BS` parameter is expected to be a constant value and only the bottom 2 bits of `bs` are
118103
/// used.
119104
///
120105
/// # Safety
121106
///
122107
/// This function is safe to use if the `zknd` target feature is present.
123108
#[target_feature(enable = "zknd")]
109+
#[rustc_legacy_const_generics(2)]
124110
#[cfg_attr(test, assert_instr(aes32dsi))]
125111
#[inline]
126-
pub unsafe fn aes32dsi(rs1: u32, rs2: u32, bs: u8) -> u32 {
127-
macro_rules! aes32dsi {
128-
($imm2:expr) => {{
129-
let value: u32;
130-
unsafe {
131-
asm!(
132-
concat!("aes32dsi {rd},{rs1},{rs2},", $imm2),
133-
rd = lateout(reg) value,
134-
rs1 = in(reg) rs1,
135-
rs2 = in(reg) rs2,
136-
options(pure, nomem, nostack),
137-
);
138-
}
139-
value
140-
}}
141-
}
142-
constify_imm2!(bs, aes32dsi)
112+
pub unsafe fn aes32dsi<const BS: u8>(rs1: u32, rs2: u32) -> u32 {
113+
static_assert_imm2!(BS);
114+
115+
_aes32dsi(rs1 as i32, rs2 as i32, BS as i32) as u32
143116
}
144117

145118
/// AES middle round decryption instruction for RV32.
@@ -157,32 +130,20 @@ pub unsafe fn aes32dsi(rs1: u32, rs2: u32, bs: u8) -> u32 {
157130
///
158131
/// # Note
159132
///
160-
/// The `bs` parameter is expected to be a constant value and only the bottom 2 bits of `bs` are
133+
/// The `BS` parameter is expected to be a constant value and only the bottom 2 bits of `bs` are
161134
/// used.
162135
///
163136
/// # Safety
164137
///
165138
/// This function is safe to use if the `zknd` target feature is present.
166139
#[target_feature(enable = "zknd")]
140+
#[rustc_legacy_const_generics(2)]
167141
#[cfg_attr(test, assert_instr(aes32dsmi))]
168142
#[inline]
169-
pub unsafe fn aes32dsmi(rs1: u32, rs2: u32, bs: u8) -> u32 {
170-
macro_rules! aes32dsmi {
171-
($imm2:expr) => {{
172-
let value: u32;
173-
unsafe {
174-
asm!(
175-
concat!("aes32dsmi {rd},{rs1},{rs2},", $imm2),
176-
rd = lateout(reg) value,
177-
rs1 = in(reg) rs1,
178-
rs2 = in(reg) rs2,
179-
options(pure, nomem, nostack),
180-
);
181-
}
182-
value
183-
}}
184-
}
185-
constify_imm2!(bs, aes32dsmi)
143+
pub unsafe fn aes32dsmi<const BS: u8>(rs1: u32, rs2: u32) -> u32 {
144+
static_assert_imm2!(BS);
145+
146+
_aes32dsmi(rs1 as i32, rs2 as i32, BS as i32) as u32
186147
}
187148

188149
/// Place upper/lower halves of the source register into odd/even bits of the destination

crates/core_arch/src/riscv64/zk.rs

+17-35
Original file line numberDiff line numberDiff line change
@@ -1,25 +1,19 @@
1-
#[allow(unused)]
21
use core::arch::asm;
32

4-
#[allow(unused)]
5-
macro_rules! constify_imm_0_until_10 {
6-
($imm2:expr, $expand:ident) => {
7-
match $imm2 {
8-
1 => $expand!(1),
9-
2 => $expand!(2),
10-
3 => $expand!(3),
11-
4 => $expand!(4),
12-
5 => $expand!(5),
13-
6 => $expand!(6),
14-
7 => $expand!(7),
15-
8 => $expand!(8),
16-
9 => $expand!(9),
17-
10 => $expand!(10),
18-
_ => $expand!(0),
19-
}
3+
macro_rules! static_assert_imm_0_until_10 {
4+
($imm:ident) => {
5+
static_assert!(
6+
$imm <= 10,
7+
"Immediate value allowed to be a constant from 0 up to including 10"
8+
)
209
};
2110
}
2211

12+
extern "unadjusted" {
13+
#[link_name = "llvm.riscv.aes64ks1i"]
14+
fn _aes64ks1i(rs1: i64, rnum: i32) -> i64;
15+
}
16+
2317
/// AES final round encryption instruction for RV64.
2418
///
2519
/// Uses the two 64-bit source registers to represent the entire AES state, and produces half
@@ -168,31 +162,19 @@ pub unsafe fn aes64dsm(rs1: u64, rs2: u64) -> u64 {
168162
///
169163
/// # Note
170164
///
171-
/// The `rnum` parameter is expected to be a constant value inside the range of `0..=10`, if a
172-
/// value outside the valid range is given it uses `rnum=0`.
165+
/// The `RNUM` parameter is expected to be a constant value inside the range of `0..=10`.
173166
///
174167
/// # Safety
175168
///
176169
/// This function is safe to use if the `zkne` or `zknd` target feature is present.
177170
#[target_feature(enable = "zkne", enable = "zknd")]
171+
#[rustc_legacy_const_generics(1)]
178172
#[cfg_attr(test, assert_instr(aes64ks1i))]
179173
#[inline]
180-
pub unsafe fn aes64ks1i(rs1: u64, rnum: u8) -> u64 {
181-
macro_rules! aes64ks1i {
182-
($imm_0_until_10:expr) => {{
183-
let value: u64;
184-
unsafe {
185-
asm!(
186-
concat!("aes64ks1i {rd},{rs1},", $imm_0_until_10),
187-
rd = lateout(reg) value,
188-
rs1 = in(reg) rs1,
189-
options(pure, nomem, nostack),
190-
)
191-
}
192-
value
193-
}}
194-
}
195-
constify_imm_0_until_10!(rnum, aes64ks1i)
174+
pub unsafe fn aes64ks1i<const RNUM: u8>(rs1: u64) -> u64 {
175+
static_assert_imm_0_until_10!(RNUM);
176+
177+
_aes64ks1i(rs1 as i64, RNUM as i32) as u64
196178
}
197179

198180
/// This instruction implements part of the KeySchedule operation for the AES Block cipher.

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