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gnzlbg
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Split protable vector types tests into multiple crates (#379)
* split the portable vector tests into separate crates * use rustc reductions
1 parent 3a5ab60 commit c5cf3bc

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+1039
-1756
lines changed

‎ci/run.sh

+4-10
Original file line numberDiff line numberDiff line change
@@ -2,21 +2,14 @@
22

33
set -ex
44

5+
: ${TARGET?"The TARGET environment variable must be set."}
6+
57
# Tests are all super fast anyway, and they fault often enough on travis that
68
# having only one thread increases debuggability to be worth it.
79
export RUST_TEST_THREADS=1
810
#export RUST_BACKTRACE=1
911
#export RUST_TEST_NOCAPTURE=1
1012

11-
# FIXME(rust-lang-nursery/stdsimd#120) run-time feature detection for ARM Neon
12-
case ${TARGET} in
13-
aarch*)
14-
export RUSTFLAGS="${RUSTFLAGS} -C target-feature=+neon"
15-
;;
16-
*)
17-
;;
18-
esac
19-
2013
FEATURES="strict,$FEATURES"
2114

2215
echo "RUSTFLAGS=${RUSTFLAGS}"
@@ -25,7 +18,8 @@ echo "OBJDUMP=${OBJDUMP}"
2518

2619
cargo_test() {
2720
cmd="cargo test --target=$TARGET --features $FEATURES $1"
28-
cmd="$cmd -p coresimd -p stdsimd --manifest-path crates/stdsimd/Cargo.toml"
21+
cmd="$cmd -p coresimd -p stdsimd"
22+
cmd="$cmd --manifest-path crates/stdsimd/Cargo.toml"
2923
cmd="$cmd -- $2"
3024
$cmd
3125
}

‎coresimd/ppsv/api/arithmetic_ops.rs

+16-11
Original file line numberDiff line numberDiff line change
@@ -1,76 +1,82 @@
11
//! Lane-wise arithmetic operations.
2+
#![allow(unused)]
23

34
macro_rules! impl_arithmetic_ops {
45
($id:ident) => {
5-
impl ops::Add for $id {
6+
impl ::ops::Add for $id {
67
type Output = Self;
78
#[inline]
89
fn add(self, other: Self) -> Self {
10+
use coresimd::simd_llvm::simd_add;
911
unsafe { simd_add(self, other) }
1012
}
1113
}
1214

13-
impl ops::Sub for $id {
15+
impl ::ops::Sub for $id {
1416
type Output = Self;
1517
#[inline]
1618
fn sub(self, other: Self) -> Self {
19+
use coresimd::simd_llvm::simd_sub;
1720
unsafe { simd_sub(self, other) }
1821
}
1922
}
2023

21-
impl ops::Mul for $id {
24+
impl ::ops::Mul for $id {
2225
type Output = Self;
2326
#[inline]
2427
fn mul(self, other: Self) -> Self {
28+
use coresimd::simd_llvm::simd_mul;
2529
unsafe { simd_mul(self, other) }
2630
}
2731
}
2832

29-
impl ops::Div for $id {
33+
impl ::ops::Div for $id {
3034
type Output = Self;
3135
#[inline]
3236
fn div(self, other: Self) -> Self {
37+
use coresimd::simd_llvm::simd_div;
3338
unsafe { simd_div(self, other) }
3439
}
3540
}
3641

37-
impl ops::Rem for $id {
42+
impl ::ops::Rem for $id {
3843
type Output = Self;
3944
#[inline]
4045
fn rem(self, other: Self) -> Self {
46+
use coresimd::simd_llvm::simd_rem;
4147
unsafe { simd_rem(self, other) }
4248
}
4349
}
4450

45-
impl ops::AddAssign for $id {
51+
impl ::ops::AddAssign for $id {
4652
#[inline]
4753
fn add_assign(&mut self, other: Self) {
4854
*self = *self + other;
4955
}
5056
}
5157

52-
impl ops::SubAssign for $id {
58+
impl ::ops::SubAssign for $id {
5359
#[inline]
5460
fn sub_assign(&mut self, other: Self) {
5561
*self = *self - other;
5662
}
5763
}
5864

59-
impl ops::MulAssign for $id {
65+
impl ::ops::MulAssign for $id {
6066
#[inline]
6167
fn mul_assign(&mut self, other: Self) {
6268
*self = *self * other;
6369
}
6470
}
6571

66-
impl ops::DivAssign for $id {
72+
impl ::ops::DivAssign for $id {
6773
#[inline]
6874
fn div_assign(&mut self, other: Self) {
6975
*self = *self / other;
7076
}
7177
}
7278

73-
impl ops::RemAssign for $id {
79+
impl ::ops::RemAssign for $id {
7480
#[inline]
7581
fn rem_assign(&mut self, other: Self) {
7682
*self = *self % other;
@@ -80,7 +86,6 @@ macro_rules! impl_arithmetic_ops {
8086
}
8187

8288
#[cfg(test)]
83-
#[macro_export]
8489
macro_rules! test_arithmetic_ops {
8590
($id:ident, $elem_ty:ident) => {
8691
#[test]

‎coresimd/ppsv/api/arithmetic_reductions.rs

+50-2
Original file line numberDiff line numberDiff line change
@@ -1,17 +1,65 @@
11
//! Implements portable arithmetic vector reductions.
2+
#![allow(unused)]
23

34
macro_rules! impl_arithmetic_reductions {
45
($id:ident, $elem_ty:ident) => {
56
impl $id {
67
/// Lane-wise addition of the vector elements.
8+
///
9+
/// FIXME: document guarantees with respect to:
10+
/// * integers: overflow behavior
11+
/// * floats: order and NaNs
12+
#[cfg(not(target_arch = "aarch64"))]
713
#[inline]
814
pub fn sum(self) -> $elem_ty {
9-
ReduceAdd::reduce_add(self)
15+
use ::coresimd::simd_llvm::simd_reduce_add_ordered;
16+
unsafe {
17+
simd_reduce_add_ordered(self, 0 as $elem_ty)
18+
}
1019
}
20+
/// Lane-wise addition of the vector elements.
21+
///
22+
/// FIXME: document guarantees with respect to:
23+
/// * integers: overflow behavior
24+
/// * floats: order and NaNs
25+
#[cfg(target_arch = "aarch64")]
26+
#[inline]
27+
pub fn sum(self) -> $elem_ty {
28+
// FIXME: broken on AArch64
29+
let mut x = self.extract(0) as $elem_ty;
30+
for i in 1..$id::lanes() {
31+
x += self.extract(i) as $elem_ty;
32+
}
33+
x
34+
}
35+
1136
/// Lane-wise multiplication of the vector elements.
37+
///
38+
/// FIXME: document guarantees with respect to:
39+
/// * integers: overflow behavior
40+
/// * floats: order and NaNs
41+
#[cfg(not(target_arch = "aarch64"))]
1242
#[inline]
1343
pub fn product(self) -> $elem_ty {
14-
ReduceMul::reduce_mul(self)
44+
use ::coresimd::simd_llvm::simd_reduce_mul_ordered;
45+
unsafe {
46+
simd_reduce_mul_ordered(self, 1 as $elem_ty)
47+
}
48+
}
49+
/// Lane-wise multiplication of the vector elements.
50+
///
51+
/// FIXME: document guarantees with respect to:
52+
/// * integers: overflow behavior
53+
/// * floats: order and NaNs
54+
#[cfg(target_arch = "aarch64")]
55+
#[inline]
56+
pub fn product(self) -> $elem_ty {
57+
// FIXME: broken on AArch64
58+
let mut x = self.extract(0) as $elem_ty;
59+
for i in 1..$id::lanes() {
60+
x *= self.extract(i) as $elem_ty;
61+
}
62+
x
1563
}
1664
}
1765
}

‎coresimd/ppsv/api/bitwise_ops.rs

+11-9
Original file line numberDiff line numberDiff line change
@@ -1,48 +1,52 @@
11
//! Lane-wise bitwise operations for integer and boolean vectors.
2+
#![allow(unused)]
23

34
macro_rules! impl_bitwise_ops {
45
($ty:ident, $true_val:expr) => {
5-
impl ops::Not for $ty {
6+
impl ::ops::Not for $ty {
67
type Output = Self;
78
#[inline]
89
fn not(self) -> Self {
910
Self::splat($true_val) ^ self
1011
}
1112
}
12-
impl ops::BitXor for $ty {
13+
impl ::ops::BitXor for $ty {
1314
type Output = Self;
1415
#[inline]
1516
fn bitxor(self, other: Self) -> Self {
17+
use coresimd::simd_llvm::simd_xor;
1618
unsafe { simd_xor(self, other) }
1719
}
1820
}
19-
impl ops::BitAnd for $ty {
21+
impl ::ops::BitAnd for $ty {
2022
type Output = Self;
2123
#[inline]
2224
fn bitand(self, other: Self) -> Self {
25+
use coresimd::simd_llvm::simd_and;
2326
unsafe { simd_and(self, other) }
2427
}
2528
}
26-
impl ops::BitOr for $ty {
29+
impl ::ops::BitOr for $ty {
2730
type Output = Self;
2831
#[inline]
2932
fn bitor(self, other: Self) -> Self {
33+
use coresimd::simd_llvm::simd_or;
3034
unsafe { simd_or(self, other) }
3135
}
3236
}
33-
impl ops::BitAndAssign for $ty {
37+
impl ::ops::BitAndAssign for $ty {
3438
#[inline]
3539
fn bitand_assign(&mut self, other: Self) {
3640
*self = *self & other;
3741
}
3842
}
39-
impl ops::BitOrAssign for $ty {
43+
impl ::ops::BitOrAssign for $ty {
4044
#[inline]
4145
fn bitor_assign(&mut self, other: Self) {
4246
*self = *self | other;
4347
}
4448
}
45-
impl ops::BitXorAssign for $ty {
49+
impl ::ops::BitXorAssign for $ty {
4650
#[inline]
4751
fn bitxor_assign(&mut self, other: Self) {
4852
*self = *self ^ other;
@@ -52,7 +56,6 @@ macro_rules! impl_bitwise_ops {
5256
}
5357

5458
#[cfg(test)]
55-
#[macro_export]
5659
macro_rules! test_int_bitwise_ops {
5760
($id:ident, $elem_ty:ident) => {
5861
#[test]
@@ -117,7 +120,6 @@ macro_rules! test_int_bitwise_ops {
117120
}
118121

119122
#[cfg(test)]
120-
#[macro_export]
121123
macro_rules! test_bool_bitwise_ops {
122124
($id:ident) => {
123125
#[test]

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