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//! Intel's Restricted Transactional Memory (RTM).
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- //!
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+ //!
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//! This CPU feature is available on Intel Broadwell or later CPUs (and some Haswell).
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- //!
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+ //!
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//! The reference is [Intel 64 and IA-32 Architectures Software Developer's
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//! Manual Volume 2: Instruction Set Reference, A-Z][intel64_ref].
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- //!
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+ //!
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//! [Wikipedia][wikipedia_rtm] provides a quick overview of the assembly instructions, and
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//! Intel's [programming considerations][intel_consid] details what sorts of instructions within a
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//! transaction are likely to cause an abort.
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- //!
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+ //!
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//! [intel64_ref]: http://www.intel.de/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf
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//! [wikipedia_rtm]: https://en.wikipedia.org/wiki/Transactional_Synchronization_Extensions#Restricted_Transactional_Memory
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//! [intel_consid]: https://software.intel.com/en-us/cpp-compiler-developer-guide-and-reference-intel-transactional-synchronization-extensions-intel-tsx-programming-considerations
@@ -97,7 +97,7 @@ pub unsafe fn _xtest() -> u8 {
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x86_xtest ( ) as _
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}
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- /// Retrieves the parameter passed to [`_xabort`] when [`_xbegin`]'s status has the
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+ /// Retrieves the parameter passed to [`_xabort`] when [`_xbegin`]'s status has the
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/// `_XABORT_EXPLICIT` flag set.
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#[ inline]
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pub const fn _xabort_code ( status : u32 ) -> u32 {
@@ -119,7 +119,7 @@ mod tests {
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x += 1 ;
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rtm:: _xend ( ) ;
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assert_eq ! ( x, 1 ) ;
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- break
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+ break ;
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}
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assert_eq ! ( x, 0 ) ;
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}
@@ -158,7 +158,7 @@ mod tests {
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// putting the assert inside the transaction would abort the transaction on fail
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// without any output/panic/etc
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assert_eq ! ( in_tx, 1 ) ;
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- break
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+ break ;
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}
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}
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}
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