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Fix up const values
1 parent 2357f08 commit 2ba0171

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+48
-45
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+48
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crates/core_arch/src/arm/neon.rs

+48-45
Original file line numberDiff line numberDiff line change
@@ -1517,9 +1517,10 @@ arm_reinterpret!(vreinterpretq_u8_s8, int8x16_t, uint8x16_t);
15171517
#[inline]
15181518
#[target_feature(enable = "neon")]
15191519
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1520-
#[cfg_attr(test, assert_instr(ext))]
1521-
pub unsafe fn vextq_s8(a: int8x16_t, b: int8x16_t, n: u32) -> int8x16_t {
1522-
if n > 16 {
1520+
#[cfg_attr(test, assert_instr(ext, n = 0))]
1521+
#[rustc_args_required_const(2)]
1522+
pub unsafe fn vextq_s8(a: int8x16_t, b: int8x16_t, n: i32) -> int8x16_t {
1523+
if n < 0 || n > 16 {
15231524
unreachable_unchecked();
15241525
};
15251526
match n & 0b1111 {
@@ -1577,64 +1578,66 @@ pub unsafe fn vextq_s8(a: int8x16_t, b: int8x16_t, n: u32) -> int8x16_t {
15771578
#[inline]
15781579
#[target_feature(enable = "neon")]
15791580
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1580-
#[cfg_attr(test, assert_instr(ushr))]
1581-
pub unsafe fn vshrq_n_u8(a: uint8x16_t, imm8: u32) -> uint8x16_t {
1581+
#[cfg_attr(test, assert_instr(ushr, imm3 = 1))]
1582+
#[rustc_args_required_const(1)]
1583+
pub unsafe fn vshrq_n_u8(a: uint8x16_t, imm3: i32) -> uint8x16_t {
15821584
macro_rules! call {
1583-
($imm8:expr) => {
1584-
if $imm8 == 0 {
1585+
($imm3:expr) => {
1586+
if $imm3 == 0 {
15851587
unreachable_unchecked();
15861588
} else {
15871589
uint8x16_t(
1588-
a.0 >> $imm8,
1589-
a.1 >> $imm8,
1590-
a.2 >> $imm8,
1591-
a.3 >> $imm8,
1592-
a.4 >> $imm8,
1593-
a.5 >> $imm8,
1594-
a.6 >> $imm8,
1595-
a.7 >> $imm8,
1596-
a.8 >> $imm8,
1597-
a.9 >> $imm8,
1598-
a.10 >> $imm8,
1599-
a.11 >> $imm8,
1600-
a.12 >> $imm8,
1601-
a.13 >> $imm8,
1602-
a.14 >> $imm8,
1603-
a.15 >> $imm8,
1590+
a.0 >> $imm3,
1591+
a.1 >> $imm3,
1592+
a.2 >> $imm3,
1593+
a.3 >> $imm3,
1594+
a.4 >> $imm3,
1595+
a.5 >> $imm3,
1596+
a.6 >> $imm3,
1597+
a.7 >> $imm3,
1598+
a.8 >> $imm3,
1599+
a.9 >> $imm3,
1600+
a.10 >> $imm3,
1601+
a.11 >> $imm3,
1602+
a.12 >> $imm3,
1603+
a.13 >> $imm3,
1604+
a.14 >> $imm3,
1605+
a.15 >> $imm3,
16041606
)
16051607
}
16061608
};
16071609
}
1608-
constify_imm3!(imm8, call)
1610+
constify_imm3!(imm3, call)
16091611
}
16101612

16111613
//uint8x16_t vshlq_n_u8 (uint8x16_t a, const int n)
16121614
#[inline]
16131615
#[target_feature(enable = "neon")]
16141616
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
16151617
#[cfg_attr(test, assert_instr(ushl))]
1616-
pub unsafe fn vshlq_n_u8(a: uint8x16_t, n: u32) -> uint8x16_t {
1617-
if n > 7 {
1618+
pub unsafe fn vshlq_n_u8(a: uint8x16_t, n: i32) -> uint8x16_t {
1619+
if n < 0 || n > 7 {
16181620
unreachable_unchecked();
1619-
};
1620-
uint8x16_t(
1621-
a.0 << n,
1622-
a.1 << n,
1623-
a.2 << n,
1624-
a.3 << n,
1625-
a.4 << n,
1626-
a.5 << n,
1627-
a.6 << n,
1628-
a.7 << n,
1629-
a.8 << n,
1630-
a.9 << n,
1631-
a.10 << n,
1632-
a.11 << n,
1633-
a.12 << n,
1634-
a.13 << n,
1635-
a.14 << n,
1636-
a.15 << n,
1637-
)
1621+
} else {
1622+
uint8x16_t(
1623+
a.0 << n,
1624+
a.1 << n,
1625+
a.2 << n,
1626+
a.3 << n,
1627+
a.4 << n,
1628+
a.5 << n,
1629+
a.6 << n,
1630+
a.7 << n,
1631+
a.8 << n,
1632+
a.9 << n,
1633+
a.10 << n,
1634+
a.11 << n,
1635+
a.12 << n,
1636+
a.13 << n,
1637+
a.14 << n,
1638+
a.15 << n,
1639+
)
1640+
}
16381641
}
16391642

16401643
#[cfg(test)]

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