From 0190f04f0dce3b4d6d458f0769e6119c7d169ea2 Mon Sep 17 00:00:00 2001 From: Xiretza Date: Thu, 4 Feb 2021 12:56:50 +0100 Subject: [PATCH] rustc_target: [RISC-V] Enable non-CAS atomics on all targets While targets without the atomic (`A`) ISA extension do not support CAS atomic operations, the standard guarantees that normal loads/stores to aligned addresses are atomic: > Furthermore, whereas naturally aligned loads and stores are guaranteed > to execute atomically, misaligned loads and stores might not, and hence > require additional synchronization to ensure atomicity. > > - RISC-V Unprivileged ISA V20191213, p. 25 --- compiler/rustc_target/src/spec/riscv32i_unknown_none_elf.rs | 2 +- compiler/rustc_target/src/spec/riscv32imc_unknown_none_elf.rs | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/compiler/rustc_target/src/spec/riscv32i_unknown_none_elf.rs b/compiler/rustc_target/src/spec/riscv32i_unknown_none_elf.rs index a31a08a8cf93d..a7372a390b22c 100644 --- a/compiler/rustc_target/src/spec/riscv32i_unknown_none_elf.rs +++ b/compiler/rustc_target/src/spec/riscv32i_unknown_none_elf.rs @@ -12,7 +12,7 @@ pub fn target() -> Target { linker_flavor: LinkerFlavor::Lld(LldFlavor::Ld), linker: Some("rust-lld".to_string()), cpu: "generic-rv32".to_string(), - max_atomic_width: Some(0), + max_atomic_width: Some(32), atomic_cas: false, features: String::new(), executables: true, diff --git a/compiler/rustc_target/src/spec/riscv32imc_unknown_none_elf.rs b/compiler/rustc_target/src/spec/riscv32imc_unknown_none_elf.rs index 89d760e082f19..c8745893b88f5 100644 --- a/compiler/rustc_target/src/spec/riscv32imc_unknown_none_elf.rs +++ b/compiler/rustc_target/src/spec/riscv32imc_unknown_none_elf.rs @@ -12,7 +12,7 @@ pub fn target() -> Target { linker_flavor: LinkerFlavor::Lld(LldFlavor::Ld), linker: Some("rust-lld".to_string()), cpu: "generic-rv32".to_string(), - max_atomic_width: Some(0), + max_atomic_width: Some(32), atomic_cas: false, features: "+m,+c".to_string(), executables: true,