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Add various pointer & void-using x86 intrinsics.
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6 files changed

+378
-13
lines changed

6 files changed

+378
-13
lines changed

src/etc/platform-intrinsics/x86/avx.json

+42
Original file line numberDiff line numberDiff line change
@@ -36,6 +36,20 @@
3636
"ret": "f(32-64)",
3737
"args": ["0", "0"]
3838
},
39+
{
40+
"intrinsic": "{0.width_mm}_maskload_{0.data_type}",
41+
"width": [128, 256],
42+
"llvm": "maskload.{0.data_type_short}{0.width_suffix}",
43+
"ret": ["f(32-64)"],
44+
"args": ["0SPc/S8", "0s->0"]
45+
},
46+
{
47+
"intrinsic": "{3.width_mm}_maskstore_{3.data_type}",
48+
"width": [128, 256],
49+
"llvm": "maskstore.{3.data_type_short}{3.width_suffix}",
50+
"ret": "V",
51+
"args": ["F(32-64)Pm/S8", "1Dsv->1Dv", "1Dv"]
52+
},
3953
{
4054
"intrinsic": "256_min_{0.data_type}",
4155
"width": [256],
@@ -78,6 +92,20 @@
7892
"ret": "f32",
7993
"args": ["f32"]
8094
},
95+
{
96+
"intrinsic": "256_storeu_{2.data_type}",
97+
"width": [256],
98+
"llvm": "storeu.ps.256",
99+
"ret": "V",
100+
"args": ["f(32-64)Pm/U8", "1D"]
101+
},
102+
{
103+
"intrinsic": "256_storeu_si256",
104+
"width": [256],
105+
"llvm": "storeu.dq.256",
106+
"ret": "V",
107+
"args": ["u8Pm/U8", "1D"]
108+
},
81109
{
82110
"intrinsic": "256_sqrt_{0.data_type}",
83111
"width": [256],
@@ -147,6 +175,20 @@
147175
"llvm": "ptestz.256",
148176
"ret": "S32",
149177
"args": ["u64", "u64"]
178+
},
179+
{
180+
"intrinsic": "256_zeroall",
181+
"width": [256],
182+
"llvm": "vzeroall",
183+
"ret": "V",
184+
"args": []
185+
},
186+
{
187+
"intrinsic": "256_zeroupper",
188+
"width": [256],
189+
"llvm": "vzeroupper",
190+
"ret": "V",
191+
"args": []
150192
}
151193
]
152194
}

src/etc/platform-intrinsics/x86/avx2.json

+45-3
Original file line numberDiff line numberDiff line change
@@ -4,21 +4,21 @@
44
{
55
"intrinsic": "256_abs_{0.data_type}",
66
"width": [256],
7-
"llvm": "avx2.pabs.{0.data_type_short}",
7+
"llvm": "pabs.{0.data_type_short}",
88
"ret": "s(8-32)",
99
"args": ["0"]
1010
},
1111
{
1212
"intrinsic": "256_adds_{0.data_type}",
1313
"width": [256],
14-
"llvm": "avx2.padd{0.kind_short}s.{0.data_type_short}",
14+
"llvm": "padd{0.kind_short}s.{0.data_type_short}",
1515
"ret": "i(8-16)",
1616
"args": ["0", "0"]
1717
},
1818
{
1919
"intrinsic": "256_avg_{0.data_type}",
2020
"width": [256],
21-
"llvm": "avx2.pavg.{0.data_type_short}",
21+
"llvm": "pavg.{0.data_type_short}",
2222
"ret": "u(8-16)",
2323
"args": ["0", "0"]
2424
},
@@ -64,6 +64,48 @@
6464
"ret": "s16",
6565
"args": ["s8", "s8"]
6666
},
67+
{
68+
"intrinsic": "{0.width_mm}_mask_i32gather_{0.data_type}",
69+
"width": [128, 256],
70+
"llvm": "gather.d.{0.data_type_short}{0.width_suffix}",
71+
"ret": ["s32", "f32"],
72+
"args": ["0", "0SPc/S8", "s32", "0s->0", "S32/8"]
73+
},
74+
{
75+
"intrinsic": "{0.width_mm}_mask_i32gather_{0.data_type}",
76+
"width": [128, 256],
77+
"llvm": "gather.d.{0.data_type_short}{0.width_suffix}",
78+
"ret": ["s64", "f64"],
79+
"args": ["0", "0SPc/S8", "s32x128", "0s->0", "S32/8"]
80+
},
81+
{
82+
"intrinsic": "{3.width_mm}_mask_i64gather_{0.data_type}",
83+
"width": [128, 256],
84+
"llvm": "gather.q.{0.data_type_short}{0.width_suffix}",
85+
"ret": ["s32x128", "f32x128"],
86+
"args": ["0", "0SPc/S8", "s64", "0s->0", "S32/8"]
87+
},
88+
{
89+
"intrinsic": "{0.width_mm}_mask_i64gather_{0.data_type}",
90+
"width": [128, 256],
91+
"llvm": "gather.q.{0.data_type_short}{0.width_suffix}",
92+
"ret": ["s64", "f64"],
93+
"args": ["0", "0SPc/S8", "s64", "0s->0", "S32/8"]
94+
},
95+
{
96+
"intrinsic": "{0.width_mm}_maskload_{0.data_type}",
97+
"width": [128, 256],
98+
"llvm": "maskload.{0.data_type_short}{0.width_suffix}",
99+
"ret": ["s(32-64)"],
100+
"args": ["0Pc/S8", "0"]
101+
},
102+
{
103+
"intrinsic": "{2.width_mm}_maskstore_{2.data_type}",
104+
"width": [128, 256],
105+
"llvm": "maskstore.{2.data_type_short}{2.width_suffix}",
106+
"ret": "V",
107+
"args": ["S(32-64)Pm/S8", "1Dv", "2"]
108+
},
67109
{
68110
"intrinsic": "256_max_{0.data_type}",
69111
"width": [256],

src/etc/platform-intrinsics/x86/sse.json

+7
Original file line numberDiff line numberDiff line change
@@ -42,6 +42,13 @@
4242
"llvm": "!llvm.sqrt.v4f32",
4343
"ret": "f32",
4444
"args": ["0"]
45+
},
46+
{
47+
"intrinsic": "_storeu_ps",
48+
"width": [128],
49+
"llvm": "storeu.ps",
50+
"ret": "V",
51+
"args": ["F32Pm/S8", "f32"]
4552
}
4653
]
4754
}

src/etc/platform-intrinsics/x86/sse2.json

+42
Original file line numberDiff line numberDiff line change
@@ -15,13 +15,27 @@
1515
"ret": "u(8-16)",
1616
"args": ["0", "0"]
1717
},
18+
{
19+
"intrinsic": "_lfence",
20+
"width": [128],
21+
"llvm": "lfence",
22+
"ret": "V",
23+
"args": []
24+
},
1825
{
1926
"intrinsic": "_madd_epi16",
2027
"width": [128],
2128
"llvm": "pmadd.wd",
2229
"ret": "s32",
2330
"args": ["s16", "s16"]
2431
},
32+
{
33+
"intrinsic": "_maskmoveu_si128",
34+
"width": [128],
35+
"llvm": "maskmov.dqu",
36+
"ret": "V",
37+
"args": ["u8", "u8", "U8Pm"]
38+
},
2539
{
2640
"intrinsic": "_max_{0.data_type}",
2741
"width": [128],
@@ -36,6 +50,13 @@
3650
"ret": "f64",
3751
"args": ["0", "0"]
3852
},
53+
{
54+
"intrinsic": "_mfence",
55+
"width": [128],
56+
"llvm": "fence",
57+
"ret": "V",
58+
"args": []
59+
},
3960
{
4061
"intrinsic": "_min_{0.data_type}",
4162
"width": [128],
@@ -99,13 +120,34 @@
99120
"ret": "u64",
100121
"args": ["u8", "u8"]
101122
},
123+
{
124+
"intrinsic": "_sfence",
125+
"width": [128],
126+
"llvm": "sfence",
127+
"ret": "V",
128+
"args": []
129+
},
102130
{
103131
"intrinsic": "_sqrt_pd",
104132
"width": [128],
105133
"llvm": "!llvm.sqrt.v2f64",
106134
"ret": "f64",
107135
"args": ["0"]
108136
},
137+
{
138+
"intrinsic": "_storeu_pd",
139+
"width": [128],
140+
"llvm": "storeu.pd",
141+
"ret": "V",
142+
"args": ["F64Pm/U8", "f64"]
143+
},
144+
{
145+
"intrinsic": "_storeu_si128",
146+
"width": [128],
147+
"llvm": "storeu.dq",
148+
"ret": "V",
149+
"args": ["u8Pm/U8", "u8"]
150+
},
109151
{
110152
"intrinsic": "_subs_{0.data_type}",
111153
"width": [128],

src/etc/platform-intrinsics/x86/sse3.json

+7
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,13 @@
2121
"llvm": "hsub.{0.data_type}",
2222
"ret": "f(32-64)",
2323
"args": ["0", "0"]
24+
},
25+
{
26+
"intrinsic": "_lddqu_si128",
27+
"width": [128],
28+
"llvm": "ldu.dq",
29+
"ret": "u8",
30+
"args": ["0Pc/S8"]
2431
}
2532
]
2633
}

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