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rustc: remove redundant/unused fields from layout::Abi::Vector.
1 parent b203a26 commit 5df25c4

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6 files changed

+19
-28
lines changed

6 files changed

+19
-28
lines changed

src/librustc/ty/layout.rs

+9-18
Original file line numberDiff line numberDiff line change
@@ -740,10 +740,7 @@ impl FieldPlacement {
740740
#[derive(Copy, Clone, PartialEq, Eq, Hash, Debug)]
741741
pub enum Abi {
742742
Scalar(Primitive),
743-
Vector {
744-
element: Primitive,
745-
count: u64
746-
},
743+
Vector,
747744
Aggregate {
748745
/// If true, the size is exact, otherwise it's only a lower bound.
749746
sized: bool,
@@ -755,15 +752,15 @@ impl Abi {
755752
/// Returns true if the layout corresponds to an unsized type.
756753
pub fn is_unsized(&self) -> bool {
757754
match *self {
758-
Abi::Scalar(_) | Abi::Vector { .. } => false,
755+
Abi::Scalar(_) | Abi::Vector => false,
759756
Abi::Aggregate { sized, .. } => !sized
760757
}
761758
}
762759

763760
/// Returns true if the fields of the layout are packed.
764761
pub fn is_packed(&self) -> bool {
765762
match *self {
766-
Abi::Scalar(_) | Abi::Vector { .. } => false,
763+
Abi::Scalar(_) | Abi::Vector => false,
767764
Abi::Aggregate { packed, .. } => packed
768765
}
769766
}
@@ -1202,14 +1199,14 @@ impl<'a, 'tcx> CachedLayout {
12021199
ty::TyAdt(def, ..) if def.repr.simd() => {
12031200
let count = ty.simd_size(tcx) as u64;
12041201
let element = cx.layout_of(ty.simd_type(tcx))?;
1205-
let element_scalar = match element.abi {
1206-
Abi::Scalar(value) => value,
1202+
match element.abi {
1203+
Abi::Scalar(_) => {}
12071204
_ => {
12081205
tcx.sess.fatal(&format!("monomorphising SIMD type `{}` with \
12091206
a non-machine element type `{}`",
12101207
ty, element.ty));
12111208
}
1212-
};
1209+
}
12131210
let size = element.size.checked_mul(count, dl)
12141211
.ok_or(LayoutError::SizeOverflow(ty))?;
12151212
let align = dl.vector_align(size);
@@ -1221,10 +1218,7 @@ impl<'a, 'tcx> CachedLayout {
12211218
stride: element.size,
12221219
count
12231220
},
1224-
abi: Abi::Vector {
1225-
element: element_scalar,
1226-
count
1227-
},
1221+
abi: Abi::Vector,
12281222
size,
12291223
align,
12301224
primitive_align: align
@@ -2076,7 +2070,7 @@ impl<'a, 'tcx> TyLayout<'tcx> {
20762070
pub fn is_zst(&self) -> bool {
20772071
match self.abi {
20782072
Abi::Scalar(_) => false,
2079-
Abi::Vector { count, .. } => count == 0,
2073+
Abi::Vector => self.size.bytes() == 0,
20802074
Abi::Aggregate { sized, .. } => sized && self.size.bytes() == 0
20812075
}
20822076
}
@@ -2233,10 +2227,7 @@ impl<'gcx> HashStable<StableHashingContext<'gcx>> for Abi {
22332227
Scalar(ref value) => {
22342228
value.hash_stable(hcx, hasher);
22352229
}
2236-
Vector { ref element, count } => {
2237-
element.hash_stable(hcx, hasher);
2238-
count.hash_stable(hcx, hasher);
2239-
}
2230+
Vector => {}
22402231
Aggregate { packed, sized } => {
22412232
packed.hash_stable(hcx, hasher);
22422233
sized.hash_stable(hcx, hasher);

src/librustc_trans/abi.rs

+2-2
Original file line numberDiff line numberDiff line change
@@ -279,7 +279,7 @@ impl<'tcx> LayoutExt<'tcx> for TyLayout<'tcx> {
279279
fn is_aggregate(&self) -> bool {
280280
match self.abi {
281281
layout::Abi::Scalar(_) |
282-
layout::Abi::Vector { .. } => false,
282+
layout::Abi::Vector => false,
283283
layout::Abi::Aggregate { .. } => true
284284
}
285285
}
@@ -300,7 +300,7 @@ impl<'tcx> LayoutExt<'tcx> for TyLayout<'tcx> {
300300
})
301301
}
302302

303-
layout::Abi::Vector { .. } => {
303+
layout::Abi::Vector => {
304304
Some(Reg {
305305
kind: RegKind::Vector,
306306
size: self.size

src/librustc_trans/cabi_x86_64.rs

+4-4
Original file line numberDiff line numberDiff line change
@@ -75,14 +75,14 @@ fn classify_arg<'a, 'tcx>(ccx: &CrateContext<'a, 'tcx>, arg: &ArgType<'tcx>)
7575
unify(cls, off, reg);
7676
}
7777

78-
layout::Abi::Vector { element, count } => {
78+
layout::Abi::Vector => {
7979
unify(cls, off, Class::Sse);
8080

8181
// everything after the first one is the upper
8282
// half of a register.
83-
let eltsz = element.size(ccx);
84-
for i in 1..count {
85-
unify(cls, off + eltsz * (i as u64), Class::SseUp);
83+
for i in 1..layout.fields.count() {
84+
let field_off = off + layout.fields.offset(i);
85+
unify(cls, field_off, Class::SseUp);
8686
}
8787
}
8888

src/librustc_trans/cabi_x86_win64.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -26,7 +26,7 @@ pub fn compute_abi_info(fty: &mut FnType) {
2626
_ => a.make_indirect()
2727
}
2828
}
29-
layout::Abi::Vector { .. } => {
29+
layout::Abi::Vector => {
3030
// FIXME(eddyb) there should be a size cap here
3131
// (probably what clang calls "illegal vectors").
3232
}

src/librustc_trans/mir/constant.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -1098,7 +1098,7 @@ fn trans_const_adt<'a, 'tcx>(
10981098
match l.variants {
10991099
layout::Variants::Single { index } => {
11001100
assert_eq!(variant_index, index);
1101-
if let layout::Abi::Vector { .. } = l.abi {
1101+
if let layout::Abi::Vector = l.abi {
11021102
Const::new(C_vector(&vals.iter().map(|x| x.llval).collect::<Vec<_>>()), t)
11031103
} else if let layout::FieldPlacement::Union(_) = l.fields {
11041104
assert_eq!(variant_index, 0);

src/librustc_trans/type_of.rs

+2-2
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,7 @@ fn uncached_llvm_type<'a, 'tcx>(ccx: &CrateContext<'a, 'tcx>,
2323
-> Type {
2424
match layout.abi {
2525
layout::Abi::Scalar(_) => bug!("handled elsewhere"),
26-
layout::Abi::Vector { .. } => {
26+
layout::Abi::Vector => {
2727
return Type::vector(&layout.field(ccx, 0).llvm_type(ccx),
2828
layout.fields.count() as u64);
2929
}
@@ -158,7 +158,7 @@ pub trait LayoutLlvmExt<'tcx> {
158158
impl<'tcx> LayoutLlvmExt<'tcx> for TyLayout<'tcx> {
159159
fn is_llvm_immediate(&self) -> bool {
160160
match self.abi {
161-
layout::Abi::Scalar(_) | layout::Abi::Vector { .. } => true,
161+
layout::Abi::Scalar(_) | layout::Abi::Vector => true,
162162

163163
layout::Abi::Aggregate { .. } => self.is_zst()
164164
}

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