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[AArch64] Support HiSilicon's TSV110 processor
Reviewers: t.p.northover, SjoerdMeijer, kristof.beyls Reviewed By: kristof.beyls Subscribers: olista01, javed.absar, kristof.beyls, kristina, llvm-commits Differential Revision: https://reviews.llvm.org/D53908 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346546 91177308-0d34-0410-b5e6-96231b3b80d8
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-4
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14 files changed

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‎include/llvm/Support/AArch64TargetParser.def

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -117,6 +117,9 @@ AARCH64_CPU_NAME("thunderxt81", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
117117
(AArch64::AEK_CRC | AArch64::AEK_PROFILE))
118118
AARCH64_CPU_NAME("thunderxt83", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
119119
(AArch64::AEK_CRC | AArch64::AEK_PROFILE))
120+
AARCH64_CPU_NAME("tsv110", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
121+
(AArch64::AEK_PROFILE | AArch64::AEK_FP16 | AArch64::AEK_FP16FML |
122+
AArch64::AEK_DOTPROD))
120123
// Invalid CPU
121124
AARCH64_CPU_NAME("invalid", INVALID, FK_INVALID, true, AArch64::AEK_INVALID)
122125
#undef AARCH64_CPU_NAME

‎lib/Support/Host.cpp

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -211,6 +211,17 @@ StringRef sys::detail::getHostCPUNameForARM(StringRef ProcCpuinfoContent) {
211211
}
212212
}
213213

214+
if (Implementer == "0x48") // HiSilicon Technologies, Inc.
215+
// Look for the CPU part line.
216+
for (unsigned I = 0, E = Lines.size(); I != E; ++I)
217+
if (Lines[I].startswith("CPU part"))
218+
// The CPU part is a 3 digit hexadecimal number with a 0x prefix. The
219+
// values correspond to the "Part number" in the CP15/c0 register. The
220+
// contents are specified in the various processor manuals.
221+
return StringSwitch<const char *>(Lines[I].substr(8).ltrim("\t :"))
222+
.Case("0xd01", "tsv110")
223+
.Default("generic");
224+
214225
if (Implementer == "0x51") // Qualcomm Technologies, Inc.
215226
// Look for the CPU part line.
216227
for (unsigned I = 0, E = Lines.size(); I != E; ++I)

‎lib/Target/AArch64/AArch64.td

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -546,6 +546,21 @@ def ProcThunderXT83 : SubtargetFeature<"thunderxt83", "ARMProcFamily",
546546
FeaturePredictableSelectIsExpensive,
547547
FeatureNEON]>;
548548

549+
def ProcTSV110 : SubtargetFeature<"tsv110", "ARMProcFamily", "TSV110",
550+
"HiSilicon TS-V110 processors", [
551+
HasV8_2aOps,
552+
FeatureCrypto,
553+
FeatureCustomCheapAsMoveHandling,
554+
FeatureFPARMv8,
555+
FeatureFuseAES,
556+
FeatureNEON,
557+
FeaturePerfMon,
558+
FeaturePostRAScheduler,
559+
FeatureSPE,
560+
FeatureFullFP16,
561+
FeatureFP16FML,
562+
FeatureDotProd]>;
563+
549564
def : ProcessorModel<"generic", NoSchedModel, [
550565
FeatureFPARMv8,
551566
FeatureFuseAES,
@@ -578,6 +593,8 @@ def : ProcessorModel<"thunderxt81", ThunderXT8XModel, [ProcThunderXT81]>;
578593
def : ProcessorModel<"thunderxt83", ThunderXT8XModel, [ProcThunderXT83]>;
579594
// Cavium ThunderX2T9X Processors. Formerly Broadcom Vulcan.
580595
def : ProcessorModel<"thunderx2t99", ThunderX2T99Model, [ProcThunderX2T99]>;
596+
// FIXME: HiSilicon TSV110 is currently modeled as a Cortex-A57.
597+
def : ProcessorModel<"tsv110", CortexA57Model, [ProcTSV110]>;
581598

582599
//===----------------------------------------------------------------------===//
583600
// Assembly parser

‎lib/Target/AArch64/AArch64Subtarget.cpp

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -148,6 +148,11 @@ void AArch64Subtarget::initializeProperties() {
148148
// FIXME: remove this to enable 64-bit SLP if performance looks good.
149149
MinVectorRegisterBitWidth = 128;
150150
break;
151+
case TSV110:
152+
CacheLineSize = 64;
153+
PrefFunctionAlignment = 4;
154+
PrefLoopAlignment = 2;
155+
break;
151156
}
152157
}
153158

‎lib/Target/AArch64/AArch64Subtarget.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -56,7 +56,8 @@ class AArch64Subtarget final : public AArch64GenSubtargetInfo {
5656
ThunderX,
5757
ThunderXT81,
5858
ThunderXT83,
59-
ThunderXT88
59+
ThunderXT88,
60+
TSV110
6061
};
6162

6263
protected:

‎test/CodeGen/AArch64/cpus.ll

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,7 @@
1717
; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=saphira 2>&1 | FileCheck %s
1818
; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=kryo 2>&1 | FileCheck %s
1919
; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=thunderx2t99 2>&1 | FileCheck %s
20+
; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=tsv110 2>&1 | FileCheck %s
2021
; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=INVALID
2122

2223
; CHECK-NOT: {{.*}} is not a recognized processor for this target

‎test/CodeGen/AArch64/remat.ll

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@
1313
; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=saphira -o - %s | FileCheck %s
1414
; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=kryo -o - %s | FileCheck %s
1515
; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=thunderx2t99 -o - %s | FileCheck %s
16+
; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=tsv110 -o - %s | FileCheck %s
1617
; RUN: llc -mtriple=aarch64-linux-gnuabi -mattr=+custom-cheap-as-move -o - %s | FileCheck %s
1718

1819
%X = type { i64, i64, i64 }

‎test/MC/AArch64/armv8.1a-lse.s

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,8 @@
33
// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mcpu=cortex-a55 -show-encoding < %s 2> %t | FileCheck %s
44
// RUN: FileCheck -check-prefix=CHECK-ERROR < %t %s
55
// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mcpu=cortex-a75 -show-encoding < %s 2> %t | FileCheck %s
6+
// RUN: FileCheck -check-prefix=CHECK-ERROR < %t %s
7+
// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mcpu=tsv110 -show-encoding < %s 2> %t | FileCheck %s
68
// RUN: FileCheck -check-prefix=CHECK-ERROR < %t %s
79
.text
810

‎test/MC/AArch64/armv8.2a-dotprod.s

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
11
// RUN: llvm-mc -triple aarch64 -mattr=+dotprod -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
22
// RUN: llvm-mc -triple aarch64 -mcpu=cortex-a75 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
33
// RUN: llvm-mc -triple aarch64 -mcpu=cortex-a55 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
4+
// RUN: llvm-mc -triple aarch64 -mcpu=tsv110 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
45
// RUN: not llvm-mc -triple aarch64 -mattr=+v8.2a -show-encoding < %s 2> %t
56
// RUN: FileCheck --check-prefix=CHECK-NO-DOTPROD < %t %s
67

‎test/MC/AArch64/crc.s

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,8 @@
55
// RUN: FileCheck %s --check-prefix=CRC
66
// RUN: llvm-mc -triple aarch64-- -mcpu=cortex-a75 %s 2>&1 |\
77
// RUN: FileCheck %s --check-prefix=CRC
8+
// RUN: llvm-mc -triple aarch64-- -mcpu=tsv110 %s 2>&1 |\
9+
// RUN: FileCheck %s --check-prefix=CRC
810

911
// RUN: not llvm-mc -triple aarch64-- %s 2>&1 |\
1012
// RUN: FileCheck %s --check-prefix=NOCRC

‎test/MC/AArch64/ras-extension.s

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
11
// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+ras < %s | FileCheck %s
22
// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mcpu=cortex-a55 < %s | FileCheck %s
33
// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mcpu=cortex-a75 < %s | FileCheck %s
4+
// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mcpu=tsv110 < %s | FileCheck %s
45

56
esb
67
// CHECK: esb // encoding: [0x1f,0x22,0x03,0xd5]

‎test/MC/Disassembler/AArch64/armv8.2a-dotprod.txt

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
11
# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+dotprod --disassemble < %s | FileCheck %s
22
# RUN: llvm-mc -triple aarch64-none-linux-gnu -mcpu=cortex-a75 --disassemble < %s | FileCheck %s
33
# RUN: llvm-mc -triple aarch64-none-linux-gnu -mcpu=cortex-a55 --disassemble < %s | FileCheck %s
4+
# RUN: llvm-mc -triple aarch64-none-linux-gnu -mcpu=tsv110 --disassemble < %s | FileCheck %s
45
# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=-dotprod --disassemble < %s 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
56

67
0x20,0x94,0x82,0x2e

‎unittests/Support/Host.cpp

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -242,6 +242,11 @@ CPU part : 0x0a1
242242
"CPU implementer : 0x43\n"
243243
"CPU part : 0xa1"),
244244
"thunderxt88");
245+
246+
// Verify HiSilicon processors.
247+
EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x48\n"
248+
"CPU part : 0xd01"),
249+
"tsv110");
245250
}
246251

247252
#if defined(__APPLE__)

‎unittests/Support/TargetParserTest.cpp

Lines changed: 30 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -488,7 +488,7 @@ TEST(TargetParserTest, testARMExtension) {
488488
ARM::ArchKind::ARMV7EM, "crypto"));
489489
EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV8A, "ras"));
490490
EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV8_1A, "ras"));
491-
EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV8_2A, "spe"));
491+
EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV8_2A, "profile"));
492492
EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV8_2A, "fp16"));
493493
EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV8_2A, "fp16fml"));
494494
EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV8_3A, "fp16"));
@@ -795,9 +795,16 @@ TEST(TargetParserTest, testAArch64CPU) {
795795
AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_SIMD |
796796
AArch64::AEK_FP | AArch64::AEK_PROFILE,
797797
"8-A"));
798+
EXPECT_TRUE(testAArch64CPU(
799+
"tsv110", "armv8.2-a", "crypto-neon-fp-armv8",
800+
AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
801+
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
802+
AArch64::AEK_RDM | AArch64::AEK_PROFILE | AArch64::AEK_FP16 |
803+
AArch64::AEK_FP16FML | AArch64::AEK_DOTPROD,
804+
"8.2-A"));
798805
}
799806

800-
static constexpr unsigned NumAArch64CPUArchs = 20;
807+
static constexpr unsigned NumAArch64CPUArchs = 21;
801808

802809
TEST(TargetParserTest, testAArch64CPUArchList) {
803810
SmallVector<StringRef, NumAArch64CPUArchs> List;
@@ -888,10 +895,14 @@ TEST(TargetParserTest, testAArch64Extension) {
888895
AArch64::ArchKind::INVALID, "fp16"));
889896
EXPECT_FALSE(testAArch64Extension("cortex-a55",
890897
AArch64::ArchKind::INVALID, "fp16fml"));
898+
EXPECT_TRUE(testAArch64Extension("cortex-a55",
899+
AArch64::ArchKind::INVALID, "dotprod"));
891900
EXPECT_TRUE(testAArch64Extension("cortex-a75",
892901
AArch64::ArchKind::INVALID, "fp16"));
893902
EXPECT_FALSE(testAArch64Extension("cortex-a75",
894903
AArch64::ArchKind::INVALID, "fp16fml"));
904+
EXPECT_TRUE(testAArch64Extension("cortex-a75",
905+
AArch64::ArchKind::INVALID, "dotprod"));
895906
EXPECT_FALSE(testAArch64Extension("thunderx2t99",
896907
AArch64::ArchKind::INVALID, "ras"));
897908
EXPECT_FALSE(testAArch64Extension("thunderx",
@@ -902,13 +913,29 @@ TEST(TargetParserTest, testAArch64Extension) {
902913
AArch64::ArchKind::INVALID, "lse"));
903914
EXPECT_FALSE(testAArch64Extension("thunderxt88",
904915
AArch64::ArchKind::INVALID, "lse"));
916+
EXPECT_TRUE(testAArch64Extension("tsv110",
917+
AArch64::ArchKind::INVALID, "crypto"));
918+
EXPECT_FALSE(testAArch64Extension("tsv110",
919+
AArch64::ArchKind::INVALID, "sha3"));
920+
EXPECT_FALSE(testAArch64Extension("tsv110",
921+
AArch64::ArchKind::INVALID, "sm4"));
922+
EXPECT_TRUE(testAArch64Extension("tsv110",
923+
AArch64::ArchKind::INVALID, "ras"));
924+
EXPECT_TRUE(testAArch64Extension("tsv110",
925+
AArch64::ArchKind::INVALID, "profile"));
926+
EXPECT_TRUE(testAArch64Extension("tsv110",
927+
AArch64::ArchKind::INVALID, "fp16"));
928+
EXPECT_TRUE(testAArch64Extension("tsv110",
929+
AArch64::ArchKind::INVALID, "fp16fml"));
930+
EXPECT_TRUE(testAArch64Extension("tsv110",
931+
AArch64::ArchKind::INVALID, "dotprod"));
905932

906933
EXPECT_FALSE(testAArch64Extension(
907934
"generic", AArch64::ArchKind::ARMV8A, "ras"));
908935
EXPECT_FALSE(testAArch64Extension(
909936
"generic", AArch64::ArchKind::ARMV8_1A, "ras"));
910937
EXPECT_FALSE(testAArch64Extension(
911-
"generic", AArch64::ArchKind::ARMV8_2A, "spe"));
938+
"generic", AArch64::ArchKind::ARMV8_2A, "profile"));
912939
EXPECT_FALSE(testAArch64Extension(
913940
"generic", AArch64::ArchKind::ARMV8_2A, "fp16"));
914941
EXPECT_FALSE(testAArch64Extension(

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