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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py |
| 2 | +; RUN: opt < %s -instcombine -S | FileCheck %s |
| 3 | + |
| 4 | +declare i32 @llvm.abs.i32(i32, i1) |
| 5 | + |
| 6 | +define i1 @abs_nsw_must_be_positive(i32 %x) { |
| 7 | +; CHECK-LABEL: @abs_nsw_must_be_positive( |
| 8 | +; CHECK-NEXT: ret i1 true |
| 9 | +; |
| 10 | + %abs = call i32 @llvm.abs.i32(i32 %x, i1 true) |
| 11 | + %c2 = icmp sge i32 %abs, 0 |
| 12 | + ret i1 %c2 |
| 13 | +} |
| 14 | + |
| 15 | +; Negative test, no nsw provides no information about the sign bit of the result. |
| 16 | +define i1 @abs_nonsw(i32 %x) { |
| 17 | +; CHECK-LABEL: @abs_nonsw( |
| 18 | +; CHECK-NEXT: [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false) |
| 19 | +; CHECK-NEXT: [[C2:%.*]] = icmp sgt i32 [[ABS]], -1 |
| 20 | +; CHECK-NEXT: ret i1 [[C2]] |
| 21 | +; |
| 22 | + %abs = call i32 @llvm.abs.i32(i32 %x, i1 false) |
| 23 | + %c2 = icmp sge i32 %abs, 0 |
| 24 | + ret i1 %c2 |
| 25 | +} |
| 26 | + |
| 27 | +; abs preserves trailing zeros so the second and is unneeded |
| 28 | +define i32 @abs_trailing_zeros(i32 %x) { |
| 29 | +; CHECK-LABEL: @abs_trailing_zeros( |
| 30 | +; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], -4 |
| 31 | +; CHECK-NEXT: [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[AND]], i1 false) |
| 32 | +; CHECK-NEXT: ret i32 [[ABS]] |
| 33 | +; |
| 34 | + %and = and i32 %x, -4 |
| 35 | + %abs = call i32 @llvm.abs.i32(i32 %and, i1 false) |
| 36 | + %and2 = and i32 %abs, -2 |
| 37 | + ret i32 %and2 |
| 38 | +} |
| 39 | + |
| 40 | +; negative test, can't remove the second and based on trailing zeroes. |
| 41 | +; FIXME: Could remove the first and using demanded bits. |
| 42 | +define i32 @abs_trailing_zeros_negative(i32 %x) { |
| 43 | +; CHECK-LABEL: @abs_trailing_zeros_negative( |
| 44 | +; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], -2 |
| 45 | +; CHECK-NEXT: [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[AND]], i1 false) |
| 46 | +; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ABS]], -4 |
| 47 | +; CHECK-NEXT: ret i32 [[AND2]] |
| 48 | +; |
| 49 | + %and = and i32 %x, -2 |
| 50 | + %abs = call i32 @llvm.abs.i32(i32 %and, i1 false) |
| 51 | + %and2 = and i32 %abs, -4 |
| 52 | + ret i32 %and2 |
| 53 | +} |
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