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burrbullburrbull
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use ConstZero/One instead of Default
1 parent 6649704 commit 2dba2b6

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7 files changed

+57
-38
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7 files changed

+57
-38
lines changed

‎.github/workflows/ci.yml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
on:
22
push:
3-
branches: master
3+
branches: [master]
44
pull_request:
55
merge_group:
66

‎CHANGELOG.md

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/).
77

88
## [Unreleased]
99

10+
- *breaking change* use `ConstZero::ZERO` instead of `Default::default()` to force const
1011
- Add `mtvec_align` field to `riscv_config` to configure the byte alignment of interrupt vector table.
1112
- Fix reexport path when "%s" inside "derivedFrom"
1213
- Force using rust edition 2021 in CI

‎src/generate/generic.rs

Lines changed: 30 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,8 @@ use core::marker;
33
/// Raw register type (`u8`, `u16`, `u32`, ...)
44
pub trait RawReg:
55
Copy
6-
+ Default
6+
+ ConstOne
7+
+ ConstZero
78
+ From<bool>
89
+ core::ops::BitOr<Output = Self>
910
+ core::ops::BitAnd<Output = Self>
@@ -14,8 +15,10 @@ pub trait RawReg:
1415
{
1516
/// Mask for bits of width `WI`
1617
fn mask<const WI: u8>() -> Self;
17-
/// Mask for bits of width 1
18-
fn one() -> Self;
18+
/// `0`
19+
const ZERO: Self;
20+
/// `1`
21+
const ONE: Self;
1922
}
2023

2124
macro_rules! raw_reg {
@@ -25,10 +28,8 @@ macro_rules! raw_reg {
2528
fn mask<const WI: u8>() -> Self {
2629
$mask::<WI>()
2730
}
28-
#[inline(always)]
29-
fn one() -> Self {
30-
1
31-
}
31+
const ZERO: Self = 0;
32+
const ONE: Self = 1;
3233
}
3334
const fn $mask<const WI: u8>() -> $U {
3435
<$U>::MAX >> ($size - WI)
@@ -74,10 +75,10 @@ pub trait Writable: RegisterSpec {
7475
type Safety;
7576

7677
/// Specifies the register bits that are not changed if you pass `1` and are changed if you pass `0`
77-
const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux;
78+
const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = Self::Ux::ZERO;
7879

7980
/// Specifies the register bits that are not changed if you pass `0` and are changed if you pass `1`
80-
const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux;
81+
const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = Self::Ux::ZERO;
8182
}
8283

8384
/// Reset value of the register.
@@ -86,7 +87,7 @@ pub trait Writable: RegisterSpec {
8687
/// register by using the `reset` method.
8788
pub trait Resettable: RegisterSpec {
8889
/// Reset value of the register.
89-
const RESET_VALUE: Self::Ux;
90+
const RESET_VALUE: Self::Ux = Self::Ux::ZERO;
9091

9192
/// Reset value of the register.
9293
#[inline(always)]
@@ -247,7 +248,10 @@ impl<REG: Writable> W<REG> {
247248
self
248249
}
249250
}
250-
impl<REG> W<REG> where REG: Writable<Safety = Safe> {
251+
impl<REG> W<REG>
252+
where
253+
REG: Writable<Safety = Safe>,
254+
{
251255
/// Writes raw bits to the register.
252256
#[inline(always)]
253257
pub fn set(&mut self, bits: REG::Ux) -> &mut Self {
@@ -335,7 +339,8 @@ pub struct RangeFrom<const MIN: u64>;
335339
pub struct RangeTo<const MAX: u64>;
336340

337341
/// Write field Proxy
338-
pub type FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe> = raw::FieldWriter<'a, REG, WI, FI, Safety>;
342+
pub type FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe> =
343+
raw::FieldWriter<'a, REG, WI, FI, Safety>;
339344

340345
impl<REG, const WI: u8, FI, Safety> FieldWriter<'_, REG, WI, FI, Safety>
341346
where
@@ -390,7 +395,8 @@ where
390395
}
391396
}
392397

393-
impl<'a, REG, const WI: u8, FI, const MIN: u64, const MAX: u64> FieldWriter<'a, REG, WI, FI, Range<MIN, MAX>>
398+
impl<'a, REG, const WI: u8, FI, const MIN: u64, const MAX: u64>
399+
FieldWriter<'a, REG, WI, FI, Range<MIN, MAX>>
394400
where
395401
REG: Writable + RegisterSpec,
396402
FI: FieldSpec,
@@ -478,7 +484,7 @@ macro_rules! bit_proxy {
478484
pub const fn width(&self) -> u8 {
479485
Self::WIDTH
480486
}
481-
487+
482488
/// Field offset
483489
#[inline(always)]
484490
pub const fn offset(&self) -> u8 {
@@ -488,8 +494,8 @@ macro_rules! bit_proxy {
488494
/// Writes bit to the field
489495
#[inline(always)]
490496
pub fn bit(self, value: bool) -> &'a mut W<REG> {
491-
self.w.bits &= !(REG::Ux::one() << self.o);
492-
self.w.bits |= (REG::Ux::from(value) & REG::Ux::one()) << self.o;
497+
self.w.bits &= !(REG::Ux::ONE << self.o);
498+
self.w.bits |= (REG::Ux::from(value) & REG::Ux::ONE) << self.o;
493499
self.w
494500
}
495501
/// Writes `variant` to the field
@@ -517,13 +523,13 @@ where
517523
/// Sets the field bit
518524
#[inline(always)]
519525
pub fn set_bit(self) -> &'a mut W<REG> {
520-
self.w.bits |= REG::Ux::one() << self.o;
526+
self.w.bits |= REG::Ux::ONE << self.o;
521527
self.w
522528
}
523529
/// Clears the field bit
524530
#[inline(always)]
525531
pub fn clear_bit(self) -> &'a mut W<REG> {
526-
self.w.bits &= !(REG::Ux::one() << self.o);
532+
self.w.bits &= !(REG::Ux::ONE << self.o);
527533
self.w
528534
}
529535
}
@@ -536,7 +542,7 @@ where
536542
/// Sets the field bit
537543
#[inline(always)]
538544
pub fn set_bit(self) -> &'a mut W<REG> {
539-
self.w.bits |= REG::Ux::one() << self.o;
545+
self.w.bits |= REG::Ux::ONE << self.o;
540546
self.w
541547
}
542548
}
@@ -549,7 +555,7 @@ where
549555
/// Clears the field bit
550556
#[inline(always)]
551557
pub fn clear_bit(self) -> &'a mut W<REG> {
552-
self.w.bits &= !(REG::Ux::one() << self.o);
558+
self.w.bits &= !(REG::Ux::ONE << self.o);
553559
self.w
554560
}
555561
}
@@ -562,7 +568,7 @@ where
562568
///Clears the field bit by passing one
563569
#[inline(always)]
564570
pub fn clear_bit_by_one(self) -> &'a mut W<REG> {
565-
self.w.bits |= REG::Ux::one() << self.o;
571+
self.w.bits |= REG::Ux::ONE << self.o;
566572
self.w
567573
}
568574
}
@@ -575,7 +581,7 @@ where
575581
///Sets the field bit by passing zero
576582
#[inline(always)]
577583
pub fn set_bit_by_zero(self) -> &'a mut W<REG> {
578-
self.w.bits &= !(REG::Ux::one() << self.o);
584+
self.w.bits &= !(REG::Ux::ONE << self.o);
579585
self.w
580586
}
581587
}
@@ -588,7 +594,7 @@ where
588594
///Toggle the field bit by passing one
589595
#[inline(always)]
590596
pub fn toggle_bit(self) -> &'a mut W<REG> {
591-
self.w.bits |= REG::Ux::one() << self.o;
597+
self.w.bits |= REG::Ux::ONE << self.o;
592598
self.w
593599
}
594600
}
@@ -601,7 +607,7 @@ where
601607
///Toggle the field bit by passing zero
602608
#[inline(always)]
603609
pub fn toggle_bit(self) -> &'a mut W<REG> {
604-
self.w.bits &= !(REG::Ux::one() << self.o);
610+
self.w.bits &= !(REG::Ux::ONE << self.o);
605611
self.w
606612
}
607613
}

‎src/generate/generic_atomic.rs

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,7 @@ mod atomic {
3939

4040
impl<REG: Readable + Writable> Reg<REG>
4141
where
42-
REG::Ux: AtomicOperations
42+
REG::Ux: AtomicOperations,
4343
{
4444
/// Set high every bit in the register that was set in the write proxy. Leave other bits
4545
/// untouched. The write is done in a single atomic instruction.
@@ -53,7 +53,7 @@ mod atomic {
5353
F: FnOnce(&mut W<REG>) -> &mut W<REG>,
5454
{
5555
let bits = f(&mut W {
56-
bits: Default::default(),
56+
bits: REG::Ux::ZERO,
5757
_reg: marker::PhantomData,
5858
})
5959
.bits;
@@ -72,7 +72,7 @@ mod atomic {
7272
F: FnOnce(&mut W<REG>) -> &mut W<REG>,
7373
{
7474
let bits = f(&mut W {
75-
bits: !REG::Ux::default(),
75+
bits: !REG::Ux::ZERO,
7676
_reg: marker::PhantomData,
7777
})
7878
.bits;
@@ -91,7 +91,7 @@ mod atomic {
9191
F: FnOnce(&mut W<REG>) -> &mut W<REG>,
9292
{
9393
let bits = f(&mut W {
94-
bits: Default::default(),
94+
bits: REG::Ux::ZERO,
9595
_reg: marker::PhantomData,
9696
})
9797
.bits;

‎src/generate/generic_reg_vcell.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -148,7 +148,7 @@ impl<REG: Writable> Reg<REG> {
148148
F: FnOnce(&mut W<REG>) -> &mut W<REG>,
149149
{
150150
let value = f(&mut W {
151-
bits: REG::Ux::default(),
151+
bits: REG::Ux::ZERO,
152152
_reg: marker::PhantomData,
153153
})
154154
.bits;
@@ -169,7 +169,7 @@ impl<REG: Writable> Reg<REG> {
169169
F: FnOnce(&mut W<REG>) -> T,
170170
{
171171
let mut writer = W {
172-
bits: REG::Ux::default(),
172+
bits: REG::Ux::ZERO,
173173
_reg: marker::PhantomData,
174174
};
175175

‎src/generate/register.rs

Lines changed: 14 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -413,24 +413,31 @@ pub fn render_register_mod(
413413

414414
let doc = format!("`write(|w| ..)` method takes [`{mod_ty}::W`](W) writer structure",);
415415

416-
let zero_to_modify_fields_bitmap = util::hex(zero_to_modify_fields_bitmap);
417-
let one_to_modify_fields_bitmap = util::hex(one_to_modify_fields_bitmap);
416+
let zero_to_modify_fields_bitmap = util::hex_nonzero(zero_to_modify_fields_bitmap)
417+
.map(|bm| quote!(const ZERO_TO_MODIFY_FIELDS_BITMAP: #rty = #bm;));
418+
let one_to_modify_fields_bitmap = util::hex_nonzero(one_to_modify_fields_bitmap)
419+
.map(|bm| quote!(const ONE_TO_MODIFY_FIELDS_BITMAP: #rty = #bm;));
418420

419421
mod_items.extend(quote! {
420422
#[doc = #doc]
421423
impl crate::Writable for #regspec_ty {
422424
type Safety = crate::#safe_ty;
423-
const ZERO_TO_MODIFY_FIELDS_BITMAP: #rty = #zero_to_modify_fields_bitmap;
424-
const ONE_TO_MODIFY_FIELDS_BITMAP: #rty = #one_to_modify_fields_bitmap;
425+
#zero_to_modify_fields_bitmap
426+
#one_to_modify_fields_bitmap
425427
}
426428
});
427429
}
428-
if let Some(rv) = properties.reset_value.map(util::hex) {
429-
let doc = format!("`reset()` method sets {} to value {rv}", register.name);
430+
if let Some(rv) = properties.reset_value.map(util::hex_nonzero) {
431+
let doc = if let Some(rv) = &rv {
432+
format!("`reset()` method sets {} to value {rv}", register.name)
433+
} else {
434+
format!("`reset()` method sets {} to value 0", register.name)
435+
};
436+
let rv = rv.map(|rv| quote!(const RESET_VALUE: #rty = #rv;));
430437
mod_items.extend(quote! {
431438
#[doc = #doc]
432439
impl crate::Resettable for #regspec_ty {
433-
const RESET_VALUE: #rty = #rv;
440+
#rv
434441
}
435442
});
436443
}

‎src/util.rs

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -255,6 +255,11 @@ pub fn hex(n: u64) -> LitInt {
255255
)
256256
}
257257

258+
/// Turns non-zero `n` into an unsuffixed separated hex token
259+
pub fn hex_nonzero(n: u64) -> Option<LitInt> {
260+
(n != 0).then(|| hex(n))
261+
}
262+
258263
/// Turns `n` into an unsuffixed token
259264
pub fn unsuffixed(n: impl Into<u64>) -> LitInt {
260265
LitInt::new(&n.into().to_string(), Span::call_site())

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